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Effect of Postdeposition Annealing Temperatures on Electrical Characteristics of
Molecular-Beam-Deposited HfO2 on n-InAs/InGaAs Metal–Oxide–Semiconductor Capacitors
View the table of contents for this issue, or go to the journal homepage for more 2012 Appl. Phys. Express 5 021104
(http://iopscience.iop.org/1882-0786/5/2/021104)
Effect of Postdeposition Annealing Temperatures on Electrical Characteristics
of Molecular-Beam-Deposited HfO
2on n-InAs/InGaAs
Metal–Oxide–Semiconductor Capacitors
Hai-Dang Trinh, Yueh-Chin Lin, Huan-Chung Wang, Chia-Hua Chang, Kuniyuki Kakushima1, Hiroshi Iwai1, Takamasa Kawanago1, Yan-Gu Lin, Chi-Ming Chen, Yuen-Yee Wong,
Guan-Ning Huang, Mantu Hudait2, and Edward Yi Chang
Department of Materials Science and Engineering, National Chiao-Tung University, Hsinchu 30010, Taiwan, R.O.C. 1Interdisciplinary Graduate School of Science and Technology, Tokyo Institute of Technology, Yokohama 226-8502, Japan 2Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, VA 24061, U.S.A.
Received December 5, 2011; accepted January 7, 2012; published online January 31, 2012
The electrical characteristics of molecular-beam-deposited HfO2/n-InAs/InGaAs metal–oxide–semiconductor capacitors with different postdeposition annealing (PDA) temperatures (400–550C) are investigated. Results show that the sample with the PDA temperature of 500C exhibits the best capacitance–voltage (C–V ) behavior with small frequency dispersion and small hysteresis. The X-ray photoelectron spectroscopy (XPS) spectra show the reduction of the amount of As-related oxides to below the XPS detection level when the PDA temperature is up to 500C. As the PDA temperature was increased to above 500C, As and In atoms seem to diffuse significantly into HfO2, resulting in the degradation ofC–V behavior. # 2012 The Japan Society of Applied Physics
T
he integration of high-k materials on III–V com-pounds has been widely investigated for future high-performance low-power logic applications. Some high-k materials such as Al2O3, Ga2O3 (Gd2O3), ZrO2, and HfO2 have been studied as gate oxides.1–6)Due to high electron mobility and bandgap in the range of 0.36–1.42 eV, InxGa1xAs-based metal–oxide–semiconductor (MOS) de-vices are potentially suitable for application at low supply voltages.7) However, the lack of high-k/InGaAs interfacial quality has emerged as the main challenge. Many studies have been focused on various passivation methods such as using chemical solution treatments, and using interfacial passivation layers (Ge, Si, Ge/Si) to improve the quality of high-k/InGaAs interfaces.8–11) Among the InxGa1xAs materials, InAs has the highest electron mobility and thus, the InAs-based devices have potential to achieve high performance at a very low turn-on voltage (0:5 V).12,13)However, as compared with the numerous studies on k/GaAs or k/InGaAs structures, studies on high-k/InAs MOS capacitor (MOSCAP) structures are still limited.2,14–17)To improve the electrical properties of high-k/InAs structures, some factors such as surface passivation methods, oxide growth conditions, and annealing conditions need to be further investigated. In this work, the electrical characteristics of HfO2/n-InAs/InGaAs MOSCAP devices are investigated with several postdeposition annealing (PDA) temperatures. A hafnium (HfO2)-based gate dielec-tric is deposited using molecular beam deposition (MBD) methods. After oxide deposition, the HfO2/n-InAs/InGaAs structures were annealed at different PDA temperatures of 400, 450, 500, and 550C. The capacitance–voltage (C–V) measurements and X-ray photoelectron spectroscopy (XPS) were performed to study the influence of different post-annealing temperatures on the improvement of interface quality of the HfO2/n-InAs/InGaAs MOS structures.
The wafers used in this work were molecular-beam-epitaxy-grown 5 1017cm3 Si-doped n-type 5 nm InAs/ 3 nm In0:7Ga0:3As/10 nm In0:53Ga0:47As epilayers on 3-in. nþInP substrates. The MOS capacitor process steps include
surface treatments, oxide deposition, postdeposition anneal-ing, gate metal deposition, and formation of ohmic contact on the backside of nþ InP substrate. After degreasing in acetone and isopropanol, the wafers were cleaned in a HF solution (49%) for 3 min, and then followed by sulfur treatment in an (NH4)2S solution (7%) for 30 min at room temperature. The surface-treated wafers were loaded into the MBD system for the deposition of 15 nm HfO2 at 300C at chamber pressure of108Torr. The HfO2target was used as oxide source, and the growth rate was control in 0.05 A/s. After that, PDA process was performed with temperatures ranging from 400 to 550C in forming gas for 5 min. Finally, Ni metal (contact size: 50m in diameter) was deposited on the front side of the wafer as a gate contact metal and Au metal was deposited by sputtering on the backside of n+ InP substrates to complete the fabrication.
Figure 1 shows the cross-sectional high-resolution trans-mission electron microscopy (HRTEM) image of an as-deposited HfO2/n-InAs/InGaAs sample. The TEM image shows good HfO2/InAs stack with an indistinguishable interfacial layer. On the HfO2/In0:53Ga0:47As structure, which underwent a very similar process condition, the TEM image showed a thin native oxides layer between HfO2 and In0:53Ga0:47As (data not shown). This indicates that the
Fig. 1. Cross-sectional TEM image of the as deposited HfO2/n-InAs/ InGaAs stacks.
E-mail address: edc@mail.nctu.edu.tw
Applied Physics Express 5 (2012) 021104
021104-1 # 2012 The Japan Society of Applied Physics DOI:10.1143/APEX.5.021104
HfO2/InAs structure seems to have a better interfacial quality than the HfO2/InGaAs structure. The studies of high-k/InGaAs with various In content were discussed18,19)and it
was believed that the less Ga-related oxide formation with increasing In content would result in the improvement of high-k/InGaAs interfacial quality.7,18,19)
The As 3d and In 3d5=2 XPS spectra of samples with different PDA temperatures were obtained and analyzed as shown in Fig. 2. For XPS measurement, 2 nm MBD HfO2 was deposited on InAs/InGaAs substrates. As shown in the As 3d spectra, the amount of As-related oxides were reduced to below the XPS detection level at the PDA temperature of 500C and above. Meanwhile, the In 3d5=2spectra exhibit a slight increase of the amount of In-related oxides when the PDA temperature was up to 500C. Since the Gibb’s free energies of As2O3 and In2O3 are 137:7 and 198:6 kcal/mol respectively,7)the slight increase of the amount of In-related oxides could be explained by the conversion of As–O bonding to In–O bonding during thermal process. When the PDA temperature was increased to 550C, the As–As bonding and In-related oxides increased significantly, as shown in Fig. 2(d) by the As 3d and In 3d5=2spectra. This indicates that at a PDA temperature of above 500C, the As and In atoms diffused significantly into HfO2. A drastic increase of As–As bonding and In-related oxides was observed when the PDA temperature was up to 600C (data not shown).
MultifrequencyC–V responses of the samples are shown in Fig. 3. The accumulation capacitance decreased as the PDA temperatures increased. It was reported that at the PDA temperature of above 500C, the HfO2/semiconductor interfacial layer would increase with increasing annealing temperature, resulted in the decrease of the accumulation capacitance.20–22) The C–V behaviors show improvement when the PDA temperature is increased from 400 to 500C. The sample annealed at 500C shows goodC–V responses with a small frequency dispersion [see the inset of Fig. 3(c)]
and clear accumulation/depletion/inversion regions. This is consistent with the decrease of As oxides at the HfO2/InAs interface as indicated in the XPS spectra. At the PDA tem-perature of 550C, theC–V behavior degraded as indicated by the increase of frequency dispersion and depleted capacitance [Fig. 3(d)]. This degradation might be related to the significant increase of As–As bonding and In-related oxides.
Figure 4 shows the bidirectionalC–V curves of samples at a frequency of 100 kHz. The values ofC–V hysteresis near the flatband of samples are shown in the Table I. As can be seen from the figure and table, there is remarkable im-provement of theC–V hysteresis, from 810 to 40 mV when the temperatures increased from 400 to 500C. The inset of Fig. 4 and Table I show the negative shift of flat-band voltage with the increase of PDA temperatures from 400 to 500C. The HfO2 oxide was found to contain a large con-centration of defects, especially oxygen vacancies.23)These oxygen vacancies would become negative charges when the gate voltage biased from negative to positive, resulting in high positive band voltage. The negative shift of flat-band voltage indicates the noticeable reduction of oxygen vacancies during annealing process at 500C. The C–V hysteresis was significant increased and the flat-band voltage showed positive shift again when the PDA temperature was up to 550C due to the significant increase of In-related oxides. The interface trap densities Dit of samples with
different PDA temperatures were estimated by the con-ductance method24) and the results are listed in Table I. It shows that the MOS capacitor with the PDA temperature of 500C has the lowest Dit of 2:7 1012cm2eV1 among
all the temperatures studied.
In conclusion, HfO2/n-InAs/InGaAs metal–oxide–semi-conductor capacitors with different postannealing tempera-tures from 400 to 550C were investigated. Much improve-ment in theC–V characteristics was observed for the sample annealed at 500C. When the PDA temperature increased to
Fig. 2. As 3d and In 3d5=2XPS spectra of samples with postdeposition annealing temperature of (a) 400, (b) 450, (c) 500, and (d) 550C in forming gas for 5 min.
H.-D. Trinh et al. Appl. Phys. Express 5 (2012) 021104
550C, there is a degradation of the C–V characteristic of the sample. XPS indicates the reduction of the amount of As2O3 to below the XPS detection level as the PDA
temperature reaches 500C. The As–As bonding and In oxide amounts were significantly increased at the PDA temperature of 550C and above. The lowest interfacial trap density of 2:7 1012eV1cm2 was obtained for the sample annealed at 500C. More studies will be carried out to further improve the MBD HfO2/n-InAs/InGaAs inter-facial quality.
Acknowledgment The authors would like to thank the Ministry of Education and the National Science Council of the Republic of China for supporting this research under contract Nos. 98-2923-E-009-002-MY3 and 100-2120-M-009-010.
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Fig. 4. BidirectionalC–V characteristics of samples measured at a frequency of 100 kHz. The inset of the figure shows the shift of the flat-band voltage with the PDA temperature.
Table I. Comparison ofC–V characteristics of the HfO2/n-InAs capacitors after annealing at different temperatures.
PDA temperature (C) 400 450 500 550 Flatband voltage (V) at 100 kHz 1.65 1.09 0.85 1.45 Hysteresis (V) 0.81 0.18 0.04 0.65 Dit(cm2eV1) 1:02 1013 4:37 1012 2:71 1012 5:33 1012
Fig. 3. MultifrequencyC–V characteristics of HfO2/n-InAs MOS capacitors with different PDA temperatures: (a) 400, (b) 450, (c) 500, and (d) 550C. The insets present the accumulation capacitance,Caccvs measured frequency at a gate bias of 3.5 V.
H.-D. Trinh et al. Appl. Phys. Express 5 (2012) 021104
