Resistive switching characteristics of nickel silicide layer embedded HfO2 film
Debashis Panda, Chun-Yang Huang, and Tseung-Yuen Tseng
Citation: Applied Physics Letters 100, 112901 (2012); doi: 10.1063/1.3694045
View online: http://dx.doi.org/10.1063/1.3694045
View Table of Contents: http://scitation.aip.org/content/aip/journal/apl/100/11?ver=pdfcov Published by the AIP Publishing
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Debashis Panda, Chun-Yang Huang, and Tseung-Yuen Tsenga)
Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 30010, Taiwan
(Received 10 January 2012; accepted 27 February 2012; published online 13 March 2012)
Resistive switching behavior of the Ti/HfO2:NiSi:HfO2/Pt memory structure is investigated. Auger
electron spectroscopy analysis indicates no metal diffusion from the electrodes and silicide layer on high-k film. Cross-sectional transmission electron microscopic micrographs revealed the thicknesses of the HfO2and silicide layer. Significant decrease of forming voltage is observed for
the 550C, 1 min annealed device embedded with nickel silicide (NiSi) layers. Entire device shows bipolar switching properties with very low set/reset voltage. The optimized annealed device with NiSi embedded layer exhibits improved memory performances such as good on/off ratio (>102), long retention more than 104s, and reasonable endurance (>103cycles). A conducting filament model based on two stacks structure is employed to well explain the switching behaviors.VC 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.3694045]
Resistance switching memory (RRAM) has attracted an immense interest for non-volatile semiconductor memory technology and applications,1–7because it has reversible and reproducible resistive switching (RS) characteristics induced by electrical or Joule heating effect.1,2A wide range of mate-rials such as perovskite oxide, ferromagnetic material, transi-tion metal oxides, and chalcogenides have been widely investigated to realize the resistive switching behaviors.1–7 Metal elements or oxygen vacancies are usually considered as the active and indispensable components constituting the conducting filaments. Resistive switching mechanism is the formation and rupture of conductive filaments, caused by an appropriate applied voltage between top and bottom electrodes.1–4 Many previous experiments demonstrate the presence of conducting filaments and the conducting fila-ments’ ruptured position.2–7 However, it still faces severe problems such as the stochastic formation and rupture of the filaments, which causes fluctuation during continuous switching cycles. It is indispensable to hunt for an effectual system to improve the stability of the resistive switching characteristics. For this reason, a few metal-oxide systems has been investigated on various methods such as metal doping,1,2 inserting nanocrystals,6,7 implanting Ti or Au,8,9 and embedding metal layer10 into the oxide, for the forma-tion and improvement of resistive switching by increasing the device yield or narrowing the switching voltage distribution.9–12
In this study, we embedded the nickel silicide (NiSi) layer into hafnium oxide based devices to reduce the varia-tions of memory states, because NiSi has a large work func-tion (work funcfunc-tion5.0–4.7 eV), making low temperature process, device fabrication compatibility, and so on.13 Haf-nium oxide (HfO2) based RRAM devices exhibited excellent
switching characteristics and reliable data retention but showed huge variations in memory states due to higher degrees of random formation and rupture of conducting
fila-ments.14,15 The switching performances and mechanism in the hafnium oxide film are associated with the charged oxy-gen vacancies. At nanometer scale devices, the quantities of oxygen vacancies determine the forming voltage (Vf) and
the switching characteristics, which is a significant issue to be investigated. In addition, we have also studied the physi-cal and resistive switching properties of ultra-thin nickel sili-cide layer embedded hafnium oxide film.
A 10-nm thin HfO2 film was grown using the
Hf[N(C2H5](CH3)]4, so called TEMAH and H2O precursors
at 250C by atomic layer deposition (ALD) on the Pt/Ti/ SiO2/Si substrate. Then, Ni/Si/Ni (0.4 nm/0.8 nm/0.4 nm)
multilayer thin film was deposited on the HfO2 film by
e-beam evaporation with a nominal deposition rate of <0.1 A˚ /s. After the deposition of Ni/Si multi layers, another 10 nm thick HfO2film was deposited on it by the same
pro-cess to form HfO2:NiSi:HfO2 sandwich structure.
Subse-quently, the devices were post metal annealed (PMA) at 400–550C for 1-2 min in N2ambient for silicidation. A Ti/
Pt (50 nm/20 nm) top electrodes (circular diameter: 150 lm) were deposited by e-beam evaporation to form Pt/Ti/HfO2:
NiSi:HfO2/Pt/Ti/SiO2/Si structure for memory device
char-acterization. A 20 nm thick HfO2 control device (without
NiSi layer) was also prepared and annealed under the same conditions as a control sample for comparison. Crystal struc-tures of the films were studied using glancing angle x-ray diffraction (XRD) (Bede D1). Film compositions at different depth were also studied using auger electron spectroscopy (AES) (VG Scientific Microlab 310F). To probe the thick-ness and composition of the layers, cross-sectional transmis-sion electron microscopic (XTEM) observations were performed using JEOL JEM-2010F. The electrical switching characteristics of the fabricated RRAM devices were meas-ured using an Agilent 4155C analyzer.
Typical XRD spectra of the as-deposited and 550C, 1 min annealed NiSi embedded devices are shown in Fig. 1(a). It shows diffraction peaks of (210), (002), (101), (012), (021), (031), (113), and (200), which is partially crystallized HfO2 after annealing. No signature of NiSi phases is
a)Author to whom correspondence should be addressed. Electronic mail:
0003-6951/2012/100(11)/112901/5/$30.00 100, 112901-1 VC2012 American Institute of Physics
observed due to very small thickness (1.5 nm) of silicide layer. There are no metal/semiconductor such as Ti, Ni, Si, and Pt atoms inter-diffusion at high-k HfO2 observed even
after annealing based on the measurement and analysis of the AES spectra, as shown in Fig.1(b). But, intermixing of the NiSi layer is confirmed from the AES spectra. As seen from the inset of Fig.1(b), the oxygen atoms concentration increases after 140 s and again decreases after 190 s com-pared to the spectra of as-deposited film of Fig.1(b), due to the migration of oxygen atoms. It indicates that the forma-tion of interfacial TiOxlayer at Ti/HfO2interface by the
dif-fusion of oxygen atoms from the HfO2 layer to the Ti top
electrode after annealing. These results corroborate the results obtained from the XTEM EDX analysis. Formation and stability of TiO, TiO2, and HfO2 can be explained by
thermo-dynamical consideration using Gibbs free energy. The formation equations of these oxides can be expressed as16
2Tiþ O2! 2TiO; DG01¼ 513:37 kJ=mol; (1) Tiþ O2! TiO2; DG02¼ 883:32 kJ=mol; (2) Hfþ O2! HfO2; DG03¼ 1027:17 kJ=mol: (3) From the Eqs.(1)–(3), it can be observed that the Gibbs free energy (DG0
3) of HfO2 is more negative than those of TiO
and TiO2, signifying that the HfO2is more stable than TiO
or TiO2. This is indicated that the oxygen ions can easily
drift from the quite unstable titanium oxide layer to the HfO2
layer or vice versa depending on the applied electric field, during switching process. For this memory structure, tita-nium oxide acts as an oxygen reservoir. This thermodynamic prediction also fits well with the experimental results. Good interfaces of Pt/HfO2and HfO2/NiSi layers are observed for
the as-deposited and annealed devices [Figs. 1(c)and1(d)]. But, no distinguishable interfacial TiOxand HfOylayers are
identified from the spectra of annealed device as shown in Fig. 1(d). Total active layer thickness (HfO2:NiSi:HfO2) is
found to be 21 nm. The high resolution image of the as-deposited device, inset of Fig.1(c), shows the1.5 nm thick Ni-Si-Ni layer sandwiched between the HfO2 layers. It is
very difficult to find individual interface layers of Ni and Si for the as-deposited devices. This is may be due to the partial intermixing of Ni and Si during top HfO2 deposition at
250C. After annealing at 550C, 1 min, the complete silici-dation with thickness of 1.5 nm is observed [Fig. 1(d)]. Crystallinity of HfO2layer after annealing is detected from
the lattice fringes. The XTEM results corroborate the results obtained from XRD and AES.
A forming process is necessary for this memory struc-ture to initiate the resistive switching behaviour, by which the pristine device is subjected to a high voltage stress induc-ing a soft dielectric breakdown.2–7Fig.2(a)shows the typi-cal I-V forming curve and corresponding reset process of the different annealed NiSi layer embedded HfO2 films. The
forming voltages are decreased with an increase of annealing temperature, as shown in Fig.2(b). A high forming voltage of 8.9 V is required for the as-deposited device and it is decreased significantly to 4.7 V for the optimized 550C, 1 min annealed device. When we increase the annealing time for 2 min, the forming voltage is slightly increased, due to the increased crystallinity of HfO2,
17,18
observed from the XRD spectra [Fig. 1(a)], and change of silicide’s resistiv-ity.19,20 There are negligible change in leakage current dur-ing formdur-ing process, indicates the good uniformity and stoichiometry of the dielectric film [Fig.2(a)]. We consider that this decrease of forming voltage is due to two reasons. First, this improvement is due to the effect of conductive sili-cide layer. Second, the oxygen atoms migrating from HfO2
FIG. 1. (Color online) (a) Typical XRD spectra of the as-deposited and 550C, 1 min annealed NiSi embedded device; (b) AES spectra of the as-deposited de-vice and inset shows the spectra of 550C, 1 min annealed silicide embed-ded device; (c) typical cross-sectional TEM image of as-deposited HfO2based
RRAM device with embedded NiSi layer, inset shows the high resolution view; and (d) XTEM image of the 550C, 1 min annealed device.
to reactive Ti top electrode at high temperature annealing form TiOx layer that deteriorates the dielectric strength of
the buried HfOyfilm. But, we think that the first reason is
more dominant to improve the forming voltage for our devi-ces. At the same PMA temperature, the reduction of forming voltage in silicide layer embedded devices are much better than that in the control devices, due to the reduction of effec-tive thickness by conduceffec-tive nickel silicide layer.
After forming process, typical bipolar I-V hysteresis curves are observed during bias sweeping for the as-deposited and annealed devices with and without NiSi layer embedded structure [Fig.2(c)]. During “set” process, a posi-tive voltage sweep (Vset 0.7 to 1.5 V) with a current
com-pliance of 1 mA triggers the conduction, and the resistance is switched from high resistance state (HRS) to low resistance state (LRS). Afterward, a negative voltage sweep of Vreset
0.7 to 1 V causes abrupt decrease of current and the device is switched back to HRS (denoted as “reset” process). The polarity dependence of “set” and “reset” transition indi-cates bipolar RS characteristics. Significant changes on the whole switching parameters are observed on various annealed devices with NiSi layers, after testing at several switching cycles. The silicide layer embedded devices annealed at 550C, 1 min shows superior properties com-pared to others in terms of forming voltage, “set/reset” volt-age, endurance and resistance ratio between two resistance states. The NiSi layer embedded device with a longer anneal-ing time shows poor switchanneal-ing properties than the optimized one. This is due to the formation of high resistive di-silicide phase and good crystallinity of HfO2film. It was reported
that the annealing temperature and time affect significantly the resistivity of silicides.19,20On the other hand, the devices annealed at lower temperature also show good LRS to HRS ratio, small “set/reset” voltage, but poor cycling. This is due to the incomplete silicidation at lower annealing
tempera-ture. As observed from the inset of Fig.2(b), the “reset” vol-tages for all devices are almost the same, but the “set” voltages are increased slightly. Though the oxide thicknesses of all devices are almost identical and the switching mecha-nism during “set” process attributed by the filament forma-tion. Furthermore, “set” voltages are increased rapidly from 1 to 2.6 V for the control devices (without NiSi embedded layer)) after annealing (not shown here). The increase of “set” voltage after annealing can be explained by the crystal-lization of HfOy dielectrics. Switching parameters also
depend on the interfacial TiOxlayer thickness at the Ti/HfO2
interface. The thickness of this oxygen reservoir increases with the increase of annealing temperature and time. Slight decrease of “set/reset” voltages of the silicide layer embed-ded device after 550C, 1 min annealing is due to the effect of crystallinity of silicide layer and higher TiOxlayer
thick-ness, which will be discussed briefly later. “Set” and “reset” voltages of the optimized 550C, 1 min annealed silicide embedded devices are 1.1 V and0.6 V, respectively. Statis-tical distributions of “forming”, “set” and “reset” voltages of the 550C, 1 min annealed silicide embedded devices are shown in the inset of Fig.2(c).
Switching mechanism of high-k oxide based resistive switching memory devices is based on the formation and rupture of polarity dependent percolated conduction chan-nels, known as filaments, formed by oxygen vacancies in ox-ide films, which leads to the formation of a robust but reversible conducting pathway.1–15 A thin conducting sili-cide layer between the HfO2 dielectric films initiate to
for-mation and rupture of the conducting filaments by enhancing local electric field and reducing the effective HfO2
thick-ness.21 High compliance current of 1 mA is used during forming process to avoid the current overshoot issue for high quality oxide film, such as ALD grown HfO2film.
8,22
When a positive bias larger than threshold voltage is applied, the FIG. 2. (Color online) (a) Typical form-ing curve and correspondform-ing “reset” curve of as-deposited, 400C and 550C, 1 min annealed Ti/HfO2:NiSi:HfO2/Pt
devices; (b) variation of forming voltage of the different devices annealed at dif-ferent temperature and time, inset shows the variations of “set/reset” voltages; (c) I-V switching characteristics of those devices, inset shows weibull distributions of forming, set and reset voltages of 550C, 1 min annealed NiSi embedded devices; (d) schematic description of switching mechanism (i) set and (ii) reset processes.
device is switched from HRS to LRS, i.e., ON state, by mak-ing a conductmak-ing path in HfO2. In binary oxide based
RRAM, the existence of oxygen ions and/or oxygen vacan-cies would play a significant role in resistive switching, lead-ing to reduction and oxidization of conductlead-ing filaments. Formation and rupture of the filaments always occur at anode interface. Usually Ti is an oxygen gettering metal, and it is easily formed an ultrathin TiOxlayer at the interface. Ti top
electrode can modify the oxygen contents, oxygen vacancies, oxygen ions, and oxygen-related defects distributions at HfO2 films and further causes the formation of both TiOx
and oxygen deficient HfOy layers. The formation of TiOx
layer at the interface is detected from the AES spectra (Fig. 1(b)). The thickness of this TiOx layer is increased or
decreased during voltage sweeping to make volatile thick or thin TiOxlayer.
Switching mechanism of the silicide layer embedded devices is shown schematically in Fig. 2(d). We consider that there are two RRAM stacks, stack 1 is the Ti/HfO2/NiSi
and stack 2 is NiSi/HfO2/Pt, which are separated by the
sili-cide layer. As seen from the TEM image (Fig.1(d)), the sili-cide thickness is not homogeneous. At some places it is percolated or agglomerated and little thicker. After forming process, the localized conduction filament consisting of oxy-gen vacancies is formed between top and bottom electrode through the agglomerated and thicker part of the intermedi-ate conducting NiSi layer because of local electric field enhancement and the device is switched to LRS [(i) of Fig. 2(d)]. After applying negative voltage equal to or more than reset voltage on top electrode, the oxygen ions are drifted to stack 1 from the interfacial oxygen reservoir (TiOx) to
reox-idize the conducting filament completely at stack 1 by local Joule heating effect and the device is switched back to HRS [(ii) of Fig.2(d)]. Here, the conducting filaments below the metallic silicide layer are expected to remain unaffected, since the oxygen ions cannot pass through the electronic con-ductor silicide and drift to stack 2.21A high voltage (4.7 V) is required during forming process due to the formation of filament between two electrodes. But, during “set” process only filament is formed at stack 1 only, as a result lower volt-age (0.8 V) is required. It was shown in Fig. 2(b) that at higher annealing time the forming voltage and “set” voltages are increased because the conductivity of the silicide layers decreases.
Nickel silicide layer embedded HfO2 devices exhibit
good reliabilities. Figure 3(a) shows the comparison of
en-durance properties of the control devices without embedded NiSi layer and the 550C, 1 min annealed NiSi layer embed-ded devices up to first successive 100 cycles. As seen from the figure, the NiSi layer embedded devices show much more stable cycling properties at the both resistance states than those without NiSi layers. The resistance ratio is decreased and finally two resistance states are overlapped before 100 cycles for the control devices only. This indicates the improvement of endurance properties due to the effect of intermediate silicide layer. Endurance of the optimized NiSi embedded devices is exceeded 2 103cycles, as shown in Fig. 3(b). Currents at HRS and LRS are increased from 7.9 lA to 20 lA and decreases from 99 mA to 2 mA, with an increase of cycling number, respectively. Gradual decreasing of the resistance ratio during cycling is due to the degrada-tion of LRS current, which comes from the non-ideal current compliance nature of the analyzer system.4This problem can be resolved completely by using a good current limiter from the memory circuit.4Retention properties of those with and without silicide embedded devices annealed at 550C, 1 min are examined for more than 104s, at 0.1 V, as shown in Fig. 4. Both the devices show no sign of any degradation in reten-tion lifetime.
In conclusion, the NiSi layer embedded in ALD grown HfO2resistive switching memory structure showed superior
resistive switching characteristics suitable for nonvolatile memory devices. Crystal structure, compositional profiles at FIG. 3. (Color online) (a) Comparison of endurance properties of 550C, 1 min annealed NiSi embedded device with control device and (b) typical long term endurance data of the optimized NiSi embedded device.
FIG. 4. (Color online) Typical retention characteristics of 550C, 1 min annealed NiSi embedded and without NiSi embedded devices.
have been observed for all the devices. Forming and “set” voltages of the NiSi layer embedded devices are notably decreased after annealing at 550C, 1 min. The effect of Ti top electrode and NiSi layer on switching mechanism has been investigated. Good resistance ratio, long retention time up to 104s and acceptable endurance more than 103cycles are observed for the optimized annealed device with NiSi embedded layer. Therefore, the Ti/HfO2:NiSi:HfO2/Pt
sand-wich structure has high potential for practical nonvolatile memory applications.
This work is supported by National Science Council, Taiwan under Grant Nos. NSC-100-2811-E-009-026 and NSC-99-2221-E-009-166-MY3.
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