針對三種低密度位元檢測碼與BCH 碼的串接系統之理論探討

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針對三種低密度位元檢測碼與 BCH 碼的串接系統之理論探討

A Theoretic Study on Three Low-Density Parity-Check and BCH Concatenated

Coding Schemes

研 究 生：黃柏元

指導教授：陳伯寧 教授

針對三種低密度位元檢測碼與 BCH 碼的串接系統之理論探討

A Theoretic Study on Three Low-Density Parity-Check and BCH Concatenated

Coding Schemes

研 究 生：黃柏元 Student：Po-Yuan Huang

指導教授：陳伯寧 Advisor：Po-Ning Chen

國 立 交 通 大 學

電信工程研究所

碩 士 論 文

Submitted to Institute of Computer and Information Science College of Electrical Engineering and Computer Science

National Chiao Tung University in partial Fulfillment of the Requirements

for the Degree of Master

in

Computer and Information Science

July 2012

Hsinchu, Taiwan, Republic of China

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A Theoretic Study on Three Low-Density

Parity-Check and BCH Concatenated Coding Schemes

Student: Po-Yuan Huang kkkAdvisor: Po-Ning Chen Institute of Communications Engineering

National Chiao Tung University

Abstract

Bose-Chaudhuri-Hocquenghem (BCH) codes have been widely used in flash memories for many years. Yet, in future “high-density” multi-level cell (MLC) flash memories, the raw bit-error-rate (BER) in NAND flash may increase up to around 10−2 at its life time, and hence the conventional hard-decision ECC, such as BCH codes, is no longer sufficient for these memories. Hence, the low-density parity-check (LDPC) codes, as a class of powerful ECCs, become an important candidate for future MLC memories.

One of the most significant impediments to the use of LDPC codes in future MLC flash memories is the error floor phenomenon associated with the iterative decoding. So in this thesis, we wish to realize whether the concatenated coding scheme of LDPC codes and BCH codes can eliminate or improve the error floor phenomenon of the LDPC code or not. We thus analyze in this thesis three BCH and LDPC concatenated coding schemes: (1) a single BCH code concatenates with multiple LDPC codes; (2) multiple BCH codes concatenate with a single LDPC code; (3) multiple BCH codes concatenate with multiple LDPC codes. Our analysis shows that the concatenation of the two codes can effectively lower the error floor of the LDPC-only code system at the price of a small rate loss.

Acknowledgements

Time flies. The career of chasing the master degree is coming to an end. In these two years, I have encountered many frustrations in my research and also in the process of study. I would like to express my gratitude to my advisor, Professor Po-Ning Chen. This thesis would not be possible without his patience in guidance. In addition, to Professor Chung-Hsuan Wang, I deeply appreciate for his severe but useful instructions in research. Besides, to Dr. Chasel Weng, I am so thankful for your unselfish dedication in my research.

I would also like to thank all the members in the NTL lab for their friendship in the past two years. Finally, I would like to dedicate this thesis to my family, who always provide me with love and spiritual support.

Contents

2 Preliminaries 5

2.1 Three Concatenated BCH and LDPC Coding

Schemes . . . 5 2.2 LDPC Codes . . . 8 2.2.1 The Sum-Product Algorithm . . . 9

2.2.2 Error Floor Phenomenon of LDPC codes due to the SPA . . . 11

2.3 BCH Codes . . . 11

2.3.1 Decoding the BCH Codes . . . 12

3 Analysis of the BER performance of Three Concatenated Coding Schemes 16 3.1 Analysis of the BER performance of the SBC-MLC Coding Scheme . . . 16

3.2 Analysis of the BER performance of the MBC-SLC Coding Scheme . . . 18

3.2.1 Selection of the BCH Code in the MBC-SLC Scheme . . . 21

3.3 Analysis of the BER performance of the MBC-MLC Coding Scheme . . . 22

4 Numerical and Simulation Results 24 4.1 Examination of the Accuracy of the Formulas of the three BCH and LDPC Concatenated Coding Schemes . . . 24

4.2 Comparisons of Different BCH Codes in the MBC-SLC Scheme . . . 37 5 Conclusion and Future Work 42

List of Figures

2.1 Structure of the SBC-MLC coding scheme . . . 7 2.2 Structure of the MBC-SLC coding scheme . . . 8 2.3 Structure of the MBC-MLC coding scheme . . . 9 4.1 Simulated and calculated BER performances of the SBC-MLC scheme

consist-ing of one (16383, 16313, 5) BCH code and two QC(9180,8425) LDPC codes. Also shown is the performance of the LDPC code. . . 28 4.2 Simulated and calculated BER performances of the SBC-MLC scheme

con-sisting of one (4095, 4047, 4) BCH code and two QC(2286,1914) LDPC codes. Also shown is the performance of the LDPC code. . . 29 4.3 Simulated and calculated BER performances of the SBC-MLC scheme

con-sisting of one (8191, 8139, 4) BCH code and two QC(4590,3835) LDPC codes. Also shown is the performance of the LDPC code. . . 30 4.4 Simulated and calculated BER performances of the MBC-SLC scheme

con-sisting of two (4095, 4059, 3) BCH codes and one QC(9180,8425) LDPC code. Also shown is the performance of the LDPC code. . . 32

4.5 Simulated and calculated BER performances of the MBC-SLC scheme con-sisting of three (511,484,3) BCH codes and one QC(2286,1914) LDPC code. Also shown is the performance of the LDPC code. . . 33 4.6 Simulated and calculated BER performances of the MBC-SLC scheme

con-sisting of seven (511,493, 2) BCH codes and one QC(4590,3835) LDPC code. Also shown is the performance of the LDPC code. . . 34 4.7 Simulated and calculated BER performances of the MBC-SLC scheme

con-sisting of eight (511,483, 3) BCH codes and two QC(2286,1914) LDPC code. Also shown is the performance of the LDPC code. . . 36 4.8 Calculated BER performances of the MBC-SLC scheme for the QC(2286,1914)

LDPC code concatenated with different BCH codes. Also shown is the per-formance of the LDPC code. . . 38 4.9 Simulated BER performances of the MBC-SLC scheme for the QC(2286,1914)

LDPC code concatenated with different BCH codes. Also shown is the per-formance of the LDPC code. . . 39 4.10 Calculated BER performances of the MBC-SLC scheme for the QC(4590,3835)

LDPC code concatenated with different BCH codes. Also shown is the per-formance of the LDPC code. . . 40 4.11 Simulated BER performances of the MBC-SLC scheme for the QC(4590,3835)

LDPC code concatenated with different BCH codes. Also shown is the per-formance of the LDPC code. . . 41

5.1 Comparison of calculated performances of the MBC-SLC scheme and the SBC-MLC scheme subject to the same system code rate. The red line corre-sponds to a concatenated system consisting of eight (255,239,2) BCH codes and a QC(2286,1914) LDPC code. The black line corresponds to a concate-nated system consisting of four (511,484,3) BCH codes and a QC(2286,1914) LDPC code. The pink line corresponds to a concatenated system consisting of two (1023,973,5) BCH codes and a QC(2286,1914) LDPC code. The red line with star marks corresponds to a concatenated system consisting of a (4095,3879,18) BCH code and two QC(2286,1914) LDPC codes. . . 43 5.2 Comparison of calculated performances of the MBC-SLC scheme and the

SBC-MLC scheme subject to the same system code rate. The black line corresponds to a concatenated system consisting of four (1023,1003,2) BCH codes and a QC(4590,3835) LDPC code. The pink line corresponds to a concatenated sys-tem consisting of two (2047,2003,4) BCH codes and a QC(4590,3835) LDPC code. The red line corresponds to a concatenated system consisting of a (8191,7996,15) BCH code and two QC(4590,3835) LDPC codes. . . 44

Chapter 1

Introduction

1.1

Overview

The flash memory is one of the fastest growing semiconductor components due to the in-creasing demand for non-volatile data storage in various digital equipments. Like other data storage technologies, the flash memory has to use error correcting codes (ECCs) to ensure the integrity of the stored data.

Bose-Chaudhuri-Hocquenghem (BCH) codes are one of the most powerful codes that are widely used in flash memories. The codes have many benefits that make them very suitable for flash memories, such as having a large minimum distance and supporting a wide range of error correcting capability. Also, by its cyclic structure, there are quite a lot fast encoding and decoding algorithms having been proposed by researchers. Among them, BCH codes with classical hard-decision decoding algorithms [3] are being widely used in current design. In order to improve the storage density and reduce the bit cost of NAND flash memory, a technique called Multi-Level Cell (MLC) is used in flash memories. Although BCH codes have been found many advantages specially suitable for the Multi-Level Cell (MLC) NAND flash memories [1][2], the storage reliability of NAND flash memory inevitably degrades when an aggressive use of MLC storage is pursued. This makes BCH codes inadequate for this

purpose, and hence the industry naturally demands the search for more powerful ECCs (e.g., see [4]).

The low-density parity-check (LDPC) code [5] is a class of powerful error control codes which has been found having the potential in future solid-state drives (SSDs). Although the LDPC code has a remarkable performance near Shannon capacity by the sum-product decoding algorithm (SPA), it has an obvious drawback called error floor [6] that prevents it from being used in the flash memory. Owing to this error floor phenomenon, the LDPC code is unable to reach very low bit error rates even at very low signal-to-noise ratios (SNRs).

It is known that the error floors of LDPC codes are perhaps a consequence of a certain number of bit errors circulated in the iterative decoding; so a natural solution to lower the floor is to concatenate the LDPC code with an outer algebraic code to clean up the residual systematic errors. This concatenated scheme, i.e., the concatenation of outer codes with inner LDPC codes, has been studied in many proposals of flash memories. Along this research line, some researchers further consider that if systematic outer codes and systematic inner codes are used, an extra advantage can be rendered. That is, if the magnetic recording read channel is good, the received sequence can be decoded only by the outer code decoders; so the decoding complexity is equal to that of the outer code decoder; however if the magnetic recording read channel is poor, then the inner code decoder can be activated to provide additional error correcting capability for the system.

At this background, we consider in this thesis the concatenated scheme of BCH and LDPC codes. It is hoped that the BCH and LDPC concatenated coding scheme can im-prove the error floor effectively. Note that considering the reduced complexity of hardware implementation, Quasi-Cyclic (QC) LDPC codes that are formed by circulant permutation matrices are adopted.

simu-lations, we try to analyze the performances of the concatenated schemes. Three scenarios of concatenated coding schemes are considered: (1) a single BCH code concatenates with multiple LDPC codes (SBC-MLC) [8]; (2) multiple BCH codes concatenate with a single LDPC code (MBC-SLC) [9] and (3) multiple BCH codes concatenate with multiple LDPC codes (MBC-MLC). The selection of an appropriate BCH code for a given LDPC code is also discussed in Chapter 3.

The remainder of this thesis is organized as follows. Chapter 2 introduces the details of the three BCH and LDPC concatenated coding schemes. Also introduced are the decoding of LDPC codes and the error floor phenomenon due to the sum-product algorithm. Chapter 3 derives the approximation formulas of the bit-error-rates (BERs) of the three BCH and LDPC concatenated coding schemes. Discussion regarding whether these schemes can improve the error floor or not will follow. Chapter 4 provides numerical and simulation results, demonstrating the accuracy of the BER formulas derived in Chapter 3. Conclusions are drawn in Chapter 5.

1.2

Acronyms and Notations

The acronyms and some common identifiers used in this thesis are listed as follows. AWGN additive white Gaussian noise

BEC binary erasure channel BSC binary symmetric channel BPSK binary phase shift keying BER bit error rate

SPA sum-product algorithm SNR signal-to-noise ratio

MBC-SLC multiple BCH code concatenates with a single LDPC codes MBC-MLC multiple BCH code concatenates with multiple LDPC codes NBCH block length of a BCH code, i.e., the number of bits in a BCH codeword

KBCH number of information bits corresponding to a BCH codeword

NLDPC block length of a LDPC code, i.e., the number of bits in an LDPC codeword

KLDPC number of information bits corresponding to a LDPC codeword

The following notations are used in this thesis. Symbol Meaning

v a vector (The following notations are simple representative examples.

Similar notations applies to other alphabets.)

vk the k-th component of a vector

H a matrix

XT _{the matrix transpose operation}

Chapter 2

Preliminaries

In this chapter, some background knowledge required for this research is provided.

Specifically, Section 2.1 introduces three encoder and decoder structures of concatenated BCH and LDPC coding schemes considered in this thesis. Section 2.2 gives a brief intro-duction of the LDPC codes and the error floor phenomenon of the sum-product algorithm (SPA). Section 2.3 talks about the decoding method of BCH codes, which will be used for decoding the concatenated code in Chapter 3.

2.1

Three Concatenated BCH and LDPC Coding

Schemes

In this section, we introduce three concatenated coding schemes: (1) a single BCH code concatenates multiple LDPC codes (SBC-MLC); (2) multiple BCH codes concatenate a single LDPC code SLC); (3) multiple BCH codes concatenates multiple LDPC codes (MBC-MLC).

For these three concatenated schemes, the coded bits are modulated by the BPSK mod-ulation and transmitted over AWGN channels. The received signal at time i is represented

as:

yi = xi+ ni, ∀ 1 ≤ i ≤ N

where xi ∈ {±1} is the modulated symbol, ni denotes a Gaussian noise with mean zero

and variance σ2_{, and y}

i is the received signal. In the above formula, N is the length of

the transmitted sequence, which may be different for different concatenated schemes. The details for these three concatenated schemes are given as follows.

Scheme 1: SBC-MLC

In the SBC-MLC scheme depicted in Figure 2.1, kBCH information bits are first fed into a

BCH code encoder to generate a length-nBCH BCH codeword. The BCH codeword is then

partitioned into β equal-sized blocks. Each is of size kLDPC. Afterwards, these β blocks are

encoded by the inner LDPC code encoder to produce β LDPC code codewords of length nLDPC. In the end, all bits of LDPC codewords are BPSK-modulated and transmitted

through the AWGN channel. Thus, N here is equal to β · nLDPC.

The decoding process reverses the encoding process. Specifically, the received sequence are first decoded by β LDPC code decoders. Then the hard decision outputs are fed into the BCH decoder, outputting the hard-decision result.

The code rate of this scheme is kBCH/(β · nLDPC).

Scheme 2: MBC-SLC

Similar to the encoding process of Scheme 1, the MBC-SLC scheme first divides βkBCH bits

into β groups of equal size and separately sends each of them to its respective BCH code encoder as shown in Figure 2.2. These β BCH codewords are aggregated into a vector as the information bits of the LDPC code encoder. Then, the LDPC code encoder generates an LDPC codeword of length nLDPC. Afterwards, all bits of the LDPC codeword are modulated

Figure 2.1: Structure of the SBC-MLC coding scheme

and transmitted through the AWGN channel. Here, N represents the length nLDPC. The

decoding process is also the reverse of the encoding process. The received sequence will be first decoded by the LDPC code decoder, and the resulting hard decision outputs are fed into β BCH decoders to result in the estimates of the original information bits.

The code rate of this scheme is (β · kBCH)/nLDPC.

Scheme 3: MBC-MLC

As shown in Figure 2.3, the MBC-MLC scheme is the concatenation of β BCH codes and γ LDPC codes. In this scheme, βkBCH information bits are first encoded by β identical BCH

code encoders. The resulting β BCH codewords are partitioned into γ equal-sized blocks, each of which is of size kLDPC. Then, these γ blocks are encoded by γ LDPC code encoders

Figure 2.2: Structure of the MBC-SLC coding scheme

are modulated and sent over the AWGN channel. Here, N is thus γ · nLDPC. The decoding

process is the reverse of the encoding process. The received sequence is first decoded by γ LDPC code decoders. Then the hard decision outputs are fed into β BCH decoders, which output the hard decision results.

The code rate of this scheme is (β · kBCH)/(γ · nLDPC).

2.2

LDPC Codes

Low-density parity-check (LDPC) codes are well known for their capacity approaching ability in AWGN channels. Here “low-density” refers to the sparsity of the parity-check matrix that characterizes the code. Each parity-check equation checks only few message bits, and each message bit is involved in only few parity-check equations. A delicate balance exists in

Figure 2.3: Structure of the MBC-MLC coding scheme

the construction of appropriate parity-check matrix, since an excessive sparsity leads to a uselessly weak code. The key to extracting maximal benefit from LDPC codes is to use soft decision decoding that can be utilized by iterative decoding.

In Section 2.2.1, we present the soft-decision iterative decoding algorithm for LDPC codes, known as the sum-product algorithm (SPA). The error floor phenomenon caused by the SPA is then introduced in Section 2.2.2.

2.2.1

The Sum-Product Algorithm

Denote by H the parity-check matrix of a QC LDPC code. The Tanner graph corresponding to H contains nLDPC variable nodes and nLDPC− kLDPC check nodes.

the Tanner graph. Similarly, let cj and N (j) be the jth check node and the set of variable

nodes connecting to cj, respectively. Define Li,j as the extrinsic information passed from

vi to cj , and also define Ei,j as the extrinsic information passed from cj to vi. The sum

product algorithm for LDPC codes can be described in the following steps. The Sum-Product Algorithm

Step 1. Initialization: The initial message sent from variable node vi to check node cj is

the LLR of the received signal yi. Hence,

Li,j = Ri ,

2yi

σ2 and Ei,j = 0, ∀ 1 ≤ i ≤ nLDPC, 1 ≤ j ≤ nLDPC− kLDPC

Step 2. Check-to-Bit Update: The extrinsic message from check node cj to variable node

(or equivalently, bit node) vi is the probability that the parity check equation

corre-sponding to vj is satisfied if bit node vi is assumed to be a 1, i.e.,

Ei,j = ln

 

1 +Q_i′_{∈N (j),i}′_6=itanh

_L

i′ ,j

2

 1 −Q_i′_{∈N (j),i}′_6=itanh

L i′ ,j 2    ∀ i ∈ N (j) and ∀ 1 ≤ j ≤ nLDPC− kLDPC.

Step 3. Codeword test: The combined LLR Li is the sum of the extrinsic LLRs and the

original LLR calculated in Step 1, i.e.,

Li ,

X

j∈M(i)

Ei,j+ Ri, ∀ 1 ≤ i ≤ nLDPC (2.1)

Denote by z = [z1, z2, · · · , znLDPC] the temporary decoded result. Assign its values as:

zi =    1, if Li ≤ 0 0, if Li > 0 , ∀ 1 ≤ i ≤ nLDPC

If HzT _{= 0, or the maximum number of iterations allowable is reached, stop the}

Step 4. Bit-to-Check Update: Similar to (2.1), the message sent by each bit node to its neighboring check nodes is given by:

Li,j =

X

j′∈M(i),j′_6=j

E_i,j′ + R_i, ∀ 1 ≤ i ≤ nLDPC and ∀ j ∈ M(i). Go to Step 2.

2.2.2

Error Floor Phenomenon of LDPC codes due to the SPA

The so-called error floor phenomenon of LDPC codes due to the SPA can be characterized as an abrupt decrease in the absolute value of the slope of the code’s bit-error-rate (BER) curve (in log-log scale) from the water-fall region to the floor region. It is known that this error floor phenomenon is mainly caused by the trapping sets in the decoding Tanner graph. An (a, b) trapping set is a set of a variable nodes that induces a subgraph containing b odd-degree check nodes and an arbitrary number of even-degree check nodes. When both a and b are relatively small, errors in these a variable nodes would easily fail b parity check equations, and trap in an error event that iterative decoder cannot escape. So an important design target for LDPC codes is to clean up the residual errors induced by trapping sets parameterized by small a and b.

2.3

BCH Codes

The Bose, Chaudhuri and Hocquenghem (BCH) codes fors a large class of powerful random error correcting cyclic codes. This class of codes is a remarkable generalization of Hamming codes for multiple error correction. In short, there are two types of BCH codes: binary BCH codes and nonbinary BCH codes. Binary BCH codes are restricted to length 2m _{− 1 for}

some integer m. On the other hand, among the nonbinary BCH codes, the most important subclass is the Reed-Solomon (RS) codes.

In this research, we focus only on binary BCH codes. There are many decoding algo-rithms proposed for binary BCH codes. Among them, the Berlekamp’s iterative algorithm and Chien’s search algorithm are perhaps two most efficient ones. In this section, we will introduce the decoding procedure of the BCH codes.

2.3.1

Decoding the BCH Codes

For any integer m ≥ 3 and t < 2m−1_{, a binary BCH code can be characterized by the}

following parameters:

Block length: nBCH= 2m− 1,

Number of parity-check digits: nBCH− kBCH ≤ mt,

Largest minimum pairwise Hamming distance: dmin ≥ 2t + 1.

From the parameters above, this code can correct t or fewer random errors over a span of 2m_{− 1 bit positions. Clearly, this code is a t-error-correcting BCH code.}

Consider a BCH code with nBCH = 2m− 1 and generator polynomial g(x). Suppose a

code polynomial c(x) = c0+ c1x + · · · + cn−1xn−1 is transmitted. Let

r(x) = r0+ r1x + · · · + rn−1xn−1

be the received polynomial and α be a primitive element in GF (2m_{). Then}

r(x) = c(x) + e(x),

where e(x) is the error polynomial. To check whether r(x) is a code polynomial or not, we simply test whether r(α) = r(α2_{) = · · · = r(α}2t_{) = 0. If the answer is affirmative, then r(x)}

is a code polynomial; otherwise, r(x) is not a code polynomial and the presence of errors is detected.

There are three major steps in the decoding procedure:

1. Compute the syndrome s = (s1, s2, · · · , s2t) from the received polynomial r(x).

2. Determine the error-locator polynomial σ(z) from the syndrome s, where σ(z) will be defined later.

3. Use the error-location numbers Z₁−1, Z₂−1, · · · , Z−1

ν to find the roots of σ(z) and correct

the errors in r(x).

As aforementioned, the first step is to compute the syndrome from the received vector r(x). For a t-error-correcting primitive BCH code, the syndrome consists of 2t components in GF (2m_{) :}

s= (s1, s2, · · · , s2t)

where si = r(αi) for 1 ≤ i ≤ 2t. Let φi(x) be the minimal polynomial of αi. Dividing r(x)

by φi(x), we obtain r(x) = a(x)φi(x) + b(x), where b(x) is the remainder with degree less

than that of φi(x). Because φi(αi) = 0, we have

si = r(αi) = b(αi).

Thus, the syndrome component si can be obtained by evaluating b(x) with x = αi. Since

r(x) = c(x) + e(x), we obtain

si = r(ai) = c(ai) + e(ai) = e(ai) (2.2)

for 1 ≤ i ≤ 2t. This gives a relationship between the syndrome and the error pattern. Suppose e(x) has ν errors (ν ≤ t) at locations xj1_{, x}j2_{, · · · , x}jν_{, i.e.}

e(x) = xj1

+ xj2

where 0 ≤ j1 < j2 < · · · < jν < n. From (2.2) and (2.3), we deduce: s1 = αj1 + αj2 + · · · + (αjν)2 s2 = (αj1)2+ (αj2)2+ · · · + (αjν)2 s3 = (αj1)3+ (αj2)3+ · · · + (αjν)3 (2.4) ... s2t = (αj1)2t+ (αj2)2t+ · · · + (αjν)2t,

where αj1_{, α}j2_{, · · · , α}jν _{are unknown. Apparently, any method that can solve the above}

equations is a decoding algorithm for the BCH codes. The unknown parameter αju _{= Z}

u for

u = 1, 2, · · · , ν are generally called the “error location numbe.” When αju _{is found, where}

1 ≤ u ≤ ν, the exponent ju gives us exactly the error location in e(x). Suppose that ν ≤ t

errors actually occur. Define error-locator polynomial σ(z) as σ(z) = (1 + Z1z)(1 + Z2z) · · · (1 + Zνz) = ν Y i=1 (1 + Ziz) (2.5) = σ0+ σ1z + σ2z2+ · · · + σνzν

where for convenience we let σ0 = 1. From (2.5), σ(z) has Z1−1, Z2−1, · · · , Zν−1 as roots. We

then note that Zu = αju. There are many algorithms in the literature to determine σ(z)

from syndrome s = (s1, s2, · · · , s2t). Note again that if we get σ(z), the roots of σ(z) give

us exactly the error-location numbers. However, if e(x) has errors more than t, BCH code decoder will probably output a wrong BCH codeword. In Chapter 3, we will denote this probability by Pe.

In this thesis, the BCH codes are decoded by the Berlekamp algorithm. Because the Berlekamp algorithm is basically a bounded distance decoder, the sequence can be decoded to a valid codeword as long as this sequence lies in a codeword sphere of radius t. If a sequence

with i errors is sent to a BCH decoder, and if the BCH decoder decodes it to a valid but wrong codeword, and also if the t positions of reversed bits caused by the BCH decoder are different from the positions of these i errors, the number of errors in this codeword is as large as t + i. This information will be used in Chapter 3.

Chapter 3

Analysis of the BER performance of

Three Concatenated Coding Schemes

In order to analyze whether the three coding schemes can improve the error floor phe-nomenon, we assume that the error number distribution {Pi, ∀ 1 6 i 6 kLDPC} is known,

where Pi is the probability that i errors occur after the decoding of the LDPC code.

Al-though our analysis can be applied to the waterfall region, we mainly focus on the BER improvement in the error floor region. Since the BER decays very slow in the error floor region, it may be reasonable to assume that the error number distribution is almost the same in this region. We then have following results.

3.1

Analysis of the BER performance of the SBC-MLC

Coding Scheme

In this scheme, the average BER performance of the information bits for β LDPC codes can be formulated as: I_BER,LDPC(β) = Pβ·kLDPC i=1 i · S (β) i β · kLDPC , (3.1)

where S_i(β)= X x1,x2,...,xβ x1+···+xβ=i 06x1,x2,...,xβ6kLDPC Px1· · · Pxβ

expresses the probability that the sum of errors observed at the outputs of β LDPC code decoders is equal to i, and xm denotes the number of errors in the m-th LDPC code block.

Based on the error correcting capability of the BCH decoder, (3.1) can be separated into two parts, i.e.,

I_BER,LDPC(β) = Pt i=1i · S (β) i nBCH | {z } (3.2a) + PnBCH i=t+1i · S (β) i nBCH | {z } (3.2b) , (3.2) where nBCH = β · kLDPC, and t is the maximum number of correctable errors of the BCH

code decoder.

After the decoding of the BCH code, (3.2a) can be removed because the number of errors is no greater than t. However, since the number of errors in (3.2b) is larger than t, there will be a probability Pe to decode to a valid but wrong codeword. As a result, the overall BER

for the concatenated coding scheme can be upper-bounded by: IBER,SBC-MLC 6

PnBCH

i=t+1(Pe· (t + i) + (1 − Pe) · i) · Si(β)

nBCH

. (3.3) Note that because the number of errors occurred in a wrong BCH codeword is unknown, this error number is assumed to be its maximum value t + i in the above formula when the input sequence has i errors.

To know that whether this scheme can improve the error floor or not, we must related the above coded BER bound with I_BER,LDPC(β) . We then compare the BERs before and after applying the BCH codes. The difference can be written as:

I_BER,LDPC(β) − IBER,SBC-MLC≥ Pt i=1i · S (β) i nBCH − PnBCH i=t+1(Pe· t) · Si(β) nBCH . (3.4) From (3.4), we note that the selection of parameter t is important. This parameter, for example, will decide whether the second term in (3.4) is dominant or not. Apparently, a

larger t seems preferred. However, a larger t will also cause a larger code rate loss. If the code rate loss can be maintained in an acceptable range by selecting a proper t, then the second term in (3.4) can be neglected. We can then estimate the system BER IBER,SBC-MLC

of the SBC-MLC coding scheme as:

IBER,SBC-MLC≈ IBER,LDPC(β) − Pt i=1i · S (β) i nBCH . (3.5) Then, the error floor can be improved by this scheme. However, if a proper value of t cannot be chosen, the approximation in (3.5) may be inaccurate. The rate loss might compensate the error-correcting effort of the outer BCH code and hence the resulting improvement in error performance is less predictable.

3.2

Analysis of the BER performance of the MBC-SLC

Coding Scheme

In this scheme, the average BER performance of the LDPC code decoding can be simplified to: IBER,LDPC = PkLDPC i=1 Pi· i kLDPC , (3.6)

By targeting the average BER performance for this concatenated scheme, a uniform inter-leaved is assumed to be applied onto the LDPC code decoding outputs. In other words, if i errors occur at the output of LDPC code decoder, they will be distributed uniformly to the β BCH code decoders. Based on this assumption, we can re-write (3.6) as

IBER,LDPC= PkLDPC i=1 Pi· i ·Pw∈J M(w, i) kLDPC , (3.7) where J , ( (x1, x2, · · · , xβ); β X ℓ=1 xℓ = i, 0 6 xℓ 6 nBCH ) ,

w= (x1, x2, · · · , xβ) is an error combination from set J , and M(w, i) = nBCH x1
nBCH x2
· · · nBCH xβ
kLDPC i
. Note that Pw∈J M(w, i) = 1. We then observe that

i · X w∈J M(w, i) = X w∈J i · M(w, i) = X w∈J β X n=1 xn ! M(w, i) and separate the inner summation in (3.7) into two parts:

β X n=1 xn = X n∈Iw xn+ X n∈Iw xn where Iw , {ℓ; 0 6 xℓ 6 t, 1 6 ℓ 6 β, (x1, x2, · · · , xβ) = w},

and Iw is the complement of Iw. This renders:

IBER,LDPC= PkLDPC i=1 Pi P w∈J P n∈Iwxn
M(w, i) kLDPC (3.8a) + PkLDPC i=1 Pi P w∈J P k∈Iwxk
M(w, i) kLDPC (3.8b) Notably, in the above expression, the first term corresponds to the sum of BCH blocks whose number of bit errors is less than t + 1. On the contrary, the second term is the sum of BCH blocks whose number of bits errors is larger than t. Thus after performing the BCH decoding, (3.8a) will be eliminated, but the BCH coding blocks in (3.8b) will have probability Pe to be

decoded to a wrong BCH codeword or probability 1 − Pe of unsuccessfully decoding. For the

former case, at most additional t errors will be added. Along this thinking, and denoting by |Iw| the cardinality of Iw, we can upper-bound the expected value of

P k∈Iwxk in (3.8b) by E_U,Iw = |Iw| X m=0  X k∈Iw xk+ t · m  · P|Iw| m

where P|Iw| m = |Iw| m  Pm e (1 − Pe)|Iw|−m

is the probability that m BCH code blocks in set Iw decode to valid but wrong codewords.

The upper bound of overall average coded BER is therefore I_BER,MBC-SLCU = PkLDPC i=1 Pi· P w∈J EU,Iw· M(w, i) kLDPC . (3.9) To examine whether this scheme can improve the error floor in average or not, we have:

IBER,LDPC− IBER,MBC-SLC ≥ IBER,LDPC− IBER,MBC-SLCU = PkLDPC i=1 Pi P w∈J P n∈Iwxn− P|Iw| m=0(t · m) · P |Iw| m  M(w, i) kLDPC . (3.10) The result in (3.10) tells that the selection of t is important because it will decide how much improvement in the error floor region we can (at least) obtain. A larger t however will cause a larger code rate loss. Hence, if we can choose t, of which the code rate loss can be maintained in an acceptable region, and by which the excessive overestimated second term P|Iw|

m=0(t · m) · P |Iw|

m can be neglected, the estimation of the overall system BER can be well

approximated by: IBER,MBC-SLC≈ IBER,LDPC− PkLDPC i=1 Pi P w∈J P n∈Iwxn
M(w, i) kLDPC . (3.11) An improvement on the error floor is thus rendered.

According to simulations, the required t does not need to be large for improving the error floor of the LDPC code. This is because the MBC-SLC scheme can disperse the errors from the outputs of the LDPC code decoder into several BCH code decoders. Yet, in comparison with the SBC-MLC scheme, the improvement due to the increment of t in the MBC-SLC scheme is relatively smaller.

3.2.1

Selection of the BCH Code in the MBC-SLC Scheme

In this subsection, we will assume the well approximation of (3.11) and test whether a larger BCH code will improve the average BER performance of the MBC-SLC scheme. By (3.11), the improvement is decided by:

P w∈J P n∈Iwxn
M(w, i) kLDPC . (3.12) Let us first test how the parameters in coding scheme affect the improvement without considering whether the codes corresponding to these parameters exist or not. Suppose the MBC-SLC scheme consists of a LDPC code (with kLDPC = 20) and β = 2 BCH codes (of

length nBCH = 10 and t = 4). The values of (3.12) for different i are listed in Table 3.1.

Another MBC-SLC scheme of parameters kLDPC = 20, β = 4, nBCH = 10 and t = 4 is

tested with its corresponding values of (3.12) being listed in Table 3.2.

Table 3.1: The values of (3.12) corresponding to the MBC-SLC scheme with parameters: kLDPC = 20, β = 2, nBCH = 10 and t = 4. i 1 2 3 4 5 6 7 (3.12) 1 2 3 4 4.83746 5.28483 5.1904 i 8 9 10 11 12 13 14 (3.12) 4.56013 3.55477 2.42211 1.40402 0.658728 0.226006 0.0433437 i 15 16 17 18 19 20 (3.12) 0 0 0 0 0 0

Tables 3.1 and 3.2 hint that when i (i.e., the number of errors) is small, using a larger BCH code can improve the error floors more. Note that the actual computation of (3.11) also depends on the error number distribution {Pi, ∀ 1 6 i 6 kLDPC}; so when the error

number distribution places more mass for larger i (such as i ≥ 9 in Tables 3.1 and 3.2), a smaller BCH code seems to be favored.

Table 3.2: The values of (3.12) corresponding to the MBC-SLC scheme with parameters: kLDPC = 20, β = 4, nBCH = 5 and t = 2. i 1 2 3 4 5 6 7 (3.12) 1 2 2.89474 3.61197 4.10862 4.36687 4.39035 i 8 9 10 11 12 13 14 (3.12) 4.20021 3.83127 3.32817 2.74149 2.12384 1.52606 0.993292 i 15 16 17 18 19 20 (3.12) 0.561146 0.251806 0.0701754 0 0 0

From this experiment, we conclude that when the error number distribution of the LDPC coding system places more masses on small number of i, using a larger BCH code with less concatenated number (e.g., nBCH= 10 and β = 2) is perhaps better than choosing a smaller

BCH code with more concatenated number (e.g., nBCH = 5 and β = 4).

3.3

Analysis of the BER performance of the

MBC-MLC Coding Scheme

In this subsection, we can similarly get the BER formulation of the MBC-MLC coding scheme from that of the MBC-SLC coding scheme. The only difference is that the number of LDPC code decoders is changed from one to γ. Again, we still assume an uniform interleaved is placed between the BCH coders and the LDPC coders.

First, as similar to (3.1), we derive the average BER performance of the information bits of these γ LDPC codes as:

I_BER,LDPC(γ) = Pγ·kLDPC i=1 i · S (γ) i γ · kLDPC , (3.13) where S_i(γ) = X x1,x2,...,xγ x1+···+xγ=i 06x1,x2,...,xγ6kLDPC Px1· · · Pxγ

is the probability that the number of bits errors at the outputs of γ LDPC code decoders is equal to i.

Then, be reminded that the upper bound of overall coded BER of the MBC-SLC coding scheme is given by:

I_BER,MBC-SLCU = PkLDPC i=1 Pi· P w∈J EU,Iw· M(w, i) kLDPC .

Note that in the above formula, Pi is the error number distribution of one LDPC code. We

then replace it by Si(γ) for γ LDPC codes. As a result, the upper bound of overall coded

BER of the MBC-MLC coding scheme is equal to: I_BER,MBC-MLCU,γ = PγkLDPC i=1 S (γ) i · P w∈J EU,Iw · M(w, i) kLDPC . (3.14) Hence, I_BER,LDPC(γ) − IBER,MBC-MLC

≥ I_BER,LDPC(γ) − I_BER,MBC-MLCU,γ = PγkLDPC i=1 S (γ) i P w∈J P n∈Iwxn− P|Iw| m=0(t · m) · P |Iw| m  M(w, i) γ · kLDPC (3.15) From (3.15), the discussion regarding the selection of t is the same as that for the MBC-SLC scheme; hence, we omit them. We conclude this section by pointing out that for a proper choice of t, IBER,MBC-MLC≈ I_BER,LDPC(γ) − PγkLDPC i=1 S (γ) i P w∈J P n∈Iwxn
M(w, i) γ · kLDPC (3.16) We can then examine whether the MBC-MLC scheme can improve the error floor in terms of the above approximation formula.

Chapter 4

Numerical and Simulation Results

This chapter presents the numerical and simulation results regarding the analyses in Chapter 3. Remarks on them will follow.

Specifically, Section 4.1 examines the accuracy of the formulas of the three BCH and LDPC concatenated coding schemes. Section 4.2 gives the simulation results of the SBC-MLC scheme with respect to BCH codes of different t. Note that in our system setting, in order to match the lengths of the BCH codes and the LDPC codes, zeros will be padded at the end for whichever is shorter.

4.1

Examination of the Accuracy of the Formulas of

the three BCH and LDPC Concatenated Coding

Schemes

In this section, given a measured error number distribution {Pi; ∀ 1 6 i 6 kLDPC} in the error

floor region, we use the formulas obtained in Chapter 3 to choose proper t values respectively for the SBC-MLC, MBC-SLC and MBC-MLC coding schemes, and then provide simulation results by using the chosen values of t. The QC-LDPC codes adopted in these three BCH and LDPC concatenated coding schemes are QC(2286,1914), QC(4590,3835) and QC(9180,8425)

LDPC codes, respectively.

Tables 4.4-4.6 and Figures 4.1-4.3 show the numericals and simulations of the SBC-MLC scheme for these QC LDPC codes. First, we get the error number distribution {Pi, ∀ 1 6

i 6 kLDPC} for a specific SNR by simulations as listed in Tables 4.1, 4.2 and 4.3. Then,

these error number distributions are used to calculate, e.g., Pt_i=1i · S_i(β)/nBCH (see (3.5)) for

different values of t as summarized in Tables 4.4-4.6. By these tables, the t value that gives the largest Pt_i=1i · Si(β)/nBCH will be chosen. Based on this chosen t, numerical calculations

of, e.g., (3.5), for all SNRs will be compared with the simulated BER performances of the SBC-MLC scheme as shown in Figures 4.1-4.3. These figures indicate that our formula of (3.5) is an accurate estimate of the BER performance of the real SBC-MLC system. It also indicates that the SBC-MLC scheme can lower the error floor of the LDPC coding system. Table 4.1: Error number distribution {Pi, ∀ 1 6 i 6 kLDPC} for the QC(9180,8425) LDPC

code at SNR = 5 dB. Only the non-zero Pi values are listed in this table.

i 0 1 2 3 4 5 Pi 0.181334 0.0667212 0.223086 0.0916905 0.130168 0.0646746 i 6 7 8 9 10 11 Pi 0.0663119 0.0425706 0.0335653 0.0180106 0.0167826 0.0139173 i 12 13 14 15 16 17 Pi 0.0106427 0.00613999 0.0106427 0.00409333 0.00327466 0.00327466 i 18 19 20 21 23 24 Pi 0.003684 0.003684 0.000818666 0.00163733 0.000409333 0.000818666 i 29 31 46 48 Pi 0.000818666 0.000409333 0.000409333 0.000409333

Table 4.2: Error number distribution {Pi, ∀ 1 6 i 6 kLDPC} for the QC(2286,1914) LDPC

code at SNR= 4 dB. Only the non-zero Pi values are listed in this table.

i 0 1 3 4 5 6

Pi 0.992169 7.83073×10−6 6.26458×10−5 0.00670311 0.000195768 0.000681274

i 7 8 9 10 18

Pi 2.34922×10−5 0.000125292 7.83073×10−6 1.56615×10−5 7.83073×10−6

Table 4.3: Error number distribution {Pi, ∀ 1 6 i 6 kLDPC} for the QC(4590,3835) LDPC

code at SNR= 3.5 dB. Only the non-zero Pi values are listed in this table.

i 0 2 3 4 5 6 Pi 0.962107 2.16901×10−5 0.0344656 0.000715773 0.000520562 0.00104112 i 7 8 10 12 13 14 Pi 0.00010845 0.000173521 4.33802×10−5 2.16901×10−5 2.16901×10−5 2.16901×10−5 i 16 17 20 23 26 33 Pi 2.16901×10−5 2.16901×10−5 2.16901×10−5 2.16901×10−5 2.16901×10−5 2.16901×10−5 i 36 39 40 41 45 46 Pi 4.33802×10−5 8.67604×10−5 2.16901×10−5 2.16901×10−5 2.16901×10−5 2.16901×10−5 i 47 48 49 51 52 53 Pi 2.16901×10−5 4.33802×10−5 4.33802×10−5 6.50703×10−5 4.33802×10−5 2.16901×10−5 i 56 57 58 65 67 75 Pi 4.33802×10−5 2.16901×10−5 2.16901×10−5 2.16901×10−5 2.16901×10−5 2.16901×10−5

Table 4.4: Numerical calculation of the difference term in (3.5) according to the error number distribution in Table 4.1. In this table, nBCH = 16383 and β = 2.

t Pt_i=1i · S_i(β)/nBCH I_BER,LDPC(β)

3 2.34392 × 10−5

6.23939 × 10−4 4 5.01051 × 10−5

Table 4.5: Numerical calculation of the difference term in (3.5) according to the error number distribution in Table 4.2. In this table, nBCH = 4095 and β = 2.

t Pt_i=1i · S_i(β)/nBCH I_BER,LDPC(β)

2 4.05928×10−9

1.75598×10−5 3 1.01481×10−7

4 1.40004×10−5

Table 4.6: Numerical calculation of the difference term in (3.5) according to the error number distribution in Table 4.3. In this table, nBCH = 8191 and β = 2.

t Pt_i=1i · Si(β)/nBCH IBER,LDPC(β)

2 0

3.76136×10−5

3 2.55456×10−5

3 3.5 4 4.5 5 5.5 6 6.5 7 10−5 10−4 10−3 10−2 E b/N0(dB) BER QC(9180,8425) code SBC−MLC simulation SBC−MLC calculation

Figure 4.1: Simulated and calculated BER performances of the SBC-MLC scheme consisting of one (16383, 16313, 5) BCH code and two QC(9180,8425) LDPC codes. Also shown is the performance of the LDPC code.

3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 10−7 10−6 10−5 10−4 10−3 E b/N0(dB) BER QC(2286,1914) LDPC code SBC−MLC simulation SBC−MLC calculation

Figure 4.2: Simulated and calculated BER performances of the SBC-MLC scheme consisting of one (4095, 4047, 4) BCH code and two QC(2286,1914) LDPC codes. Also shown is the performance of the LDPC code.

3 3.5 4 4.5 5 10−7 10−6 10−5 10−4 10−3 10−2 E b/N0(dB) BER QC(4590,3835) LDPC code SBC−MLC simulation SBC−MLC calculation

Figure 4.3: Simulated and calculated BER performances of the SBC-MLC scheme consisting of one (8191, 8139, 4) BCH code and two QC(4590,3835) LDPC codes. Also shown is the performance of the LDPC code.

Tables 4.7-4.9 and Figures 4.4-4.6 show the numericals and simulations of the MBC-SLC scheme for the QC LDPC codes mentioned in the first paragraph of this section. These figures indicate that the formula of (3.11) has a visible gap from simulations, particularly in Figure 4.5. However, it is hard to predict whether the resulting calculated IBER,MBC-SLC is

higher or lower than the real IBER,MBC-SLC as other factors such as rate loss may also affect

the approximation. However, such a gap can still clearly imply that the error floor of the original LDPC code is improved by the MBC-SLC scheme after a proper t is identified. Table 4.7: Numerical calculation of the difference term in (3.11) according to the error number distribution in Table 4.1. In this table, kLDPC = 8425.

t PkLDPC i=1 Pi P w∈J P n∈Iwxn
M(w, i) kLDPC IBER,LDPC 1 5.53611×10−5 0.000623939 2 1.46461×10−4 3 2.31159 ×10−4

Table 4.8: Numerical calculation of the difference term in (3.11) according to the error number distribution in Table 4.2. In this table, kLDPC = 1914.

t PkLDPC i=1 Pi P w∈J P n∈Iwxn
M(w, i) kLDPC IBER,LDPC 1 7.58858×10−6 1.75598×10−5 2 1.93287×10−5 3 2.56596×10−5

Table 4.9: Numerical calculation of the difference term in (3.11) according to the error number distribution in Table 4.3. In this table, kLDPC = 3835.

t PkLDPC i=1 Pi P w∈J P n∈Iwxn
M(w, i) kLDPC IBER,LDPC 1 2.37034×10−5 3.76136×10−5 2 3.25249×10−5 3.5 4 4.5 5 5.5 6 6.5 7 10−5 10−4 10−3 10−2 E b/N0(dB) BER QC(9180,8425) LDPC code MBC−SLC simulation MBC−SLC calculation

Figure 4.4: Simulated and calculated BER performances of the MBC-SLC scheme consisting of two (4095, 4059, 3) BCH codes and one QC(9180,8425) LDPC code. Also shown is the performance of the LDPC code.

3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 10−7 10−6 10−5 10−4 10−3 E b/N0(dB) BER QC(2286,1914) LDPC code MBC−SLC simulation MBC−SLC calculation

Figure 4.5: Simulated and calculated BER performances of the MBC-SLC scheme consisting of three (511,484,3) BCH codes and one QC(2286,1914) LDPC code. Also shown is the performance of the LDPC code.

3 3.5 4 4.5 5 10−8 10−7 10−6 10−5 10−4 10−3 E b/N0(dB) BER QC(4590,3835) LDPC code MBC−SLC simulation MBC−SLC calculation

Figure 4.6: Simulated and calculated BER performances of the MBC-SLC scheme consisting of seven (511,493, 2) BCH codes and one QC(4590,3835) LDPC code. Also shown is the performance of the LDPC code.

Table 4.10 and Figure 4.7 show the numericals and simulations of the MBC-MLC scheme for QC(2286,1914) LDPC code. Note that the formula of (3.16) is the calculation of the error performance of the MBC-MLC scheme with uniform interleaver. The figure then indicates that the formula of (3.16) is an accurate estimate of the BER performance of the real MBC-MLC system with uniform interleaver.1 _{Our calculation sufficiently hints that the MBC-MLC}

scheme can improve the error floor of the original LDPC code.

Table 4.10: Numerical calculation of the difference term in (3.16) according to the error number distribution in Table 4.2. In this table, kLDPC = 1914 and γ = 2.

t PγkLDPC i=1 S (γ) i P w∈J P n∈Iwxn
M(w, i) γ · kLDPC I_BER,LDPC(γ) 1 1.11843×10−5 1.75598×10−5 2 1.65464×10−5 3 1.7589×10−5

1_{We also plot the simulated BER performance of the real MBC-MLC system without uniform interleaver}

in Figure 4.7. The curve indicates that a performance gap to our formual in (3.16) exists if no interleaver is implemented in real simulations.

3 3.5 4 4.5 5 10−8 10−7 10−6 10−5 10−4 10−3 10−2 10−1 E b/N0(dB) BER QC(2286,1914) LDPC code MBC−MLC simulation MBC−MLC simulation(uniform interleaver) MBC−MLC calculation

Figure 4.7: Simulated and calculated BER performances of the MBC-SLC scheme consisting of eight (511,483, 3) BCH codes and two QC(2286,1914) LDPC code. Also shown is the performance of the LDPC code.

4.2

Comparisons of Different BCH Codes in the

MBC-SLC Scheme

At the end of this chapter, we compare the effect of different BCH codes concatenated with the same QC(2286,1914) LDPC code (respectively, QC(4590,3835) LDPC code) by simulations in comparison with the predictions of our approximation formula. The results are summarized in Figures 4.8–4.11. The behaviors of the curves in these figures are seemingly synchronized. They all show that a larger BCH code is favored from the aspect of improving the error floor.

2 2.5 3 3.5 4 4.5 5 5.5 6 10−9 10−8 10−7 10−6 10−5 10−4 10−3 10−2 10−1 E b/N0(dB) BER QC(2286,1914) LDPC code MBC−SLC,(255,239,2)BCH code MBC−SLC,(511,484,3)BCH code MBC−SLC,(1023,973,5)BCH code

Figure 4.8: Calculated BER performances of the MBC-SLC scheme for the QC(2286,1914) LDPC code concatenated with different BCH codes. Also shown is the performance of the LDPC code.

2 2.5 3 3.5 4 4.5 5 5.5 6 10−8 10−7 10−6 10−5 10−4 10−3 10−2 10−1 E b/N0(dB) BER QC(2286,1914) LDPC code MBC−SLC,(255,239,2)BCH code MBC−SLC,(511,484,3)BCH code MBC−SLC,(1023,973,5)BCH code

Figure 4.9: Simulated BER performances of the MBC-SLC scheme for the QC(2286,1914) LDPC code concatenated with different BCH codes. Also shown is the performance of the LDPC code.

3 3.5 4 4.5 5 10−9 10−8 10−7 10−6 10−5 10−4 10−3 10−2 E b/N0(dB) BER QC(4590,3835) LDPC code MBC−SLC,(1023,1003,2)BCH code MBC−SLC,(2047,2003,4)BCH code

Figure 4.10: Calculated BER performances of the MBC-SLC scheme for the QC(4590,3835) LDPC code concatenated with different BCH codes. Also shown is the performance of the LDPC code.

3 3.5 4 4.5 5 10−8 10−7 10−6 10−5 10−4 10−3 10−2 E b/N0(dB) BER QC(4590,3835) LDPC code MBC−SLC,(1023,1003,2)BCH code MBC−SLC,(2047,2003,4)BCH code

Figure 4.11: Simulated BER performances of the MBC-SLC scheme for the QC(4590,3835) LDPC code concatenated with different BCH codes. Also shown is the performance of the LDPC code.

Chapter 5

Conclusion and Future Work

In this thesis, we analyze three concatenated coding schemes: The SBC-MLC scheme, the MBC-SLC scheme and the MBC-MLC scheme specifically in the error floor region under the premise that the BER decays very slow in this region. Given the error number distribution {Pi, ∀ 1 6 i 6 kLDPC} (obtained at a selective SNR in the error floor region) and assuming

that it can be applied to other SNRs, our analysis and simulations show that the concatenated scheme can improve the error floor of the LDPC-only scheme. Yet, there is a restriction for these concatenated coding schemes. That is, a proper t must be chosen, where t is the error correcting capability of the BCH codes. From the performance standpoint, a larger t is often preferred, while a larger t may result in a larger rate loss (due to a different BCH code must be used) and hence compensate the gain from the concatenated scheme.

By investigating the MBC-SLC scheme for different BCH codes subject to a fixed system code rate, we found that a larger t is still a better choice. When comparing the SBC-MLC scheme with the MBC-SLC scheme, we would say that the SBC-MLC scheme has an obvi-ously larger improvement over its corresponding LDPC-only scheme, yet the improvement depends more on the selected t.

is rather weak in its footing since we could not exhaust all designs for the two schemes. Hence, the following conclusion is drawn based more on intuition from simulations rather than on rigorous investigation: When the SBC-MLC scheme is composed of a BCH code with a stronger error correcting capability, its performance is often better than that of the MBC-SLC scheme (see for example Figures 5.1 and 5.2).

2 2.5 3 3.5 4 4.5 5 5.5 6 10−14 10−12 10−10 10−8 10−6 10−4 10−2 100 E b/N0(dB) BER QC(2286,1914) LDPC code MBC−SLC,(255,239,2)BCH code MBC−SLC,(511,484,3)BCH code MBC−SLC,(1023,973,5)BCH code SBC−MLC,(4095,3879,18)BCH code

Figure 5.1: Comparison of calculated performances of the MBC-SLC scheme and the SBC-MLC scheme subject to the same system code rate. The red line corresponds to a con-catenated system consisting of eight (255,239,2) BCH codes and a QC(2286,1914) LDPC code. The black line corresponds to a concatenated system consisting of four (511,484,3) BCH codes and a QC(2286,1914) LDPC code. The pink line corresponds to a concatenated system consisting of two (1023,973,5) BCH codes and a QC(2286,1914) LDPC code. The red line with star marks corresponds to a concatenated system consisting of a (4095,3879,18) BCH code and two QC(2286,1914) LDPC codes.

3 3.5 4 4.5 5 10−14 10−12 10−10 10−8 10−6 10−4 10−2 E b/N0(dB) BER QC(4590,3835) LDPC code MBC−SLC,(1023,1003,2)BCH code MBC−SLC,(2047,2003,4)BCH code SBC−MLC,(8191,7996,15)BCH code

Figure 5.2: Comparison of calculated performances of the MBC-SLC scheme and the SBC-MLC scheme subject to the same system code rate. The black line corresponds to a con-catenated system consisting of four (1023,1003,2) BCH codes and a QC(4590,3835) LDPC code. The pink line corresponds to a concatenated system consisting of two (2047,2003,4) BCH codes and a QC(4590,3835) LDPC code. The red line corresponds to a concatenated system consisting of a (8191,7996,15) BCH code and two QC(4590,3835) LDPC codes.

Our analysis is majorly dependent on the information of the error number distribution. So our analysis can be applied to any system that can provide such information; hence, the same technique may be available for the BEC as well as BSC channels. Yet, if the error number distribution cannot be accurately estimated, or even cannot be applied to the SNR region other than the SNR at which such information is measured, our estimation formulas may fail. This is one of the problems that need to be resolved in the future. In addition, one may also wish to consider using the LDPC codes as the outer codes and the BCH codes as the inner codes. How such system performs and how to analyze it would be another future work of interest.

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