HfO2 nanocrystal memory on SiGe channel

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HfO

2

nanocrystal memory on SiGe channel

Yu-Hsien Lin

a,⇑

, Chao-Hsin Chien

b

a

Department of Electronic Engineering, National United University, Miaoli, Taiwan, ROC

b

Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan, ROC

a r t i c l e

i n f o

Article history: Received 27 March 2012

Received in revised form 21 October 2012 Accepted 26 October 2012

Available online 28 November 2012 The review of this paper was arranged by Prof. S. Cristoloveanu Keywords: Hafnium oxide Nanocrystals Nonvolatile memories Flash memory SiGe channel

a b s t r a c t

This study proposes a novel HfO2nanocrystal memory on epi-SiGe (Ge: 15%) channel. Because SiGe has a

smaller bandgap than that of silicon, it increases electron/hole injection and the enhances program/erase speeds. This study compares the characteristics of HfO2nanocrystal memories with different oxynitride

tunnel oxide thicknesses on Si and epi-SiGe substrate. Results show that the proposed nonvolatile mem-ory possesses superior characteristics in terms of considerably large memmem-ory window for two-bits oper-ation, high speed program/erase for low power applications, long retention time, excellent endurance, and strong immunity to disturbance.

1. Introduction

Nanocrystal memory has recently attracted a lot of attention for applications in next-generation nonvolatile memory[1–8]. Based on discrete storage nodes, nanocrystal memories address the important issue for vertical and lateral stored charge migration, and have great potential to achieve excellent retention characteris-tics. Some studies report the use of high-k dielectric materials to replace the trapping layer of silicon-oxide-nitride-oxide-silicon-like (SONOS-silicon-oxide-nitride-oxide-silicon-like) structures due to its high trapping state densities for charge-trapping efﬁciency improvement, deep trap energy level for better charge retention and thermodynamic stability, proper conduction and valence band offset with Si, low lattice mismatch with silicon, and excellent electrical properties [9,10]. Based on the advantages of high-k material SONOS-like memories and nano-crystal memory, HfO2nanocrystal memory[11,12]has the

advan-tages of high program/erase speed (P/E speed), low power consumption for programming and erasing voltage, excellent charge retention, and better potential for scalability below the 50-nm node, according to the International Technology Roadmap for Semiconductors (ITRSs) [13]. Especially, the fabrication of

HfO2nanocrystal memory is fully compatible with current CMOS

technologies.

SiGe channel is also very attractive for device scaling down. To continue the trend of metal–oxide-semiconductor-field-effect-transistor (MOSFET) scaling, a strained SiGe channel acting as a high mobility channel has attracted a lot of interest in many stud-ies for a long time[14–16]. Flash memory applications can use the SiGe channel to improve program/erase speed and lower the oper-ation voltage. For programming, the drain current of flash memory devices becomes larger due to the mobility enhancement from the strain effect of SiGe layer. This increases the number of channel hot electrons, which in turn increases the likelihood of hot electrons injecting into the trapping layer under the same gate voltage. For erasing, the band-to-band tunneling (BTBT) current increases dra-matically with increasing Ge content in SiGe channel because the generation rate of electron–hole pairs is exponentially inversely proportional to the band gap[17,18]. As the electron hole pairs generation increases, the number of electron tunneling through the tunneling oxide increases, improving the P/E speed. Therefore, the SiGe channel can improve the program and erase speeds of flash devices while lowering operation voltage. Introducing the SiGe channel into flash devices allows low power consumption and high operating efficiency.

This study explores the newly-proposed nonvolatile ﬂash mem-ories with HfO2nanocrystals and epi-SiGe channel (Ge: 15%) for

improving memory performance, and discusses the use of oxynit-ride tunnel oxide with different thicknesses. The epi-SiGe channel achieved high program/erase speeds because the SiGe bandgap is smaller than that of silicon, implying increased electron/hole injec-tion. As a result, combining SiGe channel and HfO2nanocrystals 0038-1101/$ - see front matter Ó 2012 Elsevier Ltd. All rights reserved.

http://dx.doi.org/10.1016/j.sse.2012.10.009

⇑ Corresponding author. Address: Department of Electronic Engineering, National United University, No. 1, Lienda, Miaoli 36003, Taiwan, ROC. Tel.: +886 37 381382; fax: +886 37 362809.

E-mail address:[email protected](Y.-H. Lin).

Contents lists available atSciVerse ScienceDirect

Solid-State Electronics

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produced superior ﬂash memory characteristics, such as a larger memory window, high P/E speeds, long retention time, excellent endurance, and strong immunity to disturbance.

2. Experimental

Fig. 1 shows the fabrication process of the HfO2 nanocrystal

memory. This ﬁgure provides an example of the fabrication process of the HfO2nanocrystal SiGe memory devices using a LOCOS

isola-tion process on a p-type, 5–10Xcm, (1 0 0) 150-mm silicon sub-strate (Fig. 1). First, 120 nm SiGe channel (Ge: 15%) was grown by an ultra high vacuum chemical vapor deposition system (UHVCVD). Then, 2 nm and 5 nm thick oxynitride tunnel layer was thermally grown at 900 °C in a furnace system. The other splits were grown the same tunnel layer on silicon substrate for

compar-ison. A 12-nm-thick amorphous HfSiOx silicate layer was then

deposited by co-sputtering with pure silicon (99.9999% pure) and pure hafnium (99.9% pure) targets in an oxygen gas ambient. The

co-sputtering process was performed at 7.6 10 3_{Torr at room}

temperature with precursors of O2(3 sccm) and Ar (24 sccm); both

dc sputter powers were set at 150 W. The samples were then sub-jected to RTA treatment in an O2ambient at 900 °C for 1 min to

convert the HfSiOx silicate ﬁlm into separated HfO2 and SiO2

phases to form HfO2nanocrystals[11,12]. A blocking oxide of

8-nm thickness was then deposited through high-density-plasma chemical vapor deposition (HDPCVD), followed by a N2

densiﬁca-tion process at 900 °C for 1 min. Poly-Si deposidensiﬁca-tion, gate pattern-ing, source/drain (S/D) implantpattern-ing, and other standard CMOS

procedures were subsequently completed to fabricate the HfO2

nanocrystal memory devices. The Ge ratio of SiGe epi layer was 15%. The band gap of SiGe channel can be modulated by tuning its Ge contents[17,18].Table 1summarizes the split table for these experiments. The insert graph shows the Id–Vgcurve for the SiGe

channel and Si device. Results shows that the drain current of SiGe channel device is about 1 order better than the Si channel at the same size (W/L = 2

l

m/2

l

m).

3. Results and discussion

Figs. 2a and 2bshow the programming and erasing characteris-tics, respectively, of the fabricated HfO2nanocrystal memory on

the SiGe substrate with two different tunnel oxide thicknesses 2 nm and 5 nm. The experiments in this study used channel hot

electron for programming and band-to-band hot hole for erasing.

The bias conditions for programming were Vg= 10 V and

Vd= 10 V, and Vg= 10 V and Vd= 10 V for erasing. Since the

chan-nel length of our memory cells was of 2

l

m, the applied drain volt-ages should be sufﬁciently large for rapid programming and erasing. As the memory cell is continuously scaled, the applied voltage shall be lowered accordingly for controlling the power con-sumption. The memory with thinner tunnel oxide exhibited slightly improved program speed and better erasure performance when operated with the short pulse width.Figs. 3a and 3bshow the program and erase characteristics of HfO2nanocrystal

memo-ries on the Si and SiGe substrates. The memory device on the SiGe substrate achieved high speed program/erase (10

l

s/0.1 ms) per-formance with a 2 V memory window. The boost on programming speed may come from mobility enhancement from the strain effect of SiGe layer, as suggested by the increased drain current of the memory device in the insert graph ofFig. 1. Thus, more channel hot electrons were generated and had a higher probability of injecting into the trapping layer through tunneling oxide under the same gate voltage. For the erasing speed enhancement, band-to-band tunneling current increased due to the small band gap SiGe channel and its enhanced generation rate of electron–hole pairs. As a result, the SiGe channel signiﬁcantly improved the pro-gram and erase speeds of the ﬂash device.

Fig. 4illustrates the retention time characteristics the fresh HfO2

nanocrystal memory devices on the Si and SiGe substrate with two different tunnel oxide thicknesses at a testing temperature of 25 °C. The retention characteristic of 20% charge loss was almost the same up to 108_{s for both 5 nm tunnel oxide splits. This good retention}

performance can be ascribed to the sufﬁciently deep trap energy

Fig. 1. Schematic cross section and split process of the HfO2nanocrystal memories.

Fig. 2a. Program characteristics of HfO2nanocrystal memories on SiGe substrate

with different tunnel oxide thickness.

Fig. 2b. Erase characteristics of HfO2nanocrystal memories on SiGe substrate with

different tunnel oxide thickness.

Table 1

Split table of the HfO2nanocrystal SiGe memories.

S/D type Blocking oxide Trapping layer Tunnel oxide SiGe epi nMOS SiO2 HFO2nanocrystals Oxynitride

(2 nm, 5 nm)

Si substrate Oxynitride

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levels in hafnium silicate[19,20]. Compared with 2 nm tunnel oxide splits, the SiGe channel device showed slightly worse characteris-tics than the control sample. The quality of this thin tunneling oxide grown on epi-SiGe layer may not have been good enough, allowing the stored charge to leak out, decreasing retention poorer.Fig. 5

shows the endurance characteristics with different tunnel oxide thicknesses after 104_{P/E cycles. Despite signiﬁcant memory}

win-dow narrowing, a memory winwin-dow of approximately 2 V remained even after 103_{P/E cycles. The cause of the narrowing over cycling}

might be due to two factors. The ﬁrst factor is the mismatch be-tween the localized spatial distributions for the injected electrons

and holes due to channel hot-electron programming and band-to-band hot-hole erasing. Uncompensated electrons might cause the Vtto increase gradually over P/E cycling[21–23]. The second factor

is the stress-induced electron traps generated in the tunnel oxide during cycling. The rate of memory window narrowing increased upon increasing P/E cycles, while the one with thick tunnel oxide

exhibited more serious memory window closure. Fig. 6

demon-strates the feasibility of performing two-bit operation with the

pro-posed HfO2 nanocrystal SiGe memory through a reverse read

scheme in a single cell. The Ids–Vgscurves clearly indicate that

for-ward and reverse reads can detect the information stored in the programmed Bit1 and Bit2, respectively. The logical ‘‘1’’ indicates that electrons were erased in the storage node. As an example, (Bit1, Bit2) = (1, 0) means that Bit1 is in its erased state and Bit2 is in its programmed state. To demonstrate the two-bit effect, a pro-gramming bias is ﬁrstly applied to write electrons into Bit2 by CHE injection. The accelerated electrons are injected into the nar-row region in trappering layer near the source junction. Then, Vs= 2 V was applied for reverse reading of bit1. Second, Vd= 2 V

was applied for forward reading of Bit2. In reverse reading, the read voltage had be large enough to generate a depletion region, which can be extended to screen out the localized trapped charges at source side, such that the programmed cell has low Vth(or high

cur-rent). Thus, a signiﬁcant threshold shift ofDVth= 2 V between these

(1, 0)-reverse and (1, 0)-forward curves is observed.Table 2 summa-rizes the bias conditions for two-bit operation.

Fig. 7demonstrates the erase-state threshold voltage instability induced by read disturbance of HfO2nanocrystal SiGe memory cell

with 2 nm tunnel oxide under several operation conditions. For

Fig. 3a. Program characteristics of HfO2nanocrystal memories on the Si substrate

and SiGe substrate.

Fig. 3b. Erase characteristics of HfO2nanocrystal memories on the Si substrate and

SiGe substrate.

Fig. 4. Retention time characteristics the fresh HfO2nanocrystal memory on Si and

SiGe channel with two different tunnel oxide thicknesses at a testing temperature of 25 °C.

Fig. 5. Endurance characteristics with different tunnel oxide thicknesses after 104

P/E cycles.

Fig. 6. 2 bits/cell operation for the SiGe HfO2nanocrystal memory. E: erased; P:

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two-bit operation, the applied bitline voltage in a reverse-read scheme must be large enough (>1.5 V) to ‘‘read through’’ the trapped charge in the neighboring bit. The read-disturb effect is the result of two factors: the word-line voltage and the bit-line voltage. The word-line voltage during read may enhance room temperature (RT) drift in the neighboring bit [24]. On the other hand, a relatively large read bit-line voltage may cause unwanted channel hot-electron injection, which subsequently results in a sig-niﬁcant threshold voltage shift of the neighboring bit. The experi-ments in this study applied gate and drain biases and grounded the source. Results clearly demonstrated that almost no read

distur-bance occurred in the HfO2nanocrystal SiGe-channel ﬂash

mem-ory under low-voltage reading (Vg= 3 V; Vd= 2 V). For a larger

memory window, only a small read disturbance (ca. 0.45 V) ap-peared after operating at Vd= 4 V after 1000 s at 25 °C.Fig. 8shows

the programming drain disturbance of the proposed HfO2

nano-crystal SiGe ﬂash memory. Two different drain voltages (Vd= 8

and 10 V) were applied in the programming drain disturbance measurement for the devices with two different tunnel oxides 2 nm and 5 nm. A sufﬁcient programming drain disturb margin ex-isted (DVt< 0.4 V) for the device with as thin as 2 nm oxide after

programming at a Vdvalue of 10 V for 1000 s.Fig. 9shows the gate

disturbance characteristics in the erasing state. Gate disturbance may occur during programming for cells sharing a common word-line when one of the cells is being programmed. A threshold voltage shift of only 0.55 V, i.e., negligible disturbance, appeared under the following conditions: Vg= 10 V; Vs= Vd= Vsub= 0 V;

stressed for 1000 s. Exactly why this memory exhibited such excel-lent gate disturb characteristics with such a thin tunnel oxide is unclear; a non-negligible current would be present in the tunnel oxide when a voltage of 10 V was applied to the gate electrode. Using a serial capacitor voltage divider model, the voltage drop at the tunnel oxide was estimated at 1.07 V if the trapping layer is assumed to be a HfO2ﬁlm, rather than nanocrystal. Even though

a 1.07 drop causes a signiﬁcant leakage current through an individ-ual 2 nm oxide layer, the data retention in the memory cell is re-lated to the direct tunneling leakage current induced by such a

voltage and the total tunneling situation in the whole gate stack. In other words, the effect of the potential barrier presented by a high-k material on the tunneling current must be taken into ac-count. It is incorrect to state that a large direct tunneling current will deﬁnitely exist in the interfacial layer and, in turn, that it will induce signiﬁcant disturbance during programming.

4. Conclusion

This study proposed a novel, simple, and reliable technique for

HfO2 nanocrystals with SiGe channel (Ge: 15%). Electron/hole

injection increased because SiGE has a smaller bandgap than sili-con. The proposed design achieved superior characteristics in terms of large memory windows, high speed program/erase, long retention time, excellent endurance, no signiﬁcant disturbance, and 2-bit operation. Given this superior performance, HfO2

nano-crystal ﬂash memory on SiGe channel is suitable for two-bit oper-ation and has great potential for replacing the ONO stack in conventional SONOS-type Flash memories.

Acknowledgment

This project was sponsored by the National Science Council of Taiwan under Contract No. 101-2221-E-239-026-.

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Table 2

The bias conditions summary table for two-bit operation.

Program (V) Erase (V) Read (V)

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Fig. 7. Read disturbance induced erase-state threshold voltage instability in 2 nm tunnel oxide HfO2nanocrystal SiGe memory cell.

Fig. 8. Programming drain disturbance of the proposed HfO2nanocrystal SiGe ﬂash

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