On the prediction of geometry-dependent floating-body effect in SOI MOSFETs

1662 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 52, NO. 7, JULY 2005

Briefs

Effect in SOI MOSFETs PinSu and Wei Lee

Abstract—This brief demonstrates that, through the perspective of body–source built-in potential lowering(1 ), the geometry-dependent floating-body effect in state-of-the-art silicon-on-insulator (SOI) MOS-FETs can be explained and predicted by the geometry dependence of threshold voltage( ). The correlation between 1 and unveiled in this brief is the underlying mechanism responsible for the coexistence of partially depleted and fully depleted devices in a single SOI chip.

Index Terms—Body–source built-in potential lowering, floating-body ef-fect, silicon-on-insulator (SOI) CMOS, threshold voltage, partially depleted (PD), fully depleted (FD).

As silicon-on-insulator (SOI) technology becomes a mature platform for high-speed and low-power applications [1]–[5], the main barrier to full exploitation of SOI performance and power is that the design of an SOI chip is a relatively risky process due to the lack of efforts onchar-acterizing and modeling the floating-body behavior present in state-of-the-art SOI chips [1], [6]. Sub-100-nm SOI CMOS shows the trend of coexistence of partially depleted (PD) and fully depleted (FD) de-vices, depending on channel length and width, in a single chip [7]. The floating-body effect, in other words, shows significant geometry de-pendence. This technological trend poses a challenge to SOI modeling [8], [9], and its underlying mechanism merits investigation. Reference [10] has shownthat the body-source built-in potential lowering(1Vbi) may represent the degree of full depletion (and thus floating-body ef-fect) inSOI MOSFETs. Inthis brief, we show that similar to threshold voltage(V_T); 1V_bimay exhibit reverse narrow-width effect, reverse short-channel effect (SCE), as well as SCE. Moreover, we demonstrate that1V_biandV_T are correlated. This correlation explains and predicts the geometry-dependent floating-body effect. The implications on the characterization and modeling of scaled SOI CMOS are also addressed. While V_T is determined by the front surface potential (), the floating-body effect is determined by the SOI back surface. The cou-pled back surface potential at the source junction1V_bicanbe probed by finding the onset of the external body bias (through a body contact) after which theV_T and hence the channel current of the SOI device is modulated (Fig. 1 inset) [10]. Fig. 1 shows that the frontgate coupling induces1V_biand in the strong inversion regime this frontgate-to-body coupling is shielded by the surface inversion layer, a manifestation of the correlationbetween1Vbiand.

This correlation, under the assumption of thick buried oxide, can be formulated by applying the Poisson equation in the vertical direction [11], [12]

1Vbi=  0 Q_2CB

Si (1)

Manuscript received December 20, 2004; revised March 14, 2005. This work was supported in part by the National Science Council of Taiwan, R.O.C. under Contract 93-2215-E-009-042. The review of this brief was arranged by Editor T. Skotnicki.

The authors are with the Department of Electronics Engineering, National Chiao-Tung University, Hsinchu 300, Taiwan, R.O.C.

Digital Object Identifier 10.1109/TED.2005.850626

Fig. 1. Resemblance of 1V and  as a function of V . Notice that 1V can be experimentally determined by the drain current versus body bias characteristics (atV = 0:05 V) of body-contacted devices.

Fig. 2. Short-channel effect on1V , which canbe modeled by the same exponential functional form derived from the quasi-two-dimensional SCE for V [15].

whereQ_B = qN_chT_SiandC_Si= "_Si=T_Si. Equation(1) indicates that 1Vbiincreases when bulk chargeQB(i.e., channel dopingNchor SOI thicknessTSi) decreases. Notice that at the onset of strong inversion

1Vbi(inv) = 2B0 Q_2CB

Si (2)

where_Bis a doping parameter that relates the potential of an electron at the Fermi level to the doping concentration [13].1Vbi(inv) canbe used as an index to represent the degree of full depletion (i.e., the im-munity of floating-body effect) of SOI devices.

Fig. 2 shows that1V_bi(inv) rolls up while V_Trolls off as the channel length(L) is scaled down due to charge sharing from the source and

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 52, NO. 7, JULY 2005 1663

Fig. 3. Reverse SCE on1V , which can be captured by the same functional form of the average channel doping for the reverse SCE onV [16].

drainelectrodes [14]. Also showninFig. 2 is that the same basic double exponential functional form, derived from the quasi-two-dimensional SCE forVT [15], canbe used to model the SCE on1Vbi

1Vbi(inv)=2B0 QB0 1Q_2C B;SCE

Si (3)

1QB;SCE=2CSi0 exp 0_2l1L +2 exp 0_l1L (Vbi0 2B) (4) where₀and₁are model parameters,V_biis the body-source built-in potential, andl is the characteristic length. Notice that the ratio of L to l may determine the enhancement of 1Vbiand the further suppression of floating-body effect of short-channel SOI devices.

As the SCE and1Q_B;SCEare put downby raisingL=l using the halo/pocket implant,VT rolls up while1Vbi(inv) rolls off as L is scaled down, as shown in Fig. 3. The impact of laterally nonuniform channel doping on the length-dependent floating-body effect may be assessed by the approximated average channel doping

1Vbi(inv)  2B0 Q_2CB(L)

Si (5)

QB(L) = qTSiNb(L 0 2Lh_L) + Nh(2Lh) (6) whereNb; Nh; and Lh represent background doping, average halo doping, and halo characteristic length, respectively (Fig. 3 inset). Note that although various functional forms for the average channel doping have beenproposed to model the reverse SCE onV_T, the functional form in(6) has beenshownsatisfactory [16].

Equation (5) predicts the coexistence of both PD nominal devices (1Vbi(inv) = 0 V) and FD long-channel devices (1Vbi(inv) > 0 V) with continuous variations in between for state-of-the-art SOI CMOS, which is verified by the measured1V_bi(inv) inFig. 3. Since these medium-to-long channel devices exhibit negligible floating-body ef-fect, they are potential replacements of body-contacted devices.

In Fig. 4, the enhancement of1Vbi(inv) for devices with narrow width(W ) can be attributed to the gate-field encroachment from the STI edges [7]. Since the bulk chargeQBis effectively reduced by the fringing field [17],V_T rolls off while1V_bi(inv) rolls up as W is scaled down. Also shown in Fig. 4 is that, similar to the modeling of reverse

Fig. 4. Reverse narrow-width effect on1V , which canbe modeled by the same basic1=W functional form for the reverse narrow-width effect on V [18].

Fig. 5. Correlationbetween1V and V .

narrow-width effect onV_T, the same basic1=W functional form [18] canbe used to model the reverse narrow-width effect on1Vbi. It is worth noting that this geometrical effect may enable FD narrow-width devices ona PD-SOI platform [7].

The geometry dependence of1V_biresembles that ofVT due to the geometry dependence of bulk chargeQB. Moreover,1VbiandVT are correlated by the following relationship:

1Vbi=  0 T_6TSi

OX(VT0 1) (7)

whereV_T = 1 + Q_B=C_OX; C_OX = "_OX=T_OX, an d1 = V_fb+ 2B. Note that although1 depends on the flat-band voltage Vfb, for n+ polysilicon-gate NMOSFET and p+ polysilicon-gate PMOSFET (dual-gate CMOS), the value of1 is close to 0. Equation(7) pre-dicts that1Vbi(inv) is linearly dependent on VT with a slope equal to0T_Si=6T_OX, as verified by Fig. 5.

For a given SOI technology, in other words, the geometry depen-dence of1V_biand floating-body effect can be predicted by (7), pro-vided that the geometry dependence of VT is known. Therefore, for floating-body SOI devices where the body contact is not available, the degree of full depletion1Vbi(inv) may still be experimentally probed through theV_T measurement because of the correlation between1V_bi andVT. Notice that the need for multipleVT=TOXtransistors for low

1664 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 52, NO. 7, JULY 2005

active/standby power requirement in a single chip can result in the co-existence of both PD and FD devices in the same circuit by design, as indicated by (7).

Using (7) to estimate the immunity of floating-body effect for de-vices with various feature size is also crucial to SOI compact mod-eling. To circumvent the modeling challenge imposed by the trend of coexistence of PD and FD devices in a single chip, a unified SOI com-pact model based on the concept of body-source built-in potential low-ering has been proposed [8], [10]. Under this generic model framework where the PD/FD module may be selected through a module selector, the value of1Vbi(inv) estimated by (7) canbe used to determine the PD/FD module adequately in a per-instance manner to gain both sim-ulation accuracy and efficiency.

In conclusion, the geometry-dependent floating-body effect can be explained and predicted by the correlation between1VbiandVT. This brief points out the underlying mechanism responsible for the coexis-tence of PD and FD devices in a state-of-the-art SOI chip.

ACKNOWLEDGMENT

The authors would like to thank to Dr. F.-L. Yang, K.-W. Su, and S. Fung.

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On-Chip Antennas for 60-GHz Radios in Silicon Technology

Y. P. Zhang, M. Sun, and L. H. Guo

Abstract—The recent advances in 60-GHz radios have called for the par-allel development of compact and efficient millimeter-wave antennas. This brief addresses for the first time the design, fabrication, and characteriza-tion of on-chip inverted-F and quasi-Yagi antennas for 60-GHz radios. The design was made using the Zeland IE3D software package. The fabrica-tion was realized with the back-end-of-line process of silicon substrates of low resistivity 10 cm. The characterization was conducted on wafer with Cascade Microtech coplanar probes and an HP8510XF network analyzer. The results show that the inverted-F antenna achieved a minimum return loss of 32 dB and a gain of 19 dBi at 61 GHz; while the quasi-Yagi an-tenna achieved a minimum return loss of 6.75 dB and a gain of 12 5 dBi at 65 GHz. Good agreement has been observed between the measured and simulated results.

Index Terms—60-GHz radios, inverted-F antennas, on-chip antennas, quasi-Yagi antennas, wireless personal area network (WPAN).

I. INTRODUCTION

There is much interest today in exploiting the 60-GHz band for wireless personal area network (WPAN) applications because a large bandwidth of 7 GHz is available [1]. The large bandwidth and mil-limeter-wave frequency have indeed created many challenges in the design of radio front-ends. The 60-GHz radio front-end implemented as an assembly of microwave monolithic integrated circuits (MMICs) in gallium arsenide (GaAs) semiconductor technology has proven feasible but rather expensive [2]. The 60-GHz radio front-end based on MMICs in silicon germanium (SiGe) semiconductor technology has been attempted. For instance, Renolds et al. demonstrated 60-GHz radio front-end circuits including a low-noise amplifier (LNA), a direct down converter, a power amplifier, and a voltage-controlled oscillator (VCO) in SiGe technology [3]. Design toward realizing a low-cost fully integrated SiGe 60-GHz radio front-end has been carried out. As the high-frequency capabilities of complimentary metal oxide semiconductor (CMOS) technology improve through scaling, CMOS has become a viable technology for millimeter-wave operation. Doan

et al. has explored CMOS for 60-GHz applications and designed

an LNA using a standard 0.13 m CMOS process [4]. Luiz et al. demonstrated 64- and 100-GHz VCOs in 90-nm CMOS [5]. Liu et al. demonstrated a 63-GHz VCO in a standard 0.25-m CMOS [6]. In addition, CMOS technology that promises to integrate a complete 60-GHz system (radio front-end plus digital processor) on a single chip (SoC) further enhances its competitiveness.

An antenna plays a key role in a radio. It has independent properties that affect the radio as a whole. Current antennas for 60-GHz radios are mainly discrete designs on conventional dielectric substrates [7], [8]. A relatively new development for 60-GHz antenna designs is the applicationof multichip module (MCM) technologies, which embeds antennas into integrated circuit packages [9]. At 60 GHz, the antenna form factor is on the order of millimeters or less and opens up new

Manuscript received February 28, 2005. The review of this brief was arranged by Editor J. N. Burghartz.

Y. P. Zhang and M. Sun are with the Integrated Systems Research Laboratory, School of Electrical and Electronic Engineering, Nanyang Tech-nological University, Singapore 639798 (e-mail: eypzhang@ntu.edu.sg; SUNM0001@ntu.edu.sg).

L. H. Guo is with the Semiconductor Process Technology Laboratory, Insti-tute of Microelectronics, Singapore 117685 (e-mail: lihui@ime.a-star.edu.sg).

Digital Object Identifier 10.1109/TED.2005.850628 0018-9383/$20.00 © 2005 IEEE