Abstract— - and -band CMOS differential subharmonic in-jection-locked frequency triplers (ILFTs) are proposed, analyzed, and designed. Based on the proposed ILFT structure, models for the injection-locking range and the output phase noise are devel-oped. A -band ILFT is designed and fabricated using 0.18- m standard CMOS technology. The measured injection-locking range is 1092 MHz with a dc power consumption of 0.45 mW and an input injection power of 4 dBm. The harmonic rejection ratios are 22.65, 30.58, 29.29, 40.35 dBc for the first, second, fourth, and fifth harmonics, respectively. The total injection-locking range of the -band ILFT can achieve 3915 MHz when the varactors are used and the dc power consumption is increased to 2.95 mW. A -band ILFT is also designed and fabricated using 0.13- m standard CMOS technology. The measured injection-locking range is 1422 MHz with 1.86-mW dc power consumption and 6-dBm input injection power. The injection-locking range of the proposed ILFT is similar to the tuning range of a conventional varactor-tuned bulk-CMOS voltage-controlled oscillator (VCO). Moreover, the proposed ILFT has a greater output power and a lower dc power consumption level than a VCO. As a result, it is feasible to use the proposed ILFT in low-power millimeter-wave synthesizers.
Index Terms—Frequency tripler, injection-locked oscillators
(ILOs), RF CMOS, voltage-controlled oscillator (VCO).
I. INTRODUCTION
I
N THE millimeter-wave band, there are two methods to generate local oscillator (LO) signals. In the first method, LO signals are generated directly by using fundamental fre-quency oscillators [1]–[3]. In the second one, they are gener-ated by using lower frequency oscillators cascaded with fre-quency multipliers to obtain signals at the desired frequencies [4]–[6]. Due to the limited performance of active and passive de-vices at high frequency, it is easier to design high-performance voltage-controlled oscillators (VCOs) at low frequency rather than at high frequency. Moreover, high-frequency dividers oper-ated at the carrier frequency with a significant amount of power dissipation are not needed when using a low-frequency VCO. Therefore, the second method is advantageous in CMOS cir-cuit implementation. However, the key design requirement of the second method is to increase the frequency conversion gain of the frequency multipliers. In order to achieve this require-ment, low input injection power and low dc power consumption are necessary to obtain the desired output power level.Manuscript received October 17, 2007; revised March 18, 2008. First pub-lished June 24, 2008; last pubpub-lished August 8, 2008 (projected). This work was supported by the National Science Council (NSC), Taiwan, R.O.C., under Grant NSC 95-2221-E-009-292.
The authors are with the Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan, R.O.C. (e-mail: [email protected]).
Digital Object Identifier 10.1109/TMTT.2008.926566
Frequency multipliers integrated with injection-locked oscil-lators (ILOs) [7]–[9] can efficiently increase the conversion gain because ILOs have the superior properties of frequency stabi-lization and high gain amplification with a narrow bandwidth [10]. Such a frequency multiplier with an ILO is called a subhar-monic injection-locked frequency multiplier (ILFM). It offers great potential use with millimeter-wave frequency synthesizers because of its low input injection power. Even with low input in-jection power, the proposed subharmonic ILFM can provide the same performance as a conventional frequency multiplier [11]. Thus far, all the proposed subharmonic ILFMs [7]–[9] have not been implemented using the silicon CMOS process and they are only suitable for single-ended modulation applications.
In this paper, a new CMOS fully differential subharmonic injection-locked frequency tripler (ILFT) is proposed and ana-lyzed. It is suitable for complex modulation schemes because of its fully differential structure. The injection-locking range of the proposed ILFT is improved by inserting the frequency pre-gen-erator circuit before the ILO. The main advantage of a frequency pre-generator is that the injection-locking range can be maxi-mized with little degradation of ILO output performance. An analytical model is developed to characterize both the injec-tion-locking range and the output phase noise of the proposed ILFT. The proposed -band ILFT is fabricated using 0.18- m CMOS technology. According to the measured results, it has an injection-locking range of 1092-MHz width with an input in-jection power of only 4 dBm and a dc power consumption of 0.45 mW. Moreover, the output power can achieve 9.4 dBm with 10.5-dB phase noise higher than that of the input injection signal. This paper shows that the key design requirement can be achieved in the proposed ILFT. Finally, the theoretical results are verified by the experimental results.
In Section II, the model for the proposed ILFT is derived. The CMOS circuit implementation is described in Section III. The experimental results are presented in Section IV. Finally, a conclusion and summary are given in Section V.
II. THEORETICALMODEL
Based upon the locking mechanism for a small injection signal [10] and the simple ILO model [12], a physical repre-sentation of the proposed ILFT with a frequency pre-generator to generate the third harmonic signal connected to an ILO is shown in Fig. 1. In the ILO model, is the transfer func-tion of the bandpass LC-tank filter used to eliminate undesired frequencies generated by the frequency pre-generator. The active devices of the ILO are modeled as the linear constant transconductance stage . The frequency pre-generator is modeled as the nonlinear characteristic function . Both the and with a feedback path form the ILO.
Fig. 1. Model of the proposed ILFT.
Without any input signal, the ILO has a steady output signal if the Barkhausen criterion is satisfied in the close-loop structure. An incident signal with input frequency is injected into the oscillator via a frequency pre-generator. The output frequency is the function of input frequency while the oscillator is under the locked situation.
If the ILFT is under the locked condition, the following apply: (1) (2) (3) where is the incident signal with input frequency , am-plitude , and phase , is the output signal with frequency and amplitude , and is the output signal of the frequency pre-generator.
From [13], can be expressed as a polynomial series
(4) where is the coefficient of polynomial , and is the terms of order higher than three. The coefficient is pro-portional to the conversion gain of the third harmonic frequency generator. The output current of the transconductance stage can been written as
(5) Using (4) and (5), the normalized injection-locking range can be derived as
(6)
where and are the resonant frequency and quality factor of the LC tank in the bandpass filter, respectively. The output voltage amplitude can be expressed as
(7) where is the impedance of the LC tank at resonant frequency.
Fig. 2. Simplified noise source model in the proposed ILFT.
Assuming , the expression of the
output amplitude can be rewritten as
(8) The detailed derivations are given in Appendix A.
In general, the injection-locking range is limited by failure of either the phase condition (6) or the gain condition (7) [12]. From (6), it can be seen that the injection-locking range in-creases with an increase in either the conversion gain of the fre-quency pre-generator or the incident amplitude . The degra-dation of the LC-tank quality factor can also improve the in-jection-locking range. However, the latter causes a decrease in the impedance of the LC tank and, thus, the output voltage amplitude also decreases (8). This result is consistent with the results in [10]. According to the proposed ILFT model, the de-sign principle can be developed. It can be seen from (8) that the quality factor of the LC tank can be maximized in order to obtain increased output amplitude. The resulting degradation of the injection-locking range can be improved by increasing of the conversion gain of the frequency pre-generator (6).
The overall ILO output phase noise is characterized by the noise contributions of all blocks in an ILO [14]. The simpli-fied noise source model of the proposed ILFT is shown in Fig. 2 where the conversion gain of the third harmonic signal in the fre-quency pre-generator is simplified to be a constant value , and is the signal with frequency . The noise contri-bution from the frequency pre-generator and the ILO are mod-eled as and , respectively. The linear phase-do-main model [15] is adopted to calculate the output phase noise.
The derived output phase noise can be expressed as
(11) In the above equations, is the offset frequency from output
frequency and and
are the phase noise spectral densities of output, input injection signal, frequency pre-generator, and internal circuits, respectively. The detailed derivation of the output phase noise is given in Appendix B.
As may be seen from the first and the second terms in (9), the noise from the input injection signal and frequency pre-gen-erator are passed through the low-pass filter so that their noise transfer functions have low-pass transfer characteristics. Thus, the output phase noise is dominated by these two noise sources at small offset frequency . If the noise contribution from the frequency pre-generator is negligible, the output phase noise is 9.5 dB higher than that from the input injection signal with a small offset frequency. The noise from internal cir-cuits, as given in the third term of (9), has a high-pass transfer characteristic. At large offset frequency , the output phase noise is dominated by this noise and has a high-pass shape. To minimize the output phase noise, the corner frequency can be increased to filter out the internal noise. As may be seen from (10) and (11), can be increased by either degradation of the
LC-tank quality factor or the high incident amplitude . A summary of the proposed ILFT can be developed from (6)–(11). The quality factor of the LC tank is maximized for a large output voltage swing and low-power consumption. The degradation of the injection-locking range and the output phase noise from the increase in quality factor can be compensated for by increasing the conversion gain of the frequency pre-gen-erator.
III. CIRCUITIMPLEMENTATION
The proposed CMOS ILFT circuit is shown in Fig. 3. The off-chip transformer T1 is designed to generate the differen-tial input signal. The function of the frequency pre-generator is implemented by M1 and M2. The design guideline of M1 and M2 is the same as for the conventional frequency multi-pliers in [16]. The gate bias of M1 and M2 is fed from the input off-chip transformer T1 and the conversion gain of the frequency pre-generator can be maximized with an appro-priate value. The tripled-frequency signal generated by the frequency pre-generator is injected into the ILO formed by M3, M4, C1, C2, L1, and L2. The selected values of inductors L1/L2 and varactors C1/C2 are chosen so that their resonant fre-quency is close to the third harmonic frefre-quency of the input in-jection signal. According to the design guideline in Section II, the quality factor of the LC tank is maximized for a large output swing and low power consumption. is the external con-trolled signal used to increase the injection-locking range. M3
Fig. 3. Schematic of the proposed ILFT.
Fig. 4. HSPICE simulated coefficient of output harmonic current as a function of conduction angle.
and M4 are used to generate the negative resistance to com-pensate for the loss of the LC tank. R1 is designed for the im-provement of the harmonic rejection ratios (HRRs). Finally, the output signals are taken from the open-drain buffers for test pur-poses. The proposed ILFT has a current-reuse structure between the frequency pre-generator and the ILO for low power opera-tion.
Fig. 4 shows the HSPICE simulated normalized third har-monic currents of the frequency pre-generator M1/M2 as a function of conduction angle , where is the output amplitude of the drain current at the third harmonic frequency, is defined as the maximum peak-to-peak output drain current, and conduction angle is the device turn-on angle within one period of the input signal. The simula-tion condisimula-tion involves an 8-GHz input signal with 4-dBm input injection power and a MOS device with dimensions
of m/ m with gate–source bias voltage
changing from 0.03 to 1.03 V. Due to the parasitic capacitance of the device, the ac current between the gate and drain is in-cluded in the output drain current . Thus, the normalized harmonic current curve in Fig. 4 is not the same as the ideal switch condition in [16]. The maximum output third harmonic current occurs when the conduction angle is 100 . With this conduction angle, the devices M1/M2 must be biased at the
Fig. 5. HSPICE simulated HRRs for various value of R1.
weak-inversion region. Under this condition, the ILO circuits may not satisfy the oscillation condition with such a small dc current. In the proposed ILFT, the frequency tripled function devices (M1 and M2) are biased at a conduction angle of 250 for higher frequency conversion efficiency while maintaining oscillation. can be calculated by a given input injection power, a device threshold voltage, and a suitable conduction angle [16].
Since the even harmonic signals are common-mode signals, an appropriate value for resistor R1 is set to eliminate the unde-sired even harmonic signals. To verify the effect of R1, Fig. 5 shows the HSPICE simulation results of the second and fourth HRRs for various values of R1 in the -band ILFT design. It can be seen that the HRR can be improved with a small R1 value. When the R1 value is 90 , the HRRs improve with only a small voltage drop for the -band ILFT. However, for the -band ILFT, the R1 value needs only to be 55 because of the low nominal power supply voltage in 0.13- m CMOS technology.
IV. EXPERIMENTALRESULTS
Based upon the proposed ILFT circuit structure, both -and -band ILFTs are designed and fabricated using 0.18- and 0.13- m CMOS technologies, respectively. The chip micropho-tograph of the -band ILFT is shown in Fig. 6: the chip area is 0.66 mm 0.69 mm. The varactors C1/C2 are not included in the -band ILFT. Hence, the selected value of inductors L1/L2 is chosen so that they can resonate with the total parasitic capac-itances at the drain of M3/M4 at the third harmonic frequency of the input injection signal. The chip photograph of the -band ILFT is shown in Fig. 7: the chip area is 0.59 mm 0.66 mm. The chip areas of both the proposed ILFTs are limited by the minimum distance between the pads.
An on-wafer measurement system incorporating a probe station, ground–signal–ground (GSG) coplanar probes (up to 67 GHz), and high-speed cable (up to 50 GHz) is used to measure chip performance. The input injection signal for the fabricated -band ILFT is from an analog signal generator and is connected to a 180 hybrid coupler. The output power is measured by a spectrum analyzer. A waveguide harmonic mixer is used to measure the output power of the fabricated
Fig. 6. Chip microphotograph ofK-band ILFT (0.66 mm 2 0.69 mm).
Fig. 7. Chip microphotograph ofV -band ILFT (0.59 mm 2 0.66 mm).
-band ILFT. Additionally, due to the higher cable loss of input signal for the -band ILFT, a microwave system amplifier is used to compensate the loss.
A. -Band ILFT
The fabricated -band ILFT starts to oscillate at a bias cur-rent of 0.79 mA from 1.5 V. The measured output spectra of the -band ILFT versus the output frequency under free-running and locked conditions with probe and cable losses are shown in Fig. 8(a) and (b), respectively. The measured peak output power is 22 dBm at 26.486 GHz under free-running condition and 9.4 dBm at 26.486 GHz under locked condition with a 4-dBm input injection power, a of 0.56 V, and 4.7-dB power loss from cable and probe. Due to the contribution of input injec-tion power, the locked ILFT has a higher output power than the free-running ILFT. The expected output power under locked conduction is 2 dBm, which is a 2.7-dB difference from the measurement result.
The measured input injection power versus the output fre-quency when the input bias is set at 0.56 V is shown
Fig. 8. Measured output spectra of the fabricatedK-band ILFT under: (a) free-running and (b) locked conditions with probe and cable losses.
Fig. 9. Measured input injection power versus output frequency with 1.5-V V forK-band ILFT.
in Fig. 9. The upper and lower locking ranges are labeled as the maximum and minimum output frequencies under locked condition, respectively. The simulated and measured injec-tion-locking ranges versus input injection power are shown in Fig. 10 where the measured injection-locking range is from 156 to 567 MHz, while the input injection power varies from 9 to 1 dBm. At an input injection power greater than 0 dBm, the injection-locking range decrease slightly, as shown in Fig. 10. With small input injection power, the measurement result is close to the simulation result. With large input injection power, the measured injection-locking range is smaller by 100 MHz. This is because the valid frequency range of the simulation model is not completely covered with the desired frequency range.
The injection-locking range is mainly determined by two im-portant factors. One is the nonlinear term of the frequency pre-generator, whereas the other is the nonlinear characteristic of the ILO. As input injection power is small, the linear model
Fig. 10. Simulated and measured injection-locking ranges versus input injec-tion power with 1.5-VV forK-band ILFT.
Fig. 11. Injection-locking range as a function of input biasV with 4-dBm input injection power and 1.5-VV forK-band ILFT.
of the ILO is valid. Thus, the injection-locking range is domi-nated by the nonlinear term , as can be seen from (6). As the input injection signal is increased, the injection-locking range is increased due to the increase of and . If the input signal is increased to a moderate value, which causes the conduction angle smaller than 250 , this leads to the large decrease of , as can be seen from Fig. 4. Thus, the injection-locking range is almost saturated.
The simulated and measured injection-locking range versus the input bias voltage of M1/M2 are shown in Fig. 11. It can be seen from Fig. 11 that the injection-locking range in-creases with a decrease in the input bias. This result can be ex-plained by the fact that the lower input bias allows only a small current through M3/M4. Thus, the weaker negative-resistance generated from M3/M4 reduces the effective quality factor of the LC tank. The conversion gain of the frequency pre-gener-ator also increases because of the shift of the conduction angle into the higher third harmonic current region, as can be seen from Fig. 4.
Fig. 12. Measured output frequency versus varactors biasV with 0.65-V V and 4-dBm input injection power forK-band ILFT.
Fig. 13. Measured phase noise of reference input, free-running output, and locked output with 0.65-VV and 4-dBm input injection power forK-band ILFT.
The varactors C1/C2 are designed in the -band ILFT. In Fig. 12, the total output frequency under locked condition is 3915 MHz, as the varactors tuning voltage varies from 0 to 1.5 V with a dc power consumption of 2.95 mW and an input injection power of 4 dBm. Since the quality factor of the var-actor decreases as the tuning voltage decreases, the extra dc power consumption is required to maintain the free-running output in the entire tuning range. In Fig. 12, the frequency range under locked condition with 1.5-V is different from that in Fig. 9 due to the different value.
The measured phase noises of the reference input, free-run-ning output, and locked output from 1 kHz to 10 MHz is shown in Fig. 13. It shows that the phase-noise difference between the reference input and the locked output is 10.5 dB from 1 kHz to 1-MHz offset. The slightly larger output phase noise at a signal frequency higher than 1-MHz offset is due to excess noise from the internal circuit and output buffer. The measured output phase noise as a function of input injection power is shown in Fig. 14. At large input injection power levels, the measured
Fig. 14. Measured phase-noise characteristics of locked output as a function of input injection power with 0.65-VV forK-band ILFT.
Fig. 15. Measured output power spectra of first, second, third, fourth, and fifth harmonics with 0.65-VV and 4-dBm input injection power forK-band ILFT.
phase noise of the locked output can approach the theoretical
limit of dB, as derived in Section II. The
phase-noise degradation from the frequency pre-generator is 0.8 dB at 1-kHz offset and 1.5 dB at 100-kHz offset, respec-tively. In addition, the phase noise at small frequency offset can be close to the theoretical limit as compared to that at large fre-quency offset with the same input incident amplitude due to the low-pass frequency response.
The measured output spectrum is shown in Fig. 15 where the HRRs compared to the desired third harmonic are 22.65, 30.58, 29.29, 40.35 dBc for the first, second, fourth, and fifth harmonics, respectively. The HRRs of even-order harmonics are 6.64 dB higher than those of odd-order harmonics because of the common-mode rejection capability of R1. In general, R1 does not affect the output performance for odd-order harmonics.
B. -Band ILFT
The -band ILFT starts to oscillate at a bias current of 1.55 mA from 1.2 V. The measured output spectra of the
Fig. 16. Measured output spectra of the fabricated V -band ILFT under: (a) free-running and (b) locked conditions with probe and cable losses.
Fig. 17. Measured input injection power versus output frequency forV -band ILFT.
-band ILFT versus the output frequency under free-running and locked conditions with probe and cable losses are shown in Fig. 16(a) and (b), respectively. The loss from the external waveguide subharmonic mixer is deembedded by the spectrum analyzer. The measured peak output power is 16.14 dBm at 60.025 GHz under free-running condition and 14.81 dBm at 60.025 GHz under locked condition with 4-dBm input injection power, a of 0.55 V, and 9.6-dB power loss from the cable and probe. The expected output power under locked conduction is 3.1 dBm, which is a 2.1-dB difference from the measurement result.
The measured input injection power versus the output fre-quency when the input bias is set at 0.55 V is shown is Fig. 17. It can be seen from Fig. 18 that the injection-locking range achieves 1422 MHz with 6-dBm input injection power and 1662 MHz with 9-dBm input injection power. As the input injection power is smaller than 1 dBm, the ILO stage is linear and is nearly constant. Thus, the injection-locking range is increased with . With the input injection power greater than
Fig. 18. Simulated and measured injection-locking range versus input injection power forV -band ILFT.
TABLE I
COMPARISONWITHPUBLISHEDSUBHARMONICILFMs
1 dBm, the injection-locking range is nearly saturated because of the large decrease of the nonlinear term . If the incident signal is increased to be larger than 2 dBm, the ILO becomes nonlinear and (6) is not valid. Under this condition, the extra third-order harmonic is generated by the nonlinear ILO. There-fore, the injection-locking range is increased instead of satu-rated.
Due to the limitations of the instruments currently available, the log plot of phase noise and HRR cannot be measured. From the simulation results, the phase-noise difference between the reference input and the locked output is 10 dB within 1-MHz offset with 4-dBm input injection power and the HRRs are higher than 20 dBc for every undesired harmonics.
In Table I, the published non-CMOS subharmonic ILFMs worked at the - and -band are compared with the proposed ILFTs. It can also be seen that the proposed ILFTs, in contrast to the corresponding non-CMOS subharmonic ILFMs, can operate with a lower dc power consumption, a wider injection-locking range, and reasonable input injection power. Moreover, this de-sign is the first CMOS ILFT in the millimeter-wave band. The published bulk-CMOS VCOs worked at the - and -band listed in Table II are compared with the proposed ILFTs. It can be seen that the injection-locking range of the proposed ILFT is similar to the tuning range of a bulk-CMOS VCO. The proposed
TABLE II
COMPARISONWITHPUBLISHEDBULK-CMOS VCOs
ILFT can provide higher output power and lower power con-sumption even when the input injection power is consid-ered, as compared with the corresponding bulk-CMOS VCOs. Furthermore, it can also be seen from comparisons in Tables I and II that the proposed ILFTs offer better performance in the generation of LO signals in the millimeter-wave band.
V. CONCLUSION
A millimeter-wave CMOS subharmonic ILFT with a triple-frequency pre-generator has been proposed and analyzed. A model for the proposed ILFT has been developed to calculate both the injection-locking range and the output phase noise. Based on the model, the design guideline for the maximiza-tion of the injecmaximiza-tion-locking range and the minimizamaximiza-tion of the output phase noise has been developed. The quality factor of the
LC tank and the conversion gain of the frequency pre-generator
have been maximized to obtain a wider injection-locking range, higher output voltage, and lower output phase noise with low dc power consumption.
According to the developed design guidelines, both the -and -band CMOS ILFTs have been designed and fabricated using 0.18- and 0.13- m technologies, respectively. As seen from the measurement results, the fabricated CMOS -band ILFT can achieve the injection-locking range of 4.83% with 4-dBm input injection power and 0.45-mW dc power consump-tion. Moreover, the injection-locking range of 15.06% is per-formed using varactors. The fabricated -band CMOS ILFT has an injection-locking range of 2.3% with 6-dBm input injection power and 1.86-mW dc power consumption. The measurement results have verified the performance of the proposed ILFTs.
Since it is feasible to design a high-performance VCO at low frequency without the use of full-speed frequency dividers, the proposed CMOS ILFT offers great potential application in LO signal generators for frequency synthesizers in the millimeter-wave band or even in the sub-millimeter-millimeter-wave band.
APPENDIXA By substituting (1)–(3) into (5),
(A.1)
where is the transconductance stage with output current in the ILO; is the incident signal with input fre-quency , amplitude , and phase ; and is the output signal with frequency and amplitude .
By neglecting the term in (4), by substituting other terms in (4) into (A.1), by assuming that any frequency not close to is filtered out by the frequency selective load , and by rearranging the terms, (A.1) can be rewritten as
(A.2) where
(A.3)
(A.4) and is the coefficient of the cubic term in the nonlinear char-acteristic function of the frequency pre-generator.
The approximate transfer function of the bandpass LC-tank filter can be written as
(A.5)
where and are the resonant frequency and quality factor of the LC tank, respectively. is the impedance of the LC tank at resonant frequency.
If the Barkhausen criterion is satisfied in the closed loop, the phase shift of the closed loop should be zero. Thus,
(A.6) Combing (A.4) and (A.6) gives
(A.7) By rearranging (A.7) and finding the solution for , the fol-lowing is derived:
(A.8)
where
If , the approximation in (A.10) is valid. The output voltage amplitude can be written as
(A.11)
By solving (A.11) and assuming , the
expression of the output amplitude can be rewritten as
(A.12) If the frequency pre-generator is removed from the ILFT, the nonlinear characteristic function is performed by the ILO. Thus, the injection-locking range can be derived as
(A.13) Whereas the output amplitude is represented as
(A.14) It can be seen from (A.13) that the injection-locking range can be increased by increasing . In general, the value of is negative, and an , which is too large, would degrade the output amplitude of the ILFT in (A.14) significantly. Obviously, if an ILFT works without the frequency pre-generator, the extra power consumption is required for both a large injection-locking range and large output amplitude.
APPENDIXB
To derive (9), the simplified noise source model of the pro-posed ILFT, as shown in Fig. 2, can be divided into two parts. One part is the noise calculation of the frequency pre-generator and the other is the noise analysis of the ILO. First, the noise characteristic between and is considered. The phase
noise spectral density at the node can be
expressed as [14]
(B.1)
where and are phase noise spectral
densi-ties of the injection signal and frequency pre-generator, respec-tively. is the offset frequency from output frequency .
(B.2)
where the corner frequency of the ILFT noise transfer function can be written as
(B.3) (B.4)
In the above equations, and are phase
noise spectral densities of output and internal circuits, respec-tively; is the conversion gain of the third harmonic signal in the frequency pre-generator; and are the resonant fre-quency and the quality factor of the LC tank in the bandpass filter, respectively; is the impedance of the LC tank at reso-nant frequency; and and indicate the amplitudes of input and output, respectively.
The combination of (B.1) and (B.2) results in the following:
(B.5)
ACKNOWLEDGMENT
The authors would like to thank the Chip Implementation Center (CIC), National Science Council, Taiwan, R.O.C. for the fabrication of the testing chips used in this study.
REFERENCES
[1] A. P. van der Wel, S. L. J. Gierkink, R. C. Frye, V. Boccuzzi, and B. Nauta, “A robust 43-GHz VCO in CMOS for OC-768 SONET appli-cations,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1159–1163, Jul. 2004.
[2] F. Ellinger, T. Morf, G. Buren, C. Kromer, G. Sialm, L. Rodoni, M. Schmatz, and H. Jackel, “60 GHz VCO with wideband tuning range fabricated on VLSI SOI CMOS technology,” in IEEE MTT-S Int.
Mi-crow. Symp. Dig., Jun. 2004, pp. 1329–1332.
[3] C. Cao and K. K. O, “Millimeter-wave voltage-controlled oscillators in 0.13-m CMOS Technology,” IEEE J. Solid-State Circuits, vol. 41, no. 6, pp. 1297–1304, Jun. 2006.
[4] J.-C. Chiu, C.-P. Chang, M.-P. Houng, and Y.-H. Wang, “A 12-36 GHz pHEMT MMIC balanced frequency tripler,” IEEE Microw. Wireless
Compon. Lett., vol. 16, no. 1, pp. 19–21, Jan. 2006.
[5] A. Boudiaf, D. Bachelet, and C. Rumelhard, “A high-efficiency and low-phase-noise 38-GHz pHEMT MMIC tripler,” IEEE Trans.
Microw. Theory Tech., vol. 48, no. 12, pp. 2546–2553, Dec. 2000.
[6] Y. Campos-Roca, L. Verweyen, M. Fernández-Barciela, E. Sánchez, M. C. Currás-Francos, W. Bronner, A. Hülsmann, and M. Schlechtweg, “An optimized 25.5–76.5 GHz pHEMT-based coplanar frequency tripler,” IEEE Microw. Guided Wave Lett., vol. 10, no. 6, pp. 242–244, Jun. 2000.
[7] J. F. Buckwalter, A. Babakhani, A. Komijani, and A. Hajimiri, “An in-tegrated subharmonic coupled-oscillator scheme for a 60-GHz phased-array transmitter,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 12, pp. 4271–4280, Dec. 2006.
[8] F.-H. Huang, C.-K. Lin, and Y.-J. Chan, “V -band GaAs pHEMT cross-coupled sub-harmonic oscillator,” IEEE Microw. Wireless
Compon. Lett., vol. 16, no. 8, pp. 473–475, Aug. 2006.
[9] S. Kishimoto, K. Maruhashi, M. Ito, T. Morimoto, Y. Hamada, and K. Ohata, “A 60-GHz-band subharmonically injection locked VCO MMIC operating over wide temperature range,” in IEEE MTT-S Int.
Microw. Symp. Dig., Jun. 2005, pp. 1689–1692.
[10] R. Adler, “A study of locking phenomena in oscillators,” Proc. IEEE, vol. 61, no. 10, pp. 1380–1385, Oct. 1973.
[11] T. Tokumitsu, K. Kamogawa, I. Toyoda, and M. Aikawa, “A novel in-jection-locked oscillator MMIC with combined ultrawide-band active combiner divider and amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 42, no. 12, pp. 2572–25787, Dec. 1994.
[12] H. R. Rategh and T. H. Lee, “Superharmonic injection-locked fre-quency dividers,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 813–821, Jun. 1999.
[13] S. Verma, H. R. Rategh, and T. H. Lee, “A unified model for injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 38, no. 6, pp. 1015–1027, Jun. 2003.
[14] X. Zhang, X. Zhou, and A. S. Daryoush, “A theoretical and experi-mental study of the noise behavior of subharmonically injection locked local oscillators,” IEEE Trans. Microw. Theory Tech., vol. 40, no. 5, pp. 895–902, May 1992.
[15] A. Mazzanti, P. Uggetti, and F. Svelto, “Analysis and design of injec-tion-locked LC dividers for quadrature generation,” IEEE J. Solid-State
Circuits, vol. 39, no. 9, pp. 1425–1433, Sep. 2004.
[16] S. A. Maas, “Active frequency multipliers,” in Nonlinear Microwave
and RF Circuits, 2nd ed. Norwood, MA: Artech House, 2003, ch. 10, sec. 2, pp. 477–490.
[17] K. Kamogawa, T. Tokumitsu, and I. Toyoda, “A 20-GHz-band subhar-monically injection-locked oscillator MMIC with wide locking range,”
IEEE Microw. Guided Wave Lett., vol. 7, no. 8, pp. 233–235, Aug.
1997.
[18] K. Kamogawa, T. Tokumitsu, and M. Aikawa, “Injection-locked oscillator chain: A possible solution to millimeter-wave MMIC synthesizers,” IEEE Trans. Microw. Theory Tech., vol. 45, no. 9, pp. 1578–1584, Sep. 1997.
[19] H.-H. Hsieh and L.-H. Lu, “A low-phase-noiseK-band CMOS VCO,”
IEEE Microw. Wireless Compon. Lett., vol. 16, no. 10, pp. 552–554,
Oct. 2006.
[20] D. Ozis, N. M. Neihart, and D. J. Allstot, “Differential VCO and pas-sive frequency doubler in 0.18m CMOS for 24 GHz applications,” in IEEE Radio Freq. Integr. Circuits Symp. Dig., Jun. 2006, 4 pp.
[21] C.-M. Hung, L. Shi, and K. K. O, “A 25.9-GHz voltage-controlled os-cillator fabricated in a CMOS process,” in VLSI Circuits Symp. Tech.
Dig., Jun. 2000, pp. 100–101.
[22] M. Tiebout, H.-D. Wohlmuth, and W. Simburger, “A 1 V 51 GHz fully-integrated VCO in 0.12m CMOS,” in IEEE Int. Solid-State Circuits
Conf. Tech. Dig., Feb. 2002, pp. 300–301.
[23] D. Huang, W. Hant, N.-Y. Wang, T. W. Ku, Q. Gu, R. Wong, and M.-C. Chang, “A 60 GHz CMOS VCO using on-chip resonator with em-bedded artificial dielectric for size, loss, and noise reduction,” in IEEE
Int. Solid-State Circuits Conf. Tech. Dig., Feb. 2006, pp. 1218–1227.
Min-Chiao Chen (S’06) was born in Miaoli, Taiwan,
R.O.C., in 1980. He received the B.S. degree in com-munication engineering from National Chiao Tung University, Hsinchu, Taiwan, R.O.C., in 2002, and is currently working toward the Ph.D. degree at the In-stitute of Electronics, National Chiao Tung Univer-sity, Hsinchu, Taiwan, R.O.C.
His current research interests are in design of linear and nonlinear millimeter-wave CMOS circuits.
Chung-Yu Wu (S’76–M’76–SM’96–F’98) was born
in 1950. He received the M.S. and Ph.D. degrees in electronics engineering from National Chiao Tung University, Hsinchu, Taiwan, R.O.C., in 1976 and 1980, respectively.
Since 1980, he has been a consultant to high-tech industry and research organizations and has built up strong research collaborations with high-tech indus-tries. From 1980 to 1983, he was an Associate Pro-fessor with National Chiao Tung University. From 1984 to 1986, he was a Visiting Associate Professor with the Department of Electrical Engineering, Portland State University, Port-land, OR. Since 1987, he has been a Professor with National Chiao Tung Uni-versity. From 1991 to 1995, he was the Director of the Division of Engineering and Applied Science, National Science Council, Taiwan, R.O.C. From 1996 to 1998, he was honored as the Centennial Honorary Chair Professor with Na-tional Chiao Tung University. He is currently the President and Chair Professor of National Chiao Tung University. In Summer 2002, he conducted post-doc-toral research with the University of California at Berkeley. He has authored or coauthored over 250 technical papers in international journals and confer-ences. He holds 19 patents, including nine U.S. patents. His research interests are nanoelectronics, biomedical devices and system, neural vision sensors, RF circuits, and computer-aided design (CAD) and analysis.
Dr. Wu is a member of Eta Kappa Nu and Phi Tau Phi. He was a recipient of the 1998 IEEE Fellow Award and a 2000 Third Millennium Medal. He has also been the recipient of numerous research awards presented by the Ministry of Education, National Science Council (NSC), and professional foundations in Taiwan, R.O.C.