國
立
交
通
大
學
電子工程學系 電子研究所碩士班
碩 士 論 文
數位電視廣播之通道估測與等化器設計
Design of Channel Estimation and Equalizer
for DVB-T/H
研究生：洪子捷
指導教授：周世傑 博士
數位電視廣播之通道估測與等化器設計
Design of Channel Estimation and Equalizer
for DVB-T/H
研究生：洪子捷 Student：Tzu-Chieh Hung
指導教授：周世傑 博士 Advisor：Dr. Shyh-Jye Jou
國立交通大學
電子工程學系 電子研究所碩士班
碩士論文
A Thesis
Submitted to Department of Electronics Engineering &
Institute of Electronics
College of Electrical and Computer Engineering
National Chiao Tung University
in Partial Fulfillment of the Requirements
for the Degree of
Master of Science
In
Electronics Engineering
January 2008
Hsinchu, Taiwan, Republic of China
數位電視廣播之通道估測與等化器設計
研 究 生 ： 洪 子 捷 指 導 教 授 ： 周 世 傑 博 士
國立交通大學
電子工程學系 電子研究所碩士班
摘要
在地面及手持式數位電視傳播系統中，通道估測以及等化器在接收端佔了很 重要的角色，尤其在手持系統中，傳統的設計將無法應付通道的時變性，但是太 過於複雜的設計又會對手持系統造成負擔。為因應時變通道之影響，並考慮硬體 上對手持系統的負擔 ，本篇論文提出了一個新的通道估測演算法，以求在只增 加些許硬體複雜度的前提下來降低時變通道的影響。此演算法藉由“預先決策＂ 的方式降低計算虛擬領航碼時的誤差，更加上“停而做＂的演算法，來減少決策 錯誤時的代價，而此演算法能應用在各種傳統的通道估測法上，增加通道估測的 準確度約 7%至 11% (BER)。而在硬體的實現上，本篇論文以無除法之原則，實現 該演算法，並簡化了“停而做＂的硬體架構，以達到低複雜度之目標。使用 0.18 微米之 CMOS 製程，此新演算法所增加的面積為 150034 平方微米約 15154 個邏輯 閘，佔原本接收器的面積約 7.3%。Design of Channel Estimation and Equalizer
for DVB-T/H
Student：Tzu-Chieh Hung Advisor：Dr. Shyh-Jye Jou
Department of Electronics Engineering & Institute of Electronics
National Chiao Tung University
Abstract
In DVB-T/H system, channel estimation plays an important role in DVB receiver. Especially in hand held system, time variant channel will cause the distortion of the transmitted signals. Thus, a new channel estimation algorithm is proposed in this thesis to reduce the distortion of the transmission in the variant channel. This algorithm use the concept “Pre-Decision” to reduce the error of the virtual pilots. Moreover, the concept “Stop-And-Go” is used to reduce the penalty when the wrong decision is made. This channel estimation method can be combined with those traditional channel estimation methods. By adopting this algorithm, the performance can be improved about 7% to 11% (BER). For hand held system, low hardware complexity is the design target. In this thesis, division-free design is used in the hardware architecture and the architecture of Stop-And-Go is also simplified to reduce the complexity of hardware. Using 0.18 um CMOS process, the area of Pre-Decision block is 150034 um2 and the gate count is 15154. Thus, the area of Pre-Decision block is about 7.3% of the original receiver area.
誌謝
在研究所的生涯中，非常感謝周世傑老師能給予我這個寶貴的機
會完成本論文，並感激周老師在學業上及人生目標上對我的指導與建
議，感謝父母親多年來的支持與照顧，有了他們的期待與鞭策，我才
能順利完成學業，並感謝他們對我的包容，在求學的過程中為他們添
了許多麻煩，但父母親總能夠以寬容的心給予我溫暖與關懷，也感謝
大學同學以及實驗室同學，這些日子以來總能同甘共苦地渡過每個難
關，互相扶持。感謝電子系的栽培，優良的師資與完善的教育制度使
我擁有一技之長，並培養我們獨立自主的思考，讓我們能夠在未來的
人生中克服困難。最後要感謝的是我的女友，在艱困的時候陪伴我並
適時地給我建議。
Thesis Content
Chapter 1. Introduction... 1
1.1 Overview of Digital TV Broadcasting... 1
1.2 DTV System in Taiwan - DVB-T/H... 2
1.3 Motivation... 3
1.4 Thesis Organization... 4
Chapter 2 OFDM and DVB-T/H Technology... 5
2.1 Concept of OFDM System... 5
2.2 DVB-T/H Technology... 7
2.2.1 MPEG-2 Source Coding and Multiplexing... 7
2.2.2 Channel Coding... 7
2.2.3 Mapper & Frame... 10
2.2.4 Reference Signals... 10
2.2.5 DVB-H ... 13
Chapter 3 Channel Estimation Algorithm... 15
3.1 Pilot-based OFDM System... 15
3.2 Piecewise Interpolation... 18
3.2.1 Linear Inner Interpolation... 19
3.2.2 Gaussian Estimation... 19
3.2.3 Cubic-Spline Estimation... 20
3.2.4 Parabolic Estimation... 20
3.3 Frequency Domain Channel Estimation... 21
3.3.1 1-D Channel Estimation... 21
3.3.2 2-D Channel Estimation... 26
3.3.3 2-D Predictive Channel Estimation... 28
3.3.4 2-D Middle Point Channel Estimation... 30
3.4 Pre-Decision Algorithm... 31
3.4.2 Pre-Decision Algorithm With 1-D Channel Estimation... 34
3.4.3 Pre-Decision Algorithm With 2-D Channel Estimation... 36
3.4.4 Pre-Decision Algorithm With 2-D Predictive Channel Estimation... 37
3.4.5 Pre-Decision Algorithm With 2-D Middle Point Channel Estimation... 38
3.5 Channel Compensation and Demapper... 39
3.6 Performance Simulation And Comparison... 41
Chapter 4 Architecture Of Channel Estimation... 48
4.1 Architecture of DVB-T/H Inner Receiver... 48
4.2 Architecture of Channel Estimation... 48
4.2.1 Frequency domain channel Estimation... 49
4.2.2 Architecture of Pre-Decision Algorithm... 52
4.3 Simulation Result... 56
Chapter 5 Conclusion And Future Work... 58
