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Timing Jitter and Modulation Profile Extraction for Spread-Spectrum Clocks

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Fig. 1. (a) Modulation profile. (b) PSD of the SSC.
Fig. 2. Jitter measurement methodology.
Fig. 7. Noise model of the SSCG.
Fig. 8 shows the SSCG under test [17]. A ten-phase clock is generated and fed into the multiplexer (MUX)
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