Paper 8-6
An Open-Loop Class-D Audio Amplifier with Increased
Low-Distortion Output Power and PVT-Insensitive EMI Reduction
Shih-Hsiung Chien
1, Li-Te Wu
2, Ssu-Ying Chen
2, Ren-Dau Jan
2, Min-Yung Shih
2, Ching-Tzung Lin
2and
Tai-Haur Kuo
11
National Cheng Kung University, Tainan, Taiwan,
2
NeoEnergy Microelectronics, Inc., Hsinchu, Taiwan
Outline
Background and Motivation
System Overview
Proposed Techniques
Adaptive-Coefficient Delta-Sigma Modulator
PVT-Insensitive Low-EMI Control Method
Measurement Results
Conclusions
Digital-Input Audio Amplifier
Class-AB amplifier with DAC
Class-D amplifier with DAC
Class-D amplifier with digital PWM (DPWM) gen.
Class-AB Amp.
Digital Input
Speaker DAC Load
Class-D Amp.
Low-Pass Filter Digital
Input
Speaker DAC Load
DPWM Class-D
Amp.
Low-Pass Filter Digital
Input
Speaker Load
Class-D Amplifier with DPWM
Pros
High efficiency
No need of high-resolution DAC
Cons
Distortion from class-D amp. Degraded THD+N
Need of L-C low-pass filter for EMI suppression
DPWM Class-D
Amp.
Low-Pass Filter Digital
Input
Speaker Load
Closed-Loop vs. Open-Loop
Closed-loop architecture
Open-loop architecture adopted in this work
Lower complexity
Easier design porting to advanced processes
Smaller chip area
DSM
PCM-to-PWM Converter
(gain=1)
Analog Loop Filter Interpo-
lator (gain=1) Digital
Input
Power Stage Feedback Path (feedback factor = β )
clock
DPWM
Low-Pass Filter
Speaker Load
DSM
PCM-to-PWM Converter
(gain=1)
Power Stage Interpo-
lator (gain=1) Digital
Input clock
Low-Pass Filter
Speaker Load
DPWM
THD+N vs. Output Power
Distortion and noise sources
Constant noise
Power stage distortion
Clip distortion
Low-distortion P
OUT= max. P
OUTwith THD+N<1%
Dominated by clip distortion due to DSM instability
T HD + N (%)
Output Power, P
OUT(W) 1%
Low-Distortion P
OUTDSM Instability in Open-Loop
When DSM input is large
DSM’s quantizer overload
clipping at DSM
OUT clip distortion at amp. output
decreased low-distortion output power
Clipping Error DSM
PCM-to-PWM Converter (gain 1/k=1)
Power Stage Interpo-
lator (gain k=1) Digital
Input
DSMOUT clock PWMOUT
Power Output
Input mag.
(dBFS)
SNDR(dB)
0
SNDR @ DSMOUT
SNDR(dB)
Input mag. 0
(dBFS)
SNDR @ PWMOUT
1%
Output power (W)
THD+N(%)
THD+N vs. output power
DSM Instability in Open-Loop
To reduce DSM input: interpolator’s gain
To increase gain after DSM: PCM-to-PWM’s gain
Clipping at PWM
OUT DSM instability can NOT be prevented by scaling k
Clipping Error DSM
PCM-to-PWM Converter (gain 1/k >1)
Power Stage Interpo-
lator (gain k<1) Digital
Input
DSMOUT clock PWMOUT
Power Output
Input mag.
(dBFS)
SNDR(dB)
0
SNDR @ DSMOUT
SNDR(dB)
Input mag. 0
(dBFS)
SNDR @ PWMOUT
1%
Output power (W)
THD+N(%)
THD+N vs. output power
Common-Mode EMI Reduction
Conventional BD modulation
Common-Mode Free BD (CMFBD) modulation [1]
[1] P. Siniscalchi and R. Hester, “A 20W/channel class-D amplifier with significantly reduced common-mode radiated emissions,” IEEE ISSCC 2009.
VDD/2 VDD
0 VDD
0 VDD
0
VCM OUT
NOUT
PVDD/2 VDD
0 VDD/2 VDD
0 VDD/2
VCM
OUT
NOUT
PTargets of This Work
Increase low-distortion output power for open-loop class-D amplifiers without
increasing supply voltage
increasing off-chip components
sacrificing THD+N at small output power
Reduce common-mode EMI without
using expensive L-C filters
PVT-sensitive issue
System Overview
Block diagram of this work
Two selectable modes
BD-Modulation Mode
Delta-Sigma Modulator
(DSM)
PCM-to- PWM Converter
Power Stage Interpo-
lator Digital
Input
OUTP Low- Pass Filter OUTN
Dual-Mode Output Stage
SEL Proposed ACDSM
x[n] y[n]
Adaptive Coefficient
Set[n]
OUTP OUTN
bead C bead OUTP L
OUTN
L C
Low-EMI Mode [1]
DSMA
DSMB 20
0
-40
-80 -20
G ai n (dB )
-600.1 1 10 100 192
Frequency (kHz)
Trade-Off in DSM Design
Two DSM Designs
DSM
A: high in-band noise suppression
DSM
B: full-scale stable input range
NTF plot
Root-locus plot
-1 -0.5 0 0.5 1
Real axis
Im agi nar y ax is
unit circle
DSMA DSMB
1 0.5
-0.5 0
-1
Proposed ACDSM
Adaptive-Coefficient Delta-Sigma Modulator (ACDSM)
Small x[n] coef. with high in-band noise suppression
Large x[n] coef. with full-scale stable input range
g1[n]·H
Quantizer
g2[n]·H g3[n]·H g4[n]·H g5[n]·H
y[n]
x[n]
a1[n] a2[n] a3[n] a4[n] a5[n]
b1[n]
b2[n]
b3[n]
b4[n]
Direct Coefficient Switching
Coefficient is switched between
Small x[n] Set
A(high in-band noise suppression)
Large x[n] Set
B(full-scale stable input range)
large internal transient spike DSM unstable
Delta-Sigma Modulator (DSM)
Set
By[n]
x[n]
Set
ASet
A= [g
1A,...g
5A,a
1A,...a
5A,b
1A,...b
4A]
Set
B= [g
1B,...g
5B,a
1B,...a
5B,b
1B,...b
4B]
ACDSM Algorithm
Linear-interpolated coefficient changing
operating coefficient set is changed with small Set
Δ internal transient spike is reduced
N Sets Delta-Sigma Modulator (DSM)
Set
BSetΔ
y[n]
x[n]
Set
1Set
NSet
A SetΔ SetΔ SetΔProposed ACDSM Algorithm
Dynamic Range (DR) Plots
The ACDSM simultaneously achieves
a wide stable input range
high in-band noise suppression
100
80
60
-1 -0.5 0
DSMA
DSMB ACDSM
120
-40 -30 -20 -10 0
Input Magnitude (dBFS)
SNDR (dB)
100
80
60 50
CMFBD Realization
Previous low-EMI control method [1]
[1] P. Siniscalchi and R. Hester, “A 20W/channel class-D amplifier with significantly reduced common-mode radiated emissions,” IEEE ISSCC 2009.
turn-on:
M2, M3
turn-on:
M5, M6
turn-on:
M1, M4
S1 S2
S0
M1
M5 M6
M2
M3
M4
OUTP OUTN
VDD
VG1
VG4
VG5 VG6
Speaker Load
Previous Low-EMI Control (1/3)
In state S
0turn-on:
M2, M3 turn-on:
M5, M6 turn-on:
M1, M4
S1 S2
S0
V
G1, V
G4t
t
t
OUT
POUT
NS0 M1
M5 M6
M2
M3
M4
OUTP OUTN
VDD
VG1
VG4
VG5 VG6
Speaker Load
V
G5,
V
G6Previous Low-EMI Control (2/3)
In transition from S
0into S
1turn-on:
M2, M3
turn-on:
M5, M6
turn-on:
M1, M4
S1 S2
S0
t
t
t S0
Speaker Load M1
M5 M6
M2
M3
M4
OUTP OUTN
VDD
VG1
VG4
VG5 VG6
V
G1, V
G4OUT
POUT
NV
G5,
V
G6Previous Low-EMI Control (3/3)
In state S
1turn-on:
M2, M3 turn-on:
M5, M6 turn-on:
M1, M4
S1 S2
S0
t
t
t S0 S1
Speaker Load M1
M5 M6
M2
M3
M4
OUTP OUTN
VDD
VG1
VG4
VG5 VG6
V
G1, V
G4OUT
POUT
NV
G5,
V
G6PVT Variation Effect (1/2)
Significant shoot-through current
t
t
t Speaker Load
M1
M5 M6
M2
M3
M4
OUTP OUTN
VDD
VG1
VG4
VG5 VG6
Shoot-through
turn-on:
M2, M3
turn-on:
M5, M6
turn-on:
M1, M4
S1 S2
S0
V
G1, V
G4OUT
POUT
NV
G5,
V
G6PVT Variation Effect (2/2)
Additional output voltage transition
t
t
t Speaker Load
M1
M5 M6
M2
M3
M4
OUTP OUTN
VDD
VG1
VG4
VG5 VG6
Additional transition
turn-on:
M2, M3 turn-on:
M5, M6 turn-on:
M1, M4
S1 S2
S0
V
G1, V
G4OUT
POUT
NV
G5,
V
G6CMFBD Realization
Proposed low-EMI control method
M1
M5 M6
M2
M3
M4
OUTP OUTN
VDD
VG1
VG4
VG5 VG6
Speaker Load
turn-on:
M2, M3, M6 turn-on:
M6 turn-on:
M5, M6 turn-on:
M5 turn-on:
M1, M4, M5
SC SD SE
SA SB
Proposed Low-EMI Control (1/4)
In state S
AM1
M5 M6
M2
M3
M4
OUTP OUTN
VDD
VG1
VG4
VG5 VG6
Speaker Load
turn-on:
M2, M3, M6 turn-on:
M6 turn-on:
M5, M6 turn-on:
M5 turn-on:
M1, M4, M5
SC SD SE
SA SB
t
t
t SA
t
V
G5OUT
POUT
NV
G6V
G1,
V
G4Proposed Low-EMI Control (2/4)
In transition from S
Ainto S
Bt
t
t SA
t M1
M5 M6
M2
M3
M4
OUTP OUTN
VDD
VG1
VG4
VG5 VG6
Speaker Load
turn-on:
M2, M3, M6 turn-on:
M6 turn-on:
M5, M6 turn-on:
M5 turn-on:
M1, M4, M5
SC SD SE
SA SB
V
G5OUT
POUT
NV
G6V
G1,
V
G4Proposed Low-EMI Control (3/4)
In state S
Bt
t
t SA
t M1
M5 M6
M2
M3
M4
OUTP OUTN
VDD
VG1
VG4
VG5 VG6
Speaker Load
turn-on:
M2, M3, M6 turn-on:
M6 turn-on:
M5, M6 turn-on:
M5 turn-on:
M1, M4, M5
SC SD SE
SA SB
SB
V
G5OUT
POUT
NV
G6V
G1,
V
G4Proposed Low-EMI Control (4/4)
In state S
Ct
t
t SA
t
SC M1
M5 M6
M2
M3
M4
OUTP OUTN
VDD
VG1
VG4
VG5 VG6
Speaker Load
turn-on:
M2, M3, M6 turn-on:
M6 turn-on:
M5, M6 turn-on:
M5 turn-on:
M1, M4, M5
SC SD SE
SA SB
SB
V
G5OUT
POUT
NV
G6V
G1,
V
G4Chip Micrograph
2 .45 mm
1.5 mm
DS M M
5,6of L
CHM
5,6of R
CHM
1of L
CHM
3of L
CHM
2,4of
L
CHM
3of R
CHM
1of R
CHM
2,4of
R
CHG at e D ri v e r
Digital Audio Processor
0.2 mm
0.3 mm
THD+N vs. Output Power
Measurement condition: 24-V
DD, 8- Ω, BD modulation
30-W low-distortion output power
20% increase by ACDSM
0.1 0.5 1 5 10 20 30 Output power (W)
1.5
THD+N (%)
1 0.5
0.1 0.05
DSM
ADSM
BACDSM
1.5 1
0.5 0.2 0.1
20 25 30
increased by 5W
EMI Measurement
Conducted EMI
Radiated EMI
0.15 0.5 1 5 10 20 30 Frequency (MHz)
60
40
20
Level (dBμV/m)
low-EMI mode BD-modulation mode
Frequency (MHz) 60
20
0.15 0.5 1 5 10 20 30
8 dBμV/m
Level (dBμV/m)
30 64 98 132 166 200 360 520 680 840 1000 Frequency (MHz)
50
30
10
BD-modulation mode
low-EMI mode
FCC class-B standard
24 dBμV/m
31 of 32
© 2014 IEEE IEEE Custom Integrated Circuits Conference 2014
Comparison
( )
/(2 )Power Output
Normalized 2
L DD
OUT
R η V
P
⋅
= ⋅
(1)
g q y ( ) Chip Area
(4)(mm
2)
Process
3.74 (stereo) 0.18 μm BCDMOS
23.9 (5.1-ch) 0.35 μm HVCMOS
0.76 (stereo) 65nm CMOS
Supply Voltage V
DD(V)
Nominal Load R
L( Ω) Peak Efficiency η (%) Output Power P
OUT(W)
@ 1%THD+N
Normalized Output Power
(1)@ 1%THD+N
DSM Max. Stable Input (dBFS)
EMI Reduction
(2)(dB μV/m)
This Work 24
8 90 30 1.03 +0.2 8 (conducted)
24 (radiated)
(3)
JSSC 2012 [3]
18 8 88 13 0.83
-1.2 -
JSSC 2010 [4]
3 8 88 0.4 0.92
-0.7 -
Conclusion
A 30-W open-loop class-D amplifier is implemented for a 24-V supply voltage and 8- Ω load
The ACDSM simultaneously achieves
high in-band noise suppression
wide stable input range
20% low-distortion P
OUTincrease