Boolean logic

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Boolean logic

Introduction to Computer p Yung-Yu Chuang

with slides by Sedgewick & Wayne (introcs.cs.princeton.edu), Nisan & Schocken

(www.nand2tetris.org) and Harris & Harris (DDCA)

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Boolean Algebra

Based on symbolic logic, designed by George Boole y g , g y g Boolean variables take values as 0 or 1.

Boolean expressions created from: p

NOT, AND, OR

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NOT

Digital gate diagram for NOT:

X X’

Digital gate diagram for NOT:

NOT

3

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AND

XY XY

Digital gate diagram for AND:

AND

AND

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OR

X+Y

Di it l t di f OR Digital gate diagram for OR:

OR

5

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Operator Precedence

Examples showing the order of operations:

NOT > AND > OR NOT > AND > OR

Use parentheses to avoid ambiguity

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Defining a function

Description: square of x minus 1 Algebraic form : x g 2 -1

Enumeration: x f(x)

1 0

1 0

2 3

3 8

4 15

5 24

: :

: :

7

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Defining a function

Description: number of days of the x-th month of a

non-leap year p y x f(x)

Algebraic form: ? Enumeration:

x f(x)

1 31

2 28

3 31

4 30

5 31

6 30

7 31

8 31

9 30

10 31

11 30

11 30

12 31

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Truth Table Truth table.

Systematic method to describe Boolean function. y

One row for each possible input combination.

N inputs  2 N rows.

0 0

0 1

0 0

x y x y

0 1

1 0

1 1

0 0 1

AND truth table

9

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Proving the equivalence of two functions

Prove that x 2 -1=(x+1)(x-1)

Using algebra: (you need to follow some rules) (x+1)(x-1) = x 2 +x-x-1= x 2 -1

Using enumeration: x (x+1)(x-1) x 2 -1

1 0 0

1 0 0

2 3 3

3 8 8

4 15 15

4 15 15

5 24 24

: : :

: : :

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Important laws x + 1 = 1

x + 0 = x x + y = y + x x + (y+z) = (x+y) + z

x + x = 1 (y ) ( y)

x.1 = x

x.0 = 0 x.y = y.x

x.(y.z) = (x.y).z x.x = 0

D M L x.(y+z) = xy + xz DeMorgan Law

x.y = x + y

11

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Simplifying Boolean Equations

Example 1:

Y = AB + AB

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Simplifying Boolean Equations

Example 1:

Y = AB + AB

= B(A + A)

= B(A + A)

= B(1)

= B

Chapter 2 <13> 

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Simplifying Boolean Equations

Example 2:

Y = A(AB + ABC)

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Simplifying Boolean Equations

Example 2:

Y = A(AB + ABC)

= A(AB(1 + C))

= A(AB(1 + C))

= A(AB(1))

= A(AB) (AA)B

= (AA)B

= AB

Chapter 2 <15> 

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DeMorgan’s Theorem

Y = AB = A + B A

B Y

B A

B Y

B

Y = A + B = A B A A B Y

A Y

A

B Y

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Bubble Pushing

Backward:

– Body changes

– Adds bubbles to inputs

A

B Y A

B Y

Forward:

– Body changes

– Adds bubble to output

A

B Y

A

B Y

Chapter 2 <17> 

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Bubble Pushing

• What is the Boolean expression for this circuit?

A B

Y C

D

D

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Bubble Pushing

• What is the Boolean expression for this circuit?

A B

Y C

D D

Y = AB + CD

Chapter 2 <19> 

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Bubble Pushing Rules

• Begin at output, then work toward inputs

• Push bubbles on final output back

• Draw gates in a form so bubbles cancel

A

• Draw gates in a form so bubbles cancel

A B C D

Y

D

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Bubble Pushing Example

A B

C Y

D

Chapter 2 <21> 

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Bubble Pushing Example

A B

no output bubble

C Y

D

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Bubble Pushing Example

A B

no output bubble

C Y

D

bubble on input and output A

B C D

Y

Chapter 2 <23> 

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Bubble Pushing Example

A B

no output bubble

C Y

D

bubble on input and output A

B C D

Y

A B

no bubble on input and output

C D

Y

Y = ABC + D

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Truth Tables (1 of 3)

A Boolean function has one or more Boolean inputs and returns a single Boolean output inputs, and returns a single Boolean output.

A truth table shows all the inputs and outputs of a Boolean function

of a Boolean function

Example: X  Y

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Truth Tables (2 of 3)

Example: X  Y

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Truth Tables (3 of 3)

S

When s=0, return x; otherwise,

return y.

XY mux Z

Example: (Y  S)  (X  S) Two-input multiplexer

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Truth Table for Functions of 2 Variables Truth table.

16 Boolean functions of 2 variables. every 4-bit value represents one

ZERO

y AND x y XOR OR

x y ZERO

0 0

0 1 0

0 0

0 1

x

0 0

AND

0 0

y

0 1

XOR

0 1

OR

0 1

x

0

Truth table for all Boolean functions of 2 variables

1 0 0

1 1 0

1 0

0 0 1

1 0

1

0 1

1 0

1 1

NOR y

0 1

y'

1

x'

1 1

EQ

1 1

NAND

1

ONE

1

x

0 0 1

0 1 0

1 0 0

1 0 1

1 1 0 1

0 1 1

0 0

1 1 0

1 1 1

1 1 1 0

Truth table for all Boolean functions of 2 variables

1 1 0 1 0 1 0 1 0 1

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All Boolean functions of 2 variables

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 29

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Truth Table for Functions of 3 Variables Truth table.

16 Boolean functions of 2 variables. every 4-bit value represents one 8 bi l

256 Boolean functions of 3 variables.

2^(2^n) Boolean functions of n variables!

every 8-bit value represents one every 2

n

-bit value represents one

AND z

y

x OR MAJ ODD

0 0

0 1 0

1 0 0

0 0

0 0

0 1 1

0 0 0

0 1 1

1 1 0

0

0

0 1

0 1

1

0 0

1 1 1

1 0 1

0 1 0

0 1

1 0

1 1

1 1 1

0 0 1

1 1 1

1 1 1

0

0

1

some functions of 3 variables

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Sum-of-Products

Sum-of-products. Systematic procedure for representing a Boolean function using AND, p g g , OR, NOT.

Form AND term for each 1 in Boolean function.

proves that { AND, OR, NOT } are universal

OR terms together.

x'yz

z MAJ xy'z xyz' xyz

y

x x'yz + xy'z + xyz' + xyz

0 0 0 0

1 0 0

0 1 0

0 0

0 0 0

0 0 0

0 0 0

0 0 0

0 0 0 1

0 1 1

0 1 1

0 0 0

1 1

1 0 0

0 0 1

0 0 0

0 0 0

1 0 1

expressing MAJ using sum of products 1

1 0

1 1

1 1

1

0 0

0 0

1 0

0 1

1 1

31

expressing MAJ using sum-of-products

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Universality of AND, OR, NOT

Fact. Any Boolean function can be expressed using AND, OR, NOT. g , ,

{ AND, OR, NOT } are universal.

Ex: XOR(x,y) = xy' + x'y. x' NOT x

x AND y x y

Meaning Notation

'

Expressing XOR Using AND, OR, NOT

' ' ' '

'

x AND y x y

x OR y x + y

x' y

0 1

1 1

x'y

0 1

x'y + xy'

0 1

xy'

0 0

y'

1 0

x XOR y

0 1

x

0 0

Exercise Show {AND NOT} {OR NOT} {NAND}

0 0

1 0

0 0

1 0 1

0 1

0

1 0 1

1

Exercise. Show {AND, NOT}, {OR, NOT}, {NAND}, {NOR} are universal.

Hint. DeMorgan's law: (x'y')' = x + y.

H . D M g w ( y ) y.

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From Math to Real-World implementation We can implement any Boolean function using

NAND gates only. g y

We talk about abstract Boolean algebra g (logic) so far.

Is it possible to realize it in real world?

Th t h l d t it it hi d The technology needs to permit switching and

conducting. It can be built using magnetic, ti l bi l i l h d li d ti optical, biological, hydraulic and pneumatic mechanism.

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Implementation of gates

Fluid switch (http://www.cs.princeton.edu/introcs/lectures/fluid-computer.swf

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Digital Circuits What is a digital system?

Analog: signals vary continuously. g g y y

Digital: signals are 0 or 1.

2.8V 3.3V

0 1 0

Why digital systems? 0.0V 0.5V

2.8V

y g y

Accuracy and reliability.

Staggeringly fast and cheap.

Basic abstractions.

On off

On, off.

Wire: propagates on/off value.

Switch: controls propagation of on/off values

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w p p g f / ff u

through wires.

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Wires Wires.

On (1): connected to power. p

Off (0): not connected to power.

If a wire is connected to a wire that is on, that wire is also on

wire is also on.

Typical drawing convention: "flow" from top, left to bottom, right.

to bottom, r ght.

power

1 p 1

connection 1

1

0

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Controlled Switch

Controlled switch. [relay implementation]

3 connections: input, output, control. p p

Magnetic force pulls on a contact that cuts electrical flow.

Control wire affects output wire but output does

Control wire affects output wire, but output does not affect control; establishes forward flow of information over time. nformat on over t me.

X

37

X

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Relay

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Circuit Anatomy

39

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Logic Gates: Fundamental Building Blocks

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NOT

41

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NOT

0

1 1

00

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OR

43

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Series relays = NOR

0 1

0 0

1 0

1

1 0 1

0 0 0

0

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OR

45

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AND

(47)

AND

47

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Logic Gates: Fundamental Building Blocks

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What about parallel relays? =NAND 0 0

1 1

0 1

0 1

49

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Can we implement AND/OR using parallel relays?

Now we know how to implement AND,OR and NOT. We can just use them as black boxes j without knowing how they were implemented.

Principle of information hiding. p g

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Multiway Gates Multiway gates.

OR: 1 if any input is 1; 0 otherwise. y p

AND: 1 if all inputs are 1; 0 otherwise.

Generalized: negate some inputs.

51

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Multiway Gates Multiway gates.

OR: 1 if any input is 1; 0 otherwise. y p

AND: 1 if all inputs are 1; 0 otherwise.

Generalized: negate some inputs.

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Multiway Gates Multiway gates.

Can also be built from 2-way gates (less efficient y g but implementation independent)

Example: build 4-way OR from 2-way ORs

53

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Translate Boolean Formula to Boolean Circuit

Sum-of-products. XOR.

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Translate Boolean Formula to Boolean Circuit Sum-of-products. XOR.

55

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Translate Boolean Formula to Boolean Circuit

Sum-of-products. XOR.

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Gate logic

Interface

Xor a

out Interface

Xor

b out

b t

I l t ti

0 0 0 0 1 1

1 0 1

a b out

And

a

Not

Implementation

1 0 1 1 1 0

Not

Or

out

Not

And Not

b

( b) ( d( N (b)) d(N ( ) b)))

Xor(a,b) = Or(And(a,Not(b)),And(Not(a),b)))

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ODD Parity Circuit ODD(x, y, z).

1 if odd number of inputs are 1. p

0 otherwise.

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ODD Parity Circuit ODD(x, y, z).

1 if odd number of inputs are 1. p

0 otherwise.

x'y'z

z ODD x'yz' xy'z' xyz

y

x y y y y y x'y'z + x'yz' + xy'z' + xyz

0 1 1 0

1 0 0

0 1 0

0 0

0 1 0

0 0 1

0 0 0

0 0 0

y y y y

0 1 1 1

0 1 0 0

1 0 1 1

1 0 0 0

0 1 1

0 0 0 0

1 0 0 0

0 0 1 0

0 0 0 0

1 0 1 0 0

0 1 1

0 1 0

1 1 1

1 1

0 0 0

0 0 0

0 0 0

0 0 1

0 0 1

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Expressing ODD using sum-of-products

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ODD Parity Circuit ODD(x, y, z).

1 if odd number of inputs are 1. p

0 otherwise.

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ODD Parity Circuit ODD(x, y, z).

1 if odd number of inputs are 1. p

0 otherwise.

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Expressing a Boolean Function Using AND, OR, NOT Ingredients.

AND gates. g

OR gates.

NOT gates.

Wire

Wire.

Instructions Instructions.

Step 1: represent input and output signals with Boolean variables.

Step 2: construct truth table to carry out computation.

Step 3: derive (simplified) Boolean expression using

Step 3: derive (simplified) Boolean expression using sum-of products.

Step 4: transform Boolean expression into circuit. p p

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Translate Boolean Formula to Boolean Circuit Sum-of-products. Majority.

63

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Translate Boolean Formula to Boolean Circuit

Sum-of-products. Majority.

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Translate Boolean Formula to Boolean Circuit Sum-of-products. Majority.

65

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Translate Boolean Formula to Boolean Circuit

Sum-of-products. Majority.

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Simplification Using Boolean Algebra

Every function can be written as sum-of-product Many possible circuits for each Boolean function.

Sum-of-products not necessarily optimal in:

– number of switches (space)

– depth of circuit (time)

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Boolean expression simplification

Karnaugh map

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Karnaugh Maps (K‐Maps)

• Boolean expressions can be minimized by  combining terms

• K‐maps minimize equations graphically K maps minimize equations graphically

PA + PA = P

Y AB Y

B C AB 0 0 A

0 1

Y

C 00 01

0

11 10

1 0 0 0

C 00 01 0

11 10 ABC ABC ABC ABC 0 0

0 1 1 0 1 1 0

0 0 0

0 0 1

1 1 0 0 0

1 1 0 0 0 1 ABC ABC ABC ABC

0 1 1 0 1 1 1

1 1

0 0 0

Chapter 2 <69> 

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K‐Map

• Circle 1’s in adjacent squares j q

• In Boolean expression, include only

literals whose true and complement form

Y

literals whose true and complement form are not in the circle

C 00 01

0 Y

11 10

AB

0 0 0

1

B C 0 0 0 1 1 0 A

0 0 0

1 1 0 Y

0

1 1

0

0

0

0

0

0

1 0 1

1 1 0

0

0 0 0 1 1 0 1

1 1

0 0 0 0

0 1 1 0 0 0

1 0 1 1 1

1

0 0

Y = AB

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3‐Input K‐Map

C 00 01

Y

11 10 AB

C 00 01

0

11 10 ABC ABC ABC ABC

1 ABC ABC ABC ABC

B C Y

0 0 0

Truth Table

C 00 01

Y

11 10 A AB

0

K-Map

1

0 0 0

0 1 0

1 0

1 1 1

C 00 01

0

11 10 0

0 0 0

0 0 0

1

1

0 0 0

0 1 0

1 0 0

1 1 1

1 1 1 1

Chapter 2 <71> 

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3‐Input K‐Map

C 00 01

Y

11 10 AB

C 00 01

0

11 10 ABC ABC ABC ABC

1 ABC ABC ABC ABC

B C Y

0 0 0

Truth Table

C 00 01

Y

11 10 A AB

0

K-Map

1 0

0 0 0

0 1 0

1 0

1 1 1

C 00 01

0

11 10 0

0 0 0

0 0 0

1

1 1 0

1

0 0 0

0 1 0

1 0 0

1 1 1

1 1 1 1

0 1 0 0

Y = AB + BC

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K‐Map Rules

• Every 1 must be circled at least once

• Each circle must span a power of 2 (i.e. 1, 2,  4) squares in each direction

4) squares in each direction

• Each circle must be as large as possible

• A circle may wrap around the edges

• A “don't care” (X) is circled only if it helps

• A  don t care  (X) is circled only if it helps  minimize the equation

Chapter 2 <73> 

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4‐Input K‐Map

01 11

00 10

CD AB Y 0

C D 0 0 0 1 1 0 B

0 0 0

1 1 Y A

0 0 0

01 00 1 0

1 1 0

0

0 0 0 1 1 0 1

1 1

1 1 0 1 1 0

0 0 0

0 01

11 1 0

1 1 1

1

1 1 0

0

0 0 0 1 1 0 0

0 0 1

1 1

1 1 1

10 1 0

1 1 0

0

0 0 0 1 1 0 1

1 1 1

1 1 1 1

1 0 0 0 0 1 0

1 1 1

1 1

1

0

0

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4‐Input K‐Map

01 11

00 10

CD AB Y 0

C D 0 0 0 1 1 0 B

0 0 0

1 1 Y A

0 0 0

1

0

0

1

0

0

1

1 01

00 1 0

1 1 0

0

0 0 0 1 1 0 1

1 1

1 1 0 1 1 0

0 0 0

0 01 0 1 0 1

1 1 0 0

11 1 0

1 1 1

1

1 1 0

0

0 0 0 1 1 0 0

0 0 1

1 1

1 1 1

1 1 0 1

10 1 0

1 1 0

0

0 0 0 1 1 0 1

1 1 1

1 1 1 1

1 0 0 0 0 1 0

1 1 1

1 1

1

0 0

Chapter 2 <75> 

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4‐Input K‐Map

01 11

00 10

CD AB Y 0

C D 0 0 0 1 1 0 B

0 0 0

1 1 Y A

0 0 0

1

0

0

1

0

0

1

1 01

00 1 0

1 1 0

0

0 0 0 1 1 0 1

1 1

1 1 0 1 1 0

0 0 0

0 01 0 1 0 1

1 1 0 0

11 1 0

1 1 1

1

1 1 0

0

0 0 0 1 1 0 0

0 0 1

1 1

1 1 1

1 1 0 1

10 1 0

1 1 0

0

0 0 0 1 1 0 1

1 1 1

1 1 1 1

1 0 0 0 0

Y = AC + ABD + ABC + BD 1 0

1 1 1

1 1

1

0

0

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K‐Maps with Don’t Cares

0 C D

0 0

0 1

1 0

B 0 0 0

1 1 Y A

0 0 0

01 11

00 10

CD AB Y

1 0

1 1

0 0

0 0

0 1

1 0

1 1 1

1 1 0 X 1 0

0 0 0

0 01

00

1 0

1 1

1 1

1 1 0

0

0 0

0 1

0 0 1

1 1

1

01

11

1 0

1 1

0 0

0 0

0 1

1 1 1

1 1 1

X X X X

10

1 0

1 1

1 1 1

1

X X

Chapter 2 <77> 

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K‐Maps with Don’t Cares

0 C D

0 0

0 1

1 0

B 0 0 0

1 1 Y A

0 0 0

01 11

00 10

CD AB Y

1 0

1 1

0 0

0 0

0 1

1 0

1 1 1

1 1 0 X 1 0

0 0 0 0

1

0

0

X

X

X

1

1 01

00

1 0

1 1

1 1

1 1 0

0

0 0

0 1

0 0 1

1 1

1

0 X X 1

01

1 1 X X

11

1 0

1 1

0 0

0 0

0 1

1 1 1

1 1 1

X X X X

1 1 X X

10

1 0

1 1

1 1 1

1

X

X

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K‐Maps with Don’t Cares

0 C D

0 0

0 1

1 0

B 0 0 0

1 1 Y A

0 0 0

01 11

00 10

CD AB Y

1 0

1 1

0 0

0 0

0 1

1 0

1 1 1

1 1 0 X 1 0

0 0 0 0

1

0

0

X

X

X

1

1 01

00

1 0

1 1

1 1

1 1 0

0

0 0

0 1

0 0 1

1 1

1

0 X X 1

01

1 1 X X

11

1 0

1 1

0 0

0 0

0 1

1 1 1

1 1 1

X X X X

1 1 X X

10

1 0

1 1

1 1 1

1

X

X Y = A + BD + C

Chapter 2 <79> 

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Example Example

xy z

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Simplification Using Boolean Algebra

Many possible circuits for each Boolean function.

Sum-of-products not necessarily optimal in: p y p

– number of switches (space)

– depth of circuit (time)

MAJ(x y z) = x'yz + xy'z + xyz' + xyz = xy + yz + xz MAJ(x, y, z) = x yz + xy z + xyz + xyz = xy + yz + xz.

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Layers of Abstraction Layers of abstraction.

Build a circuit from wires and switches.

[implementation]

Define a circuit by its inputs and outputs. [API]

To control complexity encapsulate circuits

To control complexity, encapsulate circuits.

[ADT]

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Layers of Abstraction Layers of abstraction.

Build a circuit from wires and switches.

[implementation]

Define a circuit by its inputs and outputs. [API]

To control complexity encapsulate circuits

To control complexity, encapsulate circuits.

[ADT]

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Specification

St 1 id tif i t d t t

Step 1: identify input and output

Step 2: construct truth table

Step 3: derive (simplified) Boolean expression using

Step 3: derive (simplified) Boolean expression using sum-of products.

Step 4: transform Boolean expression into

/ l

circuit/implement it using HDL.

Y u uld like t test the ate bef re packa in

You would like to test the gate before packaging.

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HDL

(86)

Example: Building an And gate

a b out

And.cmp Contract:

When running your out

a

b And

0 0 0 0 1 0 1 0 0 1 1 1

.hdl on our .tst, your .out should be the same as our .cmp.

load And.hdl,

And.tst And.hdl

CHIP And

output-file And.out, compare-to And.cmp, output-list a b out;

set a 0,set b 0,eval,output;

{ IN a, b;

OUT out;

// implementation missing

} , , , p ;

set a 0,set b 1,eval,output;

set a 1,set b 0,eval,output;

set a 1, set b 1, eval, output;

}

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Building an And gate

Interface: And(a,b) = 1 exactly when a=b=1

out a

b And

b

CHIP And

And.hdl

{ IN a, b;

OUT out;

// implementation missing }

}

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 87

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Building an And gate

Implementation: And(a,b) = Not(Nand(a,b))

out a

b b

CHIP And

And.hdl

{ IN a, b;

OUT out;

// implementation missing }

}

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Building an And gate

Implementation: And(a,b) = Not(Nand(a,b))

out

Not a

Nand out

a in out

x

b b

b

CHIP And

And.hdl

{ IN a, b;

OUT out;

// implementation missing }

}

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 89

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Building an And gate

Implementation: And(a,b) = Not(Nand(a,b))

out

NOT a

NAND out

a in out

x

b b

b

CHIP And

And.hdl

{ IN a, b;

OUT out;

Nand(a = a, b = b, , out = x);

Not(in = x, out = out)

}

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Hardware simulator (demonstrating Xor gate construction)

test script HDL

program program

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 91

(92)

Hardware simulator

HDL

program

program

(93)

Hardware simulator

HDL program program

output file

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 93

(94)

Project materials: www.nand2tetris.org

Project 1 web site

And hdl And.hdl ,

And.tst ,

And.cmp files

(95)

Project 1 tips

 Read the Introduction + Chapter 1 of the book

 Download the book’s software suite

 Go through the hardware simulator tutorial

 Do Project 0 (optional) Do Project 0 (optional)

 You’re in business.

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 95

(96)

Gates for project #1 (Basic Gates)

(97)

Gates for project #1

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 97

(98)

Gates for project #1 (Multi-bit version)

(99)

Gates for project #1 (Multi-way version)

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 99

(100)

Gates for project #1 (Multi-way version)

(101)

Gates for project #1 (Multi-way version)

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 101

(102)

Gates for project #1 (Multi-way version)

(103)

Perspective

 Each Boolean function has a canonical representation

 The canonical representation is expressed in terms of And Not Or

 The canonical representation is expressed in terms of And, Not, Or

 And, Not, Or can be expressed in terms of Nand alone

 Ergo, every Boolean function can be realized by a standard PLD consisting of Nand gates only

a

b and

consisting of Nand gates only

 Mass production

c

or f(a,b,c)

. .

 Universal building blocks, .

unique topology

and

unique topology

 Gates, neurons, atoms, …

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 103

(104)

End notes: Canonical representation

Whodunit story: Each suspect may or may not have an alibi ( a ), a motivation to commit the crime ( m ), and a relationship to the weapon found in the scene of the crime ( w ). The police decides to focus attention only on suspects p p for whom the proposition Not( a ) And ( m Or w ) is true.

) (

) , ,

( a m w a m w

s   

Truth table of the "suspect" function

Canonical form: s ( a , m , w )  a m wa m wa m w

(105)

End notes: Canonical representation (cont.)

) (

) , ,

( a m w a m w

s   

s a

or and

m

w s ( a , m , w )  a m wa m wa m w

a m w

and w

and or s

and

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 105

(106)

End notes: Programmable Logic Device for 3-way functions

a

b and active fuse

blown fuse legend:

c

blown fuse

or f(a,b,c)

8 and terms connected to the same 3 inputs

. . .

single or term

and

single or term connected to the outputs of 8 and terms

PLD implementation of f(a,b,c)= a b c + a b c

_ _ _

(the on/off states of the fuses determine which gates participate in the computation)

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End notes: Programmable Logic Device for 3-way functions

 Two-level logic: ANDs followed by ORs

 Example: Y = ABC + ABC + ABC

B

A C

A B C

minterm: ABC minterm: ABC minterm: ABC

Y

Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 1: Boolean Logic slide 107

Figure

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References

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