CSIE 1000 Introduction to Computers National Taiwan University
Fall 2016 Department of CSIE
Homework 1
October 25, 2016 Due date: November 8, 2016
1. (12%) What are the 8-bit 2’s complement representations of the following decimal numbers? Please give both their binary and hexadecimal representations.
a. 95 b. -6 c. -29
2. (8%) Prove that (a) ABC + ABC + BC = B and (b) A + AB = A + B using Boolean algebra.
3. (8%) A 4-to-2 encoder has four inputs A3, A2, A1, A0and two outputs Z1, Z0. Only one of the four inputs can be 1 at a time. Assume that Aiis on, the output (Z1, Z0) will correspond to the binary representation of i. For example, when the input A2=1, (Z1, Z0)=(1,0) because 102 = 210. Create the truth table for the 4-to-2 encoder and implement it with logic gates.
4. (8%) Design and implement a 4-bit right shifter with sign extension. The inputs are a 2-bit shift amount S1S0and a 4-bit number X3X2X1X0, where X3is the MSB. The output is a 4-bit number Z3Z2Z1Z0. 5. (10%) In Hack ALU, the following configurations of inputs are used for x − 1 and x − y. Explain why they
work.
zx nx zy ny f no out
0 0 1 1 1 0 x − 1
0 1 0 0 1 1 x − y
6. (16%) As shown in the following diagram, design a 4-bit comparator which has two 4-bit unsigned integer inputs, X3X2X1X0and Y3Y2Y1Y0, and a 3-bit output for the conditions of X > Y , X = Y and X < Y , respectively. Hint: design a 1-bit comparator first.
4-bit comparator
X Y
4 4
X>Y X=Y X<Y
G E L
7. (16%) Design a binary multiplier that multiplies two 3-bit unsigned integers, X = X2X1X0 and Y = Y2Y1Y0, with a 6-bit output Z = Z5Z4. . . Z0where Z = X × Y ; X0, Y0and Z0are LSBs. You may use the notation X[n..m] to identify a portion of wires. For example, X[2..1] means the set of wires, X2X1. 8. (12%) Refer to the TOY architecture (Figure 1; note that the numbering could be different from the lec-
ture), please specify the operations of M U XP C, M U XM EM, M U XREGR, M U XALU, M U XREGW, W RIT EREG, W RIT EM EM and ALU OP during the execution stage for the instructions ”xor”, ”store indirect” and ”branch if zero”. As an example, for ”jump and link”, they would be M U XP C = 0, M U XM EM =
∗, M U XREGR= ∗, M U XALU = 1, M U XREGW = 01, W RIT EREG= 1, W RIT EM EM = 0, ALU OP =
∗. (For ALUOP, you only need to specify 3-bit ALUcontrolas specified in Figure 1.)
1
PC
Registers
W W Data
A Data B Data W Addr A Addr B Addr
Registers
W W Data
A Data B Data W Addr A Addr B Addr +
1
Memory
W W Data Addr
R Data Memory
W W Data Addr
R Data
IR op d s t IR op d s t
Cond Eval Cond Eval
A L U A L U 2
5 ALU_OP MUX MEM
MUX PC 1
0 1
1 0 10 01 00
1 0 0
MUX ALU
MUX REGR MUX REGW
CLOCK MEM CLOCK REG
WRITE REG WRITE MEM
WRITE IR WRITE PC
ALU_OP
000 add/sub 001 and 010 xor 011 shift 100 copy input 2
Figure 1: TOY architecture.
9. (10%) Assume that the program starts at 10 and the following data appear on standard input.
1112 1112
What is output of the following TOY program?
10: 7100 11: 8FFF 12: 9F15 13: 82FF 14: 1112 15: C016 16: 91FF 17: 0000
2
