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An intelligent parallel loop for parallelizing compilers

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題名: An intelligent parallel loop for parallelizing compilers 作者: Yun-Woei Fann;Chao-Tung Yang;S. S. Tseng;Chang-Jiun Tsai 貢獻者: Department of Information Science and Applications

關鍵詞: parallelizing compiler;parallel loop scheduling;knowledge-based system;multiprocessor systems;speedup

日期: 2000-03

上傳時間: 2009-11-30T08:03:15Z 出版者: Asia University

摘要: In this paper we propose a knowledge-based approach to solving loop- scheduling problems. A rule-based system, called IPLS, is developed by combining a repertory grid and an attribute ordering table to construct a knowledge base. IPLS chooses an appropriate scheduling algorithm by inferring some features of loops and assigning parallel loops to

multiprocessors to achieve significant speedup. Because more attributes are proposed, the accuracy of selection of an appropriate scheduling method is improved. In addition, the refined IPLS system can

automatically adjust the attributes in the knowledge base according to profile information; therefore, IPLS has the capability of feedback learning. The experimental results show that our approach can achieve greater speedup on multiprocessor systems than can others.

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