Wei-Lun Hung

Wei-Lun Hung

MD526, National Taiwan University, 886-928-232619

No. 1 Roosevelt Rd. Sec. 4, [email protected]

Taipei, Taiwan 10672 http://alcom.ee.ntu.edu.tw/~spartan

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National Taiwan University, Taipei, Taiwan

M.S. in the Graduate Institute of Electronics Engineering June 2008

• Thesis: “Inductive Equivalence Checking and Relation Determinization via SAT Solving”

• Overall GPA: 4.0/4.0 (33 credits)

• Member of the ALCom Lab; Advisor: Professor Jie-Hong Roland Jiang

B.S. in Computer Science and Information Engineering June 2006

• Overall GPA: 3.64/4.0 (156 credits)

• Last 2-year GPA: 3.89/4.0 (64 credits)

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• Computer-aided design (electronic design automation)

• Verification

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[1] J.-H. R. Jiang, H.-P. Lin and W.-L. Hung. “Interpolating functions from large Boolean relations.”

IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2009.

[2] R.-R. Lee, J.-H. R. Jiang and W.-L. Hung. “Bi-decomposing large Boolean functions via interpolation and satisfiability solving.” Design Automation Conference (DAC), pages 636–641, June 2008.

[3] J.-H. R. Jiang and W.-L. Hung. “Inductive equivalence checking under retiming and resynthesis.”

IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pages 326–333, Nov. 2007.

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• Interpolating functions from large Boolean relations. Contributed paper, ICCAD, San Jose, CA, November 2009.

Scholarships

• SpringSoft EDA Scholarship for ICCAD Regular Papers 2007, 2009

• SpringSoft EDA Scholarship for DAC Regular Papers 2008

Wei-Lun Hung Curriculum Vitae , page 2 of 3

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National Taiwan University, Taipei, Taiwan

Research Assistant to Professor Jie-Hong Roland Jiang September 2006 – June 2008 July 2009 – Present Sequential Circuit Verification

• Designed and implemented the SAT-based inductive equivalence checking algorithm

• Compared performances with prior BDD-based method and temporal induction method

• Published in the IEEE/ACM International Conference on Computer-Aided Design (ICCAD’07) Boolean Function Bi-Decomposition

• Implemented the algorithm of computing Craig Interpolant

• Evaluated the scalability of bi-decomposition and the optimality of variable partition

• Published in the Design Automation Conference (DAC’08) Relation Determinization

• Designed and implemented the SAT-based algorithm to extract functions from relation

• Prepared real state transition relation benchmark circuits

• Published in the IEEE/ACM International Conference on Computer-Aided Design (ICCAD’09) Undergraduate Research Assistant to Professor Yi-Ping Hung July 2005 – June 2006

Human-Computer Interaction

• Developed an authoring tool in multimedia for 3D stereoscopic kiosk systems

• Integrated 3D stereoscopic kiosk systems with RFID and wireless access points

• Sponsored by the National Digital Archives Program, Taiwan

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Taiwan Coast Guard, Taipei, Taiwan December 2008 – June 2009

IT Officer (Second Lieutenant)

• Led a team (5 people) to design and develop the system for officers in duty to manage information

• Maintained the system to manage real estate information

Computer and Information Networking Center, National Taiwan University March 2005 – June 2008 Website Developer

• Designed and builded the prototype of a platform for students to match job needs and requirements

• Maintained many websites for students and faculties to manage their information

ALCom Lab, National Taiwan University July 2006 – June 2007

Server Administrator

• Maintain web servers and database services

• Maintain workstations

Wei-Lun Hung Curriculum Vitae , page 3 of 3

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• Bounded Model Checker

Implemented a tool that verifies the equivalence between two circuits within bounded timeframes

• Risk Analyzer for dense-time systems

Implemented a backward reachability analyzer for dense-time systems

• Chip Floorplanning

Implemented a B*-tree based floorplanner that can handle hard macros

• Combinational Circuit Diagnosis

Implemented a dynamic cause-effect diagnosis tool that eliminates unwanted fault candidates

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• Programming Languages: C/C++, Java, C#, perl, UNIX shell script, Verilog

• EDA Packages: ABC, SIS, MiniSat

• Tools: MATLAB, L^ATEX

• Operating Systems: Mac OS X, FreeBSD, Linux, SUN Solaris, Microsoft Windows