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二維網狀多處理機系統之重建策略

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(2)  Reconfiguration of 2D Mesh Multiprocessors. .  NSC 88-2213-E-011-041 –  !"#$%&'()*+, -. . ( )

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(5)  Very often, spare nodes, tracks and switches are incorporated in mesh multiprocessor to improve the faulttolerance. The amount of spare hardware and structures can effect of. fault-tolerance. Besides, the strategy of replacing failed nodes with spare nodes is a key factor in fault-tolerance. In general, spares are not used for regular operations until they are reconfigured into the system after failures occur, resulting in wasting nodes. It is desirable that all nodes are used for regular operation to improve the node utilization. When failures occur, the proposed reconfiguration scheme can retain as many fault-free nodes as possible and ensure to have a convex fault-free mesh, leading to improving the node utilization. Keyword: mesh, fault-tolerant, reconfiguration, compensation path, convex. Ž‘ol’ 134+&“^w4dA +”5•–—˜4™š› œ5QzJžŸ”Gn 5¡l•¢ –—˜4F£¤5¥Q¦§¨!)*+ ,©ª«©5c¬Pv ­”34-®¯°’±5 !²³89>{~´µ5ce.

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(7) rst u-cevwƒxyzŒ‡345. gh eI•íô‘ IYrsõô‘895L¥ ö•íô‘²ó6 I-íŽxQíô‘5[ íô‘Qí5& 89 Q 8 ~+rstugh~&ÔíŽxc o n ú³ ^5ú³Q n í5î & 0 òˆ n-1 òcô‘5 šú³Òcž5 >& 0 òcô‘5³ >ož ^- Í  íŸ ”GX!" (current line)-#’$ô‘ ³5’$³c 3 ž(start line)-%Izrs89 ô‘ &³5' ³c 0 ž(end line)-(ô‘ &³5˜)³c 7 ž1 -ö'³”'5å*+,rs í°M-z'³l’$³Ñ ,eIô‘í°(M./’$ô‘ )&³501 ³c 1 ž2 -ö'³”'5å*+,rs í°M-z'³l’$³Ñ, eIô‘í°(./’$ô‘) &³501 ³c 3 ž-î01 ³!02 ³ÑQ•¢³1 523 01 ³l02 ³Ñ4Q,rs!,eI ô‘1 c´µüýMº!5“Ÿ ”GKÑêëÊ5gh6ì89 À%& 7&89ØÙ5[ à Xúrstuƒº:;P<=89 ØÙ-2cgh'Xrstuà á Ÿ ” G 5 • K Ñ ê ë Ê c O(FlogF)+F[O(F)+O(n)+O(n)]=O(Fn)5.

(8) • F c*>°Žc 10x10 ! 22x22 z ?@89°’vwA^f BC-Þ[5]BC5gh~&‚Ϭ¼  vw f- Ú !  Dc 10x10 ! 22x22 E5vw ƒ~I°BC-Þ[5]5[6]BC E5gh~&‚ÏÞ[6]¬¼åF eIf- [5]'GG~‚Ïå FA^f5‰{GÕ^åFe IfH€l˜€ I€gh6ìJIrsvw: ;'XdAf àárstuŸ”G5~ev wƒxyŒ‡˜4-vwƒx y†‡Å]C_`ab5c'd eIf&QvwzŒ‡v w:;U'X,Y5KBgh+LݝI8 9 5;P" 5)ML 89&àáLrstu5ÔQ N)*vw+,'OPkQR [1]M.Chean and J.A.B.Fortes, "A Taxonomy of Reconfiguration Techniques for Fault-Tolerant Processor Arrays," IEEE computer Magazine, vol.23, pp.55-69, Jan.1990. [2]S.Y.Kung, S.N.Jean and C.W.Chang, "Fault-Tolerant Array Processors Using Single-Track Switches," IEEE Trans. on Computers, vol.38, pp.501-514, April 1989.. [3]A.Chandra and R.Melhem, "Reconfiguration 3D Meshes," 1994 proc. The IEEE International workshop on Defect and Fault Tolerant in VLSI system, pp.194-202. [4]J.S.N.Jean, H.C.Fu and S.Y.Kung, "Yield Enhancement For WSI Array Processors Using Two-and-HalfTrack Switches, " International Conference on Wafer Scale Integration, pp.243-250. 1990. [5]T.A.Varvarigou, V.P.Roychowdhury and T.Kailath, "Reconfiguration Processor Arrays Using MultipleTrack Models: The 3-Track-1-SpareApproach," IEEE Tran. on Computers, vol.42, pp.1281-1293, Nov, 1993. [6]N.F.Tzeng and G.Lin, "Maximum Reconfiguration of 2D Mesh Systems with Faults," Proc. 25th International Conference on Parallel Processing, vol.I, pp.77-84, Aug, 1996. [7]J.A.Wegner et al. , "A Distributed 2-Fault Tolerant Control Algorithm for Reconfiguration Fault-Tolerant Mesh Arrays," Proc. IEEE Southeastcon 93, IEEE, 1993. [8]N.J.Davis et al. , "Reconfiguration Fault-Tolerant Two-Dimension Array Architectures," IEEE Micro, pp.60-69, Apr, 1994. [9]Y.Y.Chen, S.G.Chen and J.C.Lee, "Yield and Performance Issues in Fault-Tolerant WSI Array Architectures," International Conference on Wafer Scale Integration, pp.318-328, 1995..

(9) [10]R.L.Hadas, H.Shrivastava, R.G.Melhem and C.L.Liu, "Optimal Reconfiguration Algorithm for RealTime Fault-Tolerant Processors Arrays," IEEE Tran. on Parallel and Distributed Systems, vol.6, pp.498-510, May, 1995. [11]J.H.Kim and P.K.Rhee, "The RuleBased Approach to Reconfiguration of 2D Processors Arrays," IEEE Tran. on Computers, vol.42, pp.1403-1408, Nov, 1993. [12]J.Y.Ngai, "A Framework for Adaptive Routing in Multicomputer Networks," Caltech-CS-TR-89-09, Computer Science Dept.,California Institute of Technology, 1989. [13]M.Wang, M.Cutler, and S.Y.Su, "Reconfiguration of VLSI/WSI Mesh Array Processors with Two-Level Redundancy," IEEE Tran. on Computer, vol.38, pp.547-554, Apr, 1989.. Ž     . Ú    .   . .

(10) Algorithm for finding a set of compensation paths Input: The set of faulty nodes Output: The set of compensation paths begin Initialization – sort faulty nodes and get environment information for current boundary node S start boundary node to end boundary node do begin if02 lines is between start line and current line begin if there exists a unsafe node Find the compensation path from the current boundary node to the unsafe node else Find the compensation path from the current boundary node to one of first phase candidate nodes adjust environment information end end for current boundary node S end boundary node to start boundary node do begin if current boundary node is not compensated currently begin Find the compensation path from the current boundary node to the one of second phase candidate nodes adjust environment information end end end 2.

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