• 沒有找到結果。

我們證明以相同氧化孔徑(11μm)但合併鋅擴散圖形製作的VCSEL,可

以降低臨限電流,尤其花辦型擴散圖層可以達到1.6mA低臨限電流並在8mA 電流操作下仍可維持單模的特性,代表有著優異抑制邊模的效果。再來因 鋅擴散加重了上層p-DBR 的摻雜濃度而有效降低串聯電阻,間接也降低了 外部電路的RC常數。

我們比較兩種擴散深度1及1.4μm,發現1.4μm擴散深度其Slop effiency 及抑制邊模效果較佳,尤其是花辦形擴散圖層Slop effiency可達0.48 W/A,

所以擴散不只讓電阻減小也提高了外部效率。

而在三圓形擴散圖層方面,元件之飽和功率不如花辦圖形,可能是發光 面積直接影響了元件發光效率,但如何維持高功率且單模態的特性,判斷 日後在鋅擴散深度及擴散孔徑圖形為可持續研究的方向。

在未來實現光連結平行光傳輸用多維式陣列VCSEL,這樣的製作方法 是非常有潛力去達到,但必須深入了解擴散圖形和高階光模態的關係,最 佳的是以模擬軟體來預測鋅擴散及設計發光孔徑形狀來控制光模態,以形 成較理想的單一圓形光點。

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