In this thesis, we propose a method named Greedy Switching Activities Scheduling (GSAS) which comprises two phases. The phase one of GSAS schedules the DAG. The phase two of GSAS re-assigns the registers to reduce the switching activities. The experimental results have shown the effectiveness of our method. Finally, we will conclude our thesis and propose some future work for our research.
5.1 Conclusion
Portable devices, such as cellular phone, digital camera, PDA have become so popular and are used widely in the world. Hence, the power reduction in VLIW DSP becomes a more and more important problem. Due to buses consume a significant fraction of total power dissipation in a processor, so we propose a method, GSAS, to reduce the switching transitions on the instruction bus. In summary, we give the following conclusions:
(a) The phase one of GSAS uses a greedy method to schedule the DAG and reduce the switching activities. According to the experimental results, the more power caused by each bit switch the more energy our method can save. That is, when the power coefficient α representing the consumed power per transition is big, then we can save more power in switching activities.
(b) The time complexity of the phase one of GSAS is (|V|*(|V|*N)), where |V| is the number of the sub-instructions and N is the number of functional units. It don’t need to find the min-cost maximal weight bipartite matching and just finds the only one node in one iteration which needs at most O(|V|*N) to be completed. But the complexity of MSAS is O(|V|*(N+|V|)3). Hence, the phase one of GSAS saves more time in comparing with MSAS.
(c) The phase two of GSAS can improve the results of the phase one of GSAS by re-assigning the registers. According to the experimental results, we can observe that when the phase one collocates with the phase two, it can save more power than only using the phase one. We can find that the register assignment is an important factor affecting the total switching activities. The phase two uses a greedy method to re-assign the registers and it can reduce the total switching activities of the schedule created by the phase one.
5.2 Future Work
There are still many things we can do in the future.
(a) In our experiments, we only use simplified machine of TI TMS320C6000.
In the future, we can try to do our experiments with different machine architectures to see if our method works in other architectures.
(b) The phase two of GSAS can be only collocated with the phase one of GSAS. In the future, we will try to find a better way to re-assign the registers to reduce the switching activities and we will make it collocated with all other algorithms.
(c) Our method is not designed specially for the loop applications. We don’t do the optimization for the organization of the loop body. In the future, we can focus our research on the scheduling for the loop applications to reduce the schedule length and switching activities of a loop.
(d) Our method only consider about the self-transitions. There are some researches trying to reduce the coupling-transitions [24-25]. In the future, we can consider about both self-transitions and coupling-transitions and try to reduce more power.
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