5-1 Conclusions
In this paper, we verify that PECVD SiN capping layer is tensile strain and suitable for nMOSFETs application. Therefore, as SiN capping layer thickness increases, driving current has a huge enhancement. Besides, we observe that interface states become less when SiN capping layer thickens. It may be attributed that a large amount of hydrogen generated from SH4 and NH3 and then passivate the interfacial layer and we verify the number of interface states by using charge pumping method.
Eventually, we utilize carrier separation method to make sure the current component under inversion and accumulation regions and carrier separation measurement with different temperature is followed to calculate the electron and hole barrier height under inversion region then, we obtain F-P conduction mechanism is matched. This indicates that less barrier height as SiN capping layer increases.
The CVS reliability of nMOSFETs with HfO2/SiON and HfAlO/SiON is investigated in this chapter. The CVS under various temperature is also shown. It is believed that CVS degradation is related to the electron traps in gate dielectric. And therefore cause threshold voltage shift. We observe that serious degradation such as threshold voltage shift occurs as SiN capping layer thickens. And we also find that
threshold voltage shift with high temperature is larger when the thickness of SiN thickness increases. It can be explained by more Si-H bonds with thicker SiN capping layer which come from the reaction of SiH4 and NH3 precursor break when constant voltage stress applies or great tensile strain as thickness of SiN capping increase, and it brings about more strain energy which is stored in the channel.
5-2 Future Work
There are many issues that we can’t discuss completely. We list some goals for future work as follows.
1. HRTEM is used to verify real thickness and estimate value of the dielectric constant for HfO2/SiON and HfAlO/SiON gate stack.
2. Because of actual CMOS circuit operation, AC gate bias with specific frequency and duty cycle is usually utilized. Therefore, AC stress with Dynamic AC stress application is more realistic and can provide additional insights into the trapping behavior.
3. Fast transient pulsed Id-Vg measurement is also used to evaluate charge-trapping phenomena precisely.
4. Charge pumping measurement on CVS.
5. Find the better recipe of surface treatment to gain good interfacial layer quality.
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