Fig. 5-1 Jg vs. CET for MOS capacitors (Pt/Al2O3/GaAs) made by ALD-300oC and sputtering
Fig. 5-2 Multi-frequency C-V characteristics of MOS capacitors (Pt/Al2O3/GaAs) with and without AlON
Fig. 5-3 Typical 10 kHz C-V curves of Pt/Al2O3/GaAs capacitors with and without AlON
Fig. 5-4 Leakage current density Jg vs. Vg in the accumulation regime for Pt/Al2O3/GaAs capacitors with and without AlON
Table Captions
Table 1 Properties of undoped semi-conductors at 300K
Table 2 Wet-chemical cleaning processes (WCP) used in this study
Table 3 Chemical ratio by XPS spectra of As 2p3 and Ga 2p3 according to different cleaning processes
Table 4 Wet-chemical cleaning processes (WCP) used in this study
Table 5 Chemical ratio by XPS spectra of As 2p3 and Ga 2p3 according to different cleaning processes
Table 6 Average of Dit and Jg at CET = 40 Å of Pt/Al2O3/GaAs MOS capacitor made by ALD at 100oC and 300oC
Table 7 Chemical ratio by XPS according to different condition
Chapter 1 Introduction
1-1 General Background
As the dimensions of complementary metal oxide semiconductor (CMOS) devices are scaled down to keep the continuous improvement on device performance, the thickness of the traditional SiO2 gate dielectric will steadily decrease to 1.2 nm, which resulting in large leakage current and poor reliability. According to the first order current-voltage relationship, the ideal drive current IDS in a n-channel MOSFET can be expressed as
1 2 mobility for electrons, W is the channel width, L is the effective channel length, VGS is the applied gate-to-source voltage and V is the threshold voltage. In addition to T decrease the gate oxide thickness, others of the parameters in the above equation can be adjusted to improve the device driving capability. However, large VGS apparently creates an undesirably high electric field across the gate oxide, and the device reliability will be deteriorated in turn. Moreover, the reduction of V about 200 mV is limited because of T the induced statistical fluctuations in thermal energy at a typical operation circumstance of up to 100oC. On the other hand, the shrinkage of the channel length and the increase of
gate oxide capacitance are simple to achieve the higher driving current and chip density, directly. Although the scaling down of Si device dimensions is a continuous solution in the past two decades, the feature sizes of conventional Si MOSFETs have approximate to its fundamental physical limits. Therefore, new materials with higher electron mobility and novel device structures must be developed.
Currently, the CMOS technology node of 90 nm is well developed. According to the International Technology Roadmap for Semiconductors (ITRS) [1], the equivalent oxide thickness (EOT) should be less than 1.6 nm for next generation. Figure 1-1 (a) and (b) depict the shrinking trend of EOT as a function of technology node for microprocessor and low power devices. Although silicon oxy-nitride (SiON) gate dielectric has replaced SiO2 to achieve 90 nm technology node by its better dielectric integrity and lower stress induced leakage current, the dielectric constant of SiON is not high enough for 65 nm technology node. Besides, as the thickness is less than 1.2 nm, the direct tunneling effect will be a very critical issue to overcome. Thus, the resulting gate leakage current will not only degrade the performances of devices but increase the power dissipation. From figure 1-2, the leakage current limit cannot be met by using SiON after 2008. Therefore, the high dielectric constant (high-k) materials are imperious demands.
Recently, high-k materials such as Al2O3, ZrO2, HfO2, and their silicates [2-14] have been studied widely. Unfortunately, the dielectric constant of most high-k materials is
inversely proportional to their band-gap, as shown in figure 1-3 [15]. The narrower band-gap and smaller band offset would enhance Schottky emission of carriers.
Furthermore, the trap-assisted tunneling, Frenkel-Poole emission and the hopping effect should be still solved. Consequently, there are several issues must be improved before those high-k materials replace SiO2 and SiON.
(1) Thin interfacial layer
(2) Low interface state density (Dit<1011 eV/cm2) (3) Low gate leakage current
(4) Good gate compatibility (5) Good thermal stability (6) Less mobility degradation
Moreover, a higher carrier transport in MOSFETs is considered through the increase of channel mobility. On the other hand, we could replace Si substrates by III-V compound substrates because their electron mobility is three times grater than Si at least. However, several problems which we mention above remain to be solved.
1-2 Motivation
III-V compound semiconductors offer the advantages of high electron mobility (Table 1), rich band gap engineering, low power consumption [16-19] and high breakdown fields
and thus are expected to outperform Si in certain metal-oxide-semiconductor (MOS) applications such as high-speed and high power devices. In contrast to the present commercially available III-V metal-oxide-semiconductor field transistors (MOSFETs) and high electron mobility transistors (HEMTs), which exhibit small forward gate voltages limited by the Schottky barrier heights, the III-V MOSFETs feature a much larger logic swing which gives a greater flexibility for digital integrated circuit (IC) designs and higher current gain cutoff frequency.
One key challenge in the III-V technology is to identify thermodynamically stable insulators on the III-V＇s that give a low interfacial density of states (Dit) and a low leakage current. The intensive efforts in questing for such competitive insulator/III-V systems have finally yielded fruitful results with the discovery of high-k dielectric Ga2O3-Gd2O3 [20, 21] mixture or Gd2O3 [22, 23] on gallium arsenic (GaAs) and atomic layer deposition (ALD) Al2O3 [24-32] on GaAs, in which a low electrical leakage current and a low Dit have been achieved. The employment of Al2O3 deposited by ALD as a gate dielectric layer along with an implantation and rapid thermal annealing (RTA) for activation implanted ions has led to the demonstration of the first inversion-channel n-GaAs MOSFETs.
1-3 Organization of the Thesis
In chapter 2, we first developed the cleaning process of GaAs substrates. Different concentration of mixture solutions were tested for GaAs wafer cleaning. For GaAs substrates, it is important to suppress native oxides such as As oxides, As layer, and Ga oxides. Through X-ray photoelectron spectroscopy (XPS), we could analyze the oxide composition and differentiate which cleaning method is the optimization.
In chapter 3, we chose Al2O3 by atomic layer deposition (ALD) as our dielectric layer and studied the interfacial layer between Al2O3 and GaAs surface. Then, we had to try which temperature was better to grow Al2O3 films. Finally, we tried our best to suppress the native oxides and deposit excellent films on GaAs substrates for our metal oxide semiconductor (MOS) capacitors fabrication process.
In chapter 4, we employed post deposition annealing (PDA) in different atmospheres in an attempt to improve the quality of our Al2O3 films. Even though PDA did bring about the improvement in some electrical properties, it caused the leakage current increased significantly. Thus, we should explain and solve this problem. Finally, the reliability of MOS capacitors was discussed and found which condition would not be affected with stress time increasing.
In the end of this thesis, chapter 5, gave the conclusion and suggestions for future works.
( a )
( b )
Fig. 1-1 The equivalent oxide thickness versus generation technology node for ( a ) microprocessor and ( b ) low power. [1]
Fig. 1-2 Jg limit versus Jg simulated for high-performance logic. [1]
Fig. 1-3 Energy gap versus dielectric constant for SiO2, Si3N4, Al2O3, ZrSiO4, HfSiO4, ZrO2, and HfO2. [15]
Table 1 Properties of undoped semi-conductors at 300K
Chapter 2
The Cleaning Process of GaAs Substrate
2-1 Introduction
In the fabrication process of industrial microelectronics, the wafers go through several wet chemical treatments, since it is essential to prepare a clean, defect-free and atomically smooth semiconductor surface for the purpose of studying the surface chemistry and film growth at each stage. Nevertheless, an inhomogeneous layer of amorphous oxide, such as native oxide, always forms on the air-exposed surface owing to the presence of unsaturated dangling bonds. For example of the mainstream silicon devices, surfaces terminated by silicon hydride are gaining popularity for the growth of gate oxide, which is used in the fabrication of deep submicron ultra-large integrated circuits.
. The performances of the devices on GaAs substrates as well as silicon depend on a high degree of perfection in both bulk and surface quality of the substrate. The cleaning and etching processes are widely used as wafer pretreatment prior to growth. The purpose of these treatments is to make a metallic-impurity-free surface, particle-free surface, and a very thin oxide layer. Native oxides are the most considerable of above. Although the wafer is packaged in an inert atmosphere, the native oxides already formed before packaging can undergo changes due to the different nature of the Ga and As oxides [33].
Thus, we should try our best to suppress Ga and As oxide. There were some wet chemical treatments which were tested in our fabrication process, and sought for the optimized cleaning procedures for GaAs substrate.
2-2 Experimental Procedures
N-type (Si) doped 2-inch GaAs (100) wafers were used in the cleaning experiments.
In this work, only wet chemical treatments were tested in part considering the usability and feasibility of clean processes in the clean room. First, the samples were rinsed in the deionized water (DI. water) about 3 min. We soaked the samples in different diluted chemical solutions which were including hydrochloric acid (HCl) [50] and hydrogen peroxide (H2O2) about 5 min. Different concentration of solution would result in different suppressive effects of oxides. After removing the native oxide, all samples were rinsed in the DI. water about 3 min again. Finally, all samples were dried by N2 blowing. After cleaning, we analyzed characterization of the oxide composition by X-ray photoelectron spectroscopy (XPS). The Ga 2p3, Ga 3d, As 2p3, and As 3d core level spectra were analyzed by least-squares fitting calculations assuming components consisting of a Lorentzian line shape convoluted with a Gaussian broadening function after subtraction of the background.
2-3 Results and Discussion
Table 2 shows the wet-chemical cleaning process (WCP) used in the study. We chose HCl and H2O2 mixture solution for our cleaning process. Figure 2-1 to 2-4 display the core-level spectra of As 2p3, As 3d, Ga 2p3, and Ga 3d for the GaAs substrates after WCP, respectively. The binding energies of As2O3, As-As (called As layer), and GaAs substrate are 1326 eV, 1324.6 eV, and 1322.9 eV in As 2p3 spectrum, respectively. As figure 2-1 shown, it was observed that WCP 1 could suppress more As oxides than WCP 2. Moreover, As layer was less after WCP 1. From table 3, it could be pointed out more clearly. By using WCP 1, the ratios of Asoxide/AsGaAs and Aslayer/AsGaAs were 0.63 and 0.17, respectively.
Both of them were lower than by using WCP 2, and it meant that stronger concentration of HCl solution suppressed more As oxides and As layer, indeed. The binding energies of As2O3, As layer, and GaAs substrate are 44.3 eV, 41.9 eV, and 41.2 eV in As 3d spectrum, respectively [34-37]. From As 3d spectrum as shown in figure 2-2, the same tendency happened to As oxides again. However, As layer existed the interfacial surface between native oxides and substrate rather than deep substrate. Thus, we could not find As layer in As 3d core-level spectrum. The binding energies of Ga2O3 and GaAs substrate are 1118.6 eV and 1117.2 eV in Ga 2p3 spectrum, respectively. In figure 2-3, the Ga2O3 intensity of WCP 1 was lower than WCP 2. It could also be observed the same tendency in table 3. The
Gaoxide/GaGaAs ratio of WCP 1 was 0.37 and lower than WCP 2. In Ga 3d spectrum, the XPS
spectrum is dominated by peaks at 20.6 eV and 19.2 eV which are assigned as Ga2O3 [38]
and GaAs substrate [39], respectively. We could observe the same situation in figure 2-4.
In other words, stronger concentration of HCl solution suppressed more Ga oxides, indeed.
As the mixture solution of HCl and H2O2, WCP 3, was employed, we found that WCP 3 would not be more effective against native oxides than WCP 1. As figure 2-1 to 2-4 and table 3 shown, it was observed the As oxides, As layer, and Ga oxides intensity of WCP 3 were all higher than WCP 1. It was because H2O2 oxidized the substrate resulting in oxides increasing after WCP 3. Therefore, WCP 1 was the better of the three wet-chemical cleaning processes displayed in table 2.
As above mentioned, WCP 1 which was used the stronger concentration of HCl solution and not mixed with H2O2 was more effective against native oxides. Thus, if we employed much stronger HCl solution, WCP 4 as shown in table 4, the elimination of native oxides might be much better. From figure 2-5, the As oxides intensity of WCP 4 seemed to be higher than WCP 1, and in figure 2-7, there was the same tendency of Ga2O3. As figure 2-6 and 2-8 shown, we could not distinguish which cleaning process was better, because the GaAs substrate intensity was higher than As or Ga oxides in deep substrate by using not only WCP 1 but WCP 4. From table 5, it could be found that the ratios of Asoxide/AsGaAs, Aslayer/ AsGaAs, and Gaoxide/GaGaAs by employing WCP 4 were 0.44, 0.15, and 0.17, respectively and all of them were higher than WCP 1. It was indicated that the cleaning
effect of WCP 4 was worse than WCP 1, and WCP 4 could not suppress more native oxides in other words. Therefore, the concentration of HCl solution about 10% which we used in WCP 1 was the optimization of this study. One thing should be mentioned especially that the chemical ratios by employing HCl solution about 10% were all different from table 3 and 5. There were two reasons because we did not experiment at the same time and the XPS instrument might cause the error. In other words, the experiment was not repeatibale.
It is not enough to eliminate native oxides by only using HCl solution. Many researches have been reported that sulfide treatment could suppress the formation of native oxides, especially (NH4)2S solution. Therefore, (NH4)2S solution [40-44] about 1% was used to passivate on the GaAs surface, after dipping in HCl solution about 10%. As figure 2-9 shown, we found that (NH4)2S treatment could eliminate more As oxides and As layer than without treatment. From figure 2-10, it could be pointed out clearly that As oxides almost disappeared in deep substrate. However, nothing was different from with and without (NH4)2S treatment, from 2-11 and 2-12. This was because (NH4)2S solution passivated on GaAs substrate could protect moisture against formation of native oxides.
Thus, it was effective against native oxides to use (NH4)2S solution.
2-4 Summary
In this chapter, we studied different cleaning processes and different suppression effects of native oxides. It was found that about 10% was the optimization of the concentration of HCl solution for eliminating native oxides. More or less 10% HCl solution would decrease the cleaning effect resulting in the increasing of As oxides, As layer, and Ga oxides intensity. As the mixture solution of HCl and H2O2 was used, the suppression of As and Ga oxides would be worse resulting from H2O2 oxidizing the substrate. Thus, H2O2 would not be employed in our cleaning process. After dipping in HCl solution about 10%, (NH4)2S solution about 1%, not the optimization, was used as a passivation layer and it eliminated native oxides, effectively.
Table 2 Wet-chemical cleaning processes (WCP) used in this study
WCP 1 WCP 2 WCP 3
DI. water rinse , 3 min DI. water rinse , 3 min DI. water rinse , 3 min
HCl:H2O=1:10 , 5min HCl:H2O=1:100 , 5min HCl:H2O2:H2O=1:1:10 , 5min
DI. water rinse , 3 min DI. water rinse , 3 min DI. water rinse , 3 min
1330 1328 1326 1324 1322 1320 1318 WCP 1
WCP 2
As-As
As2O3 GaAs As2p3
Intensity (a.u)
Binding Energy (eV) WCP 3
Fig. 2-1 XPS spectrum As 2p3 after different cleaning processes of table 2
48 46 44 42 40 38
WCP 3
WCP 2
WCP 1
As2O3
As3d
Intensity (a.u)
Binding Energy (eV) GaAs
Fig. 2-2 XPS spectrum As 3d after different cleaning processes of table 2
1124 1122 1120 1118 1116 1114 1112
WCP 3
Fig. 2-3 XPS spectrum Ga 2p3 after different cleaning processes of table 2
24 22 20 18 16
Fig. 2-4 XPS spectrum Ga 3d after different cleaning processes of table 2
Table 3 Chemical ratio by XPS spectra of As 2p3 and Ga 2p3 according to different
cleaning processes
condition Asoxide/AsGaAs Aslayer/ AsGaAs Gaoxide/GaGaAs
HCl:H2O=1:10 0.63 0.17 0.37
HCl:H2O=1:100 0.93 0.28 1.05
HCl:H2O2:H2O=1:1:10 0.83 0.24 0.46
Table 4 Wet-chemical cleaning processes (WCP) used in this study
WCP 1 WCP 4
DI. water rinse , 3 min DI. water rinse , 3 min HCl:H2O=1:10 , 5min HCl:H2O=1:1 , 5min DI. water rinse , 3 min DI. water rinse , 3 min
1330 1328 1326 1324 1322 1320 1318 1316 As-As GaAs
As2O3
WCP 4
WCP 1
Intensity (a.u)
Binding Energy (eV)
As2p3
Fig. 2-5 XPS spectrum As 2p3 after different cleaning processes of table 4
48 46 44 42 40 38
WCP 1 WCP 4
Intensity (a.u)
Binding Energy (eV) GaAs As3d
As2O3
Fig. 2-6 XPS spectrum As 3d after different cleaning processes of table 4
1124 1122 1120 1118 1116 1114 1112
Ga2O3
GaAs
WCP 1 WCP 4
Intensity (a.u)
Binding Energy (eV)
Ga2p3
Fig. 2-7 XPS spectrum Ga 2p3 after different cleaning processes of table 4
24 22 20 18 16
WCP 1 WCP 4
Intensity (a.u)
Binding Energy (eV) GaAs Ga3d
Ga2O3
Fig. 2-8 XPS spectrum Ga 3d after different cleaning processes of table 4
Table 5 Chemical ratio by XPS spectra of As 2p3 and Ga 2p3 according to different cleaning processes
condition Asoxide/AsGaAs Aslayer/ AsGaAs Gaoxide/GaGaAs
HCl:H2O=1:10 0.38 0.13 0.16
HCl:H2O=1:1 0.44 0.15 0.17
1332 1330 1328 1326 1324 1322 1320 1318
Intensity (a.u)
Binding Energy (eV)
As2p3 GaAs
As2O3
As-As
no pas.
S-pas.
Fig. 2-9 XPS spectrum As 2p3 of cleaning substrates with or without (NH4)2S solution
48 46 44 42 40 38
S-pas.
no pas.
Intensity (a.u)
Binding Energy (eV) GaAs As3d
As2O3
Fig. 2-10 XPS spectrum As 3d of cleaning substrates with or without (NH4)2S solution
1122 1120 1118 1116 1114 No pas.
S-pas.
Intensity (a.u)
Binding Energy (eV)
Ga2p3 GaAs
Ga2O3
Fig. 2-11 XPS spectrum Ga 2p3 of cleaning substrates with or without (NH4)2S solution
22 21 20 19 18 17
No pas.
S-pas.
Intensity (a.u)
Binding Energy (eV)
Ga3d GaAs
Ga2O3
Fig. 2-12 XPS spectrum Ga 3d of cleaning substrates with or without (NH4)2S solution
Chapter 3
Atomic Layer Deposited Al
2O
3on GaAs
3-1 Introduction
As mentioned in chapter 1, there are more defects on the interface between high-k materials and GaAs substrate. Thus, we should use stable deposited mechanism to grow high quality films such that defects on interfacial layer could be decreased. Al2O3 deposited by atomic layer deposition system (ALD) is just what we need. Al2O3 is a widely used insulating material as gate dielectric, tunneling barrier and protection coating due to its excellent dielectric properties, strong adhesion to dissimilar materials, and its exceptional thermal and chemical stabilities. Al2O3 has a high band gap (~ 9 eV), a high breakdown electric field (5-30 MV/cm) [45, 46], a high permittivity (8.6-10), high thermal stability (up to at least 1000oC), and remains amorphous under typical processing conditions. The leakage current observed in ultrathin Al2O3 on GaAs is equivalent to or lower than that of the state-of-the-art SiO2 on Si. The breakdown electric field of Al2O3 film thicker than 50 Å can be up to ~ 10 MV/cm; this value is near the bulk breakdown electric field for SiO2. ALD is an ultrathin film deposition technique based on sequences of self-limiting surface reactions, which enables thickness control on the atomic scale. The mechanism of ALD is like chemical vapor deposition (CVD), but it is step by step. However, AlO films
are grown by using alternating pulses of Al(CH3)3 (TMA, the aluminum precursor) and H2O (the oxygen precursor) in the presence of N2 carrier gas flow. Its mechanism is as figure 3-1 shown, and we call these processes one cycle. First, TMA is fed into the reactor and react with the OH bond on the GaAs substrate. Then, the reactor is purged with pure N2 gas to clean out products and residual TMA. Third, H2O is purged into the reactor and forms Al2O3 on surface. Finally, the reactor is purged with pure N2 gas again to clean out products and residual H2O. Step by step, Al2O3 films could be deposited layer by layer.
According to this characteristic, we could decrease voids for aspect ratio, as figure 3-2 shown.
3-2 Experimental Procedures
Metal oxide semiconductor (MOS) capacitors were fabricated on (100) oriented n-type Si doped GaAs wafers with a doping concentration of 1 x 1018 /cm3. The optimized cleaning procedure which was mentioned in chapter 2 was used for GaAs wafers. Al2O3 films were deposited by ALD and Pt about 700 Å grown by sputtering was through a shadow mask to form the top gate electrode about 4 x 10-4 cm2. The backside of GaAs
Metal oxide semiconductor (MOS) capacitors were fabricated on (100) oriented n-type Si doped GaAs wafers with a doping concentration of 1 x 1018 /cm3. The optimized cleaning procedure which was mentioned in chapter 2 was used for GaAs wafers. Al2O3 films were deposited by ALD and Pt about 700 Å grown by sputtering was through a shadow mask to form the top gate electrode about 4 x 10-4 cm2. The backside of GaAs