4.1 Conclusions 4.2 Future Works
References
(a)
(b)
(c)
Fig 1.1 AMOLED pixel circuits [1-3]
Fig1.2(a) Id–Vbg transfer characteristics of the dual gate TFT under three different measurement conditions and normal single gate TFT are also shown. [8]
Fig1.2(b) Time evolution of Vth during PBTS (VGS = +20 V, VDS = +0.1 V, and Temperature = 60 ◦C), NBTS (Vbg = −20 V, VDS = +10 V, and
Temperature = 60 ◦C), and NBITS (NBTS with backlight luminance = 3000 cd/m2) of dual gate and single gate a-IGZO TFTs. [9]
Fig1.3(a) Cross-section and circuit symbol of dual gate a-IGZO TFT
-20 -10 0 10 20 1.4(a) Id–Vbg transfer characteristics of the dual gate TFT before and after
Vth shift
Fig1.4(b) Id–Vbg transfer characteristics of dual gate IGZO TFT before and after compensation
Vth shift
Compensation
Fig1.5(a) MOSFET [10]
Chapter 2
2.1(b). The lower and upper blocks are pull-down circuits and pull-up circuits and controlled by two lines EN and EN , respectively..In many conventional circuits of NMOS [12, 13], the pull-up circuits are replaced by an active load. Some examples are shown in Fig. 2.2. As an active load, of pull-up transistor can tolerate more Vth variation. Therefore, the pull-down circuit is decisive for the function. Error probably occurs when Vth of the pull-down transistor shifts. In this chapter, a compensated mechanism is proposed to avoid the malfunction of this kind of integrated scan driver.
2.2 Vth Compensation
2.2.1 Reference Circuit
In this chapter, we use the simplest digital buffer to be the reference circuit to demonstrate the effectiveness of Vth compensation for peripheral circuits for driving. It is consisted of one active load (M1) and one pull-down transistor (M2) and shown in Fig 2.3(a).
Two conventional single-gate IGZO TFT are used to make the reference circuit. By adding a positive or negative DC voltage source (Voffset) between the input voltage Vin and gate of M2, we can imitate the Vth shifts negatively or positively for the same amount,
respectively.
Fig 2.3(b) shows the transfer curves of digital buffer with VDD at 10V for Voffset varying from -0.5V to 1V, which imitates the Vth shift from 0.5V to -1V. The transfer function of the digital buffer is shifted by the variation of Vth accordingly. This variation of output level might be enlarged when the digital buffers are cascaded.
2.2.2 Proposed Circuit
Fig.2.4 shows the proposed digital buffer with Vth compensation and its driving scheme.
In the circuit, a dual-gate IGZO TFT is used as the pull-down TFT (M3) and two other conventional single-gate IGZO TFT are used as pull-up active load (M2) and switch (M1). A capacitance Ccomp is used to store the information of Vth for compensation. In addition, two control signals Vscan1 and Vscan2 are needed to for the compensating operation. The operation can be described by the following steps.
(1) Pre-charge
M1 is turned on by Scan1 while M2 is kept on by Scan2. Thus, Ccomp is charged to Vscan2- Vth_M2 through M1 and M2. This rise in the voltage of Ccomp (Vc) can lower the Vth of M3. During this period, the input voltage Vin is set at a preset voltage (Vpreset).
(2) Compensation
After the compensation step, Vscan1 turns off M1 and thus the information of Vth is stored in Ccomp. From the view point of bottom gate (BG) operation, Vth is fixed at constant.
Thus, input voltage Vdrive fed to the bottom-gate of M3 can correspond to a fix output voltage.
Because the compensation is a dynamic operation, the transfer curve of the proposed circuit cannot be obtained by the DC source-measurement unit. An alternative measurement method is used. The low and high voltages of both Vscan1 and Vscan2 are set at 0V and 10V, respectively.
The preset voltage of Vin is set at 0V and changed to a sawtooth waveform from 0V to 10V in driving period. By simultaneously measuring the input and output voltages with an oscilloscope, as shown in Fig. 2.5, the transfer curve of the proposed circuit can be obtained by corresponding the input and output voltages in the time frame.
Similar to the measurement of the reference circuit, a DC voltage source (Voffset) is added to simulate the Vth variation of M3. The experimentally measured transfer curves of the proposed circuit for various Voffset are shown in Fig 2.6. Apparently, the transfer curves of the proposed digital buffer overlap owing to the compensation mechanism for the Vth variation.
2.3 Comparison
The effectiveness of the proposed compensation mechanism is apparent by comparing Fig 2.4 and 2.6. For quantitative comparison, an index extracted from the transfer curve is required. The index is chosen to be the input voltage Vin when Vout equals to VDD/2. As shown in Fig 2.7, the variation of this Vin index without compensation is up to about 1.5V for Vth shift of 1.5V. As for the proposed digital buffer with compensation, the Vth variation of 1.5V only results in 0.37V difference. .
The better performance of the proposed circuit is further confirmed by another experiment.
A dual-gate IGZO is used to build the pull-down transistor in the proposed circuits. This very transistor is also used to build the reference circuit with its top and bottom gates shorted
together. After measuring the transfer curves of the both circuits, the same transistor is subject to a voltage stress at the bottom gate of 10V for 90 seconds, which results in variation of Vth about 0.56V, as shown in Fig 2.8. The transfer curves of digital buffers with and without compensation before and after the device stress are compared in Fig. 2.9. The extracted index Vin when Vout equals 5V for proposed digital buffer varies only about 0.13V after the device stress, while for the simple digital buffer, it is up to about 0.48V.
2.4 Summary
We use the simplest digital buffer to experimentally demonstrate the concept of Vth compensation using dual gate IGZO TFTs. . The proposed method can compensate the Vth variation of pull-down transistor effectively. Even though this concept is only demonstrated in a simple circuit, the compensation method can be applied to other more complicated circuits.
Fig 2.1(a) The location of peripheral circuits on panel
Fig 2.1(b) Schematic diagram of peripheral circuits
Fig 2.3(a) Schematic of digital buffer
Fig 2.3(b) Transfer curve of digital buffer
Fig 2.5 Input and output voltages with an oscilloscope
Fig 2.6 Transfer curves of digital buffer with compensation
Fig 2.7 Comparison of Vin @ Vout equal 5V with and without compensation
-20 -10 0 10 20
After M2 stressed 90(s) @Vbg = 10V:
Vtg = 0V Vtg = 10V
Fig 2.8 Id–Vbg transfer characteristics of the dual gate TFT before and after voltage stress
Fig 2.9 Transfer curve of simple and proposed digital buffer before and after voltage stress
Chapter 3
AMOLED Pixel Circuits
3.1 Types of OLED
Because of its high transparency and good conductivity, most reported OLEDs are the type of normal OLED, which are built on top of the ITO anode on the substrate[13]. In contrast to a normal OLED, an inverted OLED uses a bottom cathode connected to the drain end of an n-channel TFT [14]. Fig. 3.1 shows the structures of these devices respectively.
For the inverted OLED, large barrier exists between ITO and the electron transport layer (ETL), and thus results in poor electron injection characteristics and large operation voltage.
However, the inverted OLED is more suitable to the pixel circuits with n-channel TFT because VGS of the driving TFT would not change after stress and the driving current of OLED can keep constant.
Because normal and inverted OLEDs have their respective advantages and disadvantages, in this chapter, the proposed new concept of using the top-gate to compensate the Vth difference is applied in the AMOLED pixel circuits with both normal and inverted OLEDs.
3.2.1.1 Schematic and Operation
Fig. 3.2 shows the pixel circuit with inverted OLED and its driving scheme. In the circuit, a dual-gate IGZO TFT is used as the driving TFT (MD) and three other conventional single-gate IGZO TFT are used as switches. Two capacitors, namely, the storage capacitor Cst and the compensating capacitor Ccomp, are used to store the information of data voltage and Vth compensation, respectively. In addition, three control lines are needed to operate the pixel circuit. The operation of the pixel circuit is described in the following steps.
(0) Previous driving
For almost a frame time, M1 and M3 are off and M2 is on. The voltage stored in Cst sets the bottom-gate of MD and thus determines the current and the illumination of the OLED.
(1) Pre-charge
Then, M1 is turned on by Vscan1 while M2 is kept on, so that Ccomp is charged to Vdd through M1 and M2. This rise in the voltage of Ccomp (Vc) can lower the Vth of MD. During this period, the data bus voltage (Vdata) is set at a preset voltage (Vpreset).
(2) Compensation
Before the real driving voltage (Vdrive) coming in, M3 is turned on by Vscan3 and Vdata is kept at the preset voltage for compensation. Meanwhile, M2 is switched to off by Vscan2 and M1 is kept on by Vscan1. In such a case, Vc is discharged through M1 and MD and thus raises the Vth of MD. This discharge current stops when Vc comes to a voltage that changes the Vth of MD to match the preset voltage at the bottom-gate to turn off the transistor.
Therefore, the Vth of MD can be set at a predetermined value by the voltage at its top-gate.
(3) Driving
After the compensation step, Vscan1 turns off M1 and thus the information of Vth is stored in Ccomp. Vdrive is fed to the bottom-gate of MD through M3, which is later turned off by Vscan3. Vdrive is stored in Cst to drive the OLED for a frame time.
3.2.1.2 Experimental Result
In the experiments, for simplification, Vdata is fed directly to the bottom-gate of MD instead of being driven through M3 and stored in Cst. The OLED is simulated by a 1M
resistor and a 2.5V DC voltage source, corresponding to the turn-on resistance and cut-in voltage, accordingly. The low and high voltages for Vscan1 and Vscan2 are -5V and 15V, respectively. Furthermore, Vdata is modified to simulate the Vth variation from various devices. For example, the preset voltage Vpreset of 5V for compensation and driving voltage Vdrive of 8V are synchronously increased or decreased 0.5V to imitate that the Vth shifts negatively or positively for the same amount, accordingly.
The experimental result for 4T2C circuit is shown in Fig. 3.3. As can be seen, it is distinguishable in Vc that different sets of Vdata correspond to different discharge curves. For the lower Vdata input simulating the higher Vth, Vc is discharged to the higher value to compensate the Vth shift of MD. In such a case, the output voltage Voled converges to almost the same value. In other words, the compensation mechanism reduces the Vdata variation range of 1.5V to only about 0.11V difference in Voled, which verifies the circuit’s ability of Vth compensation.
Fig. 3.4 compares the experimental results for the circuit with and without Vth compensation. The case without compensation is measured by disconnecting M1 and Ccomp to exclude the effect of top-gate electrode. The variation of Voled owing to Vth shift of 1.5V is up
Cst and the compensating capacitor Ccomp, are used to store the information of data voltage and Vth compensation, respectively. In addition, four control lines are needed to operate the pixel circuit. The operation of the pixel circuit is described in the following steps.
(0) Previous driving
For almost a frame time, M1, M2 and M4 are off and M3 is on. The voltage stored in Cst sets the bottom-gate of MD and thus determines the current and the illumination of the OLED.
(1) Pre-charge
Then, M1 is turned on by Vscan1, M2 kept off and M3 is turned off by Vscan3, so that Ccomp is charged to Vscan1 –Vth_M1 through M1. This rise in the voltage of Ccomp (Vc) can lower the Vth of MD. During this period, the data bus voltage (Vdata) is set at a preset voltage (Vpreset).
(2) Compensation
Before the real driving voltage (Vdrive) coming in, M4 is turned on by Vscan4 and Vdata is kept at the preset voltage for compensation. Meanwhile, M1 is switched to off by Vscan1, M3 kept off and M2 is turned on. In such a case, Vc is discharged through M2 and MD and thus raises the Vth of MD. This discharge current stops when Vc comes to a voltage that changes the Vth of MD to match the preset voltage at the bottom-gate to turn off the transistor. Therefore, the Vth of MD can be set at a predetermined value by the voltage at its top-gate.
(3) Driving
After the compensation step, Vscan2 turns off M2 and M1 kept off, thus the information of Vth is stored in Ccomp. Vdrive is fed to the bottom-gate of MD through M4, which is later turned off by Vscan4. Vdrive is stored in Cst to drive the OLED for a frame time.
3.2.2.2 Experimental Result
In the experiments, for simplification, Vdata is fed directly to the bottom-gate of MD instead of being driven through M4 and stored in Cst. The OLED is simulated by a 1M
resistor and a 2.5V DC voltage source, corresponding to the turn-on resistance and cut-in voltage, accordingly. The low and high voltage for Vscan1 is 0V and 10V, then the low and high voltages for Vscan2 and Vscan3 are -5V and 15V respectively. Furthermore, Vdata is modified to simulate the Vth variation from various devices.
The experimental result for 5T2C circuit is shown in Fig. 3.6. As can be seen, it is distinguishable in Vc that different sets of Vdata correspond to different discharge curves. In such a case, the output voltage Voled converges to almost the close value. Namely, the compensation mechanism reduces the Vdata variation range of 1.5V to only about 0.67V difference in Voled, which verifies the circuit’s ability of Vth compensation.
Fig. 3.7 compares the experimental results for the circuit with and without Vth compensation. The case without compensation is measured by disconnecting M1, M2 and Ccomp to exclude the effect of top-gate electrode. The variation of Voled owing to Vth shift of 1.5V is up to about 2.77V. The performance of compensation is obvious in the proposed circuit.
3.3 Pixel Circuits with Normal OLED
3.3.1 4T2C circuit
3.3.1.1 Schematic and Operation
Fig. 3.8 shows the pixel circuit with normal OLED and its driving scheme. In the circuit, a dual-gate IGZO TFT is used as the driving TFT (MD) and three other conventional single-gate IGZO TFT are used as switches. Two capacitors, namely, the storage capacitor Cst and the compensating capacitor Ccomp, are used to store the information of data voltage and Vth compensation, respectively. In addition, three control lines are needed to operate the pixel circuit. The operation of the pixel circuit is described in the following steps.
(0) Previous driving
For almost a frame time, M1 and M3 are off and M2 is on. The voltage stored in Cst sets the bottom-gate of MD and thus determines the current and the illumination of the OLED.
(1) Pre-charge
Then, M1 is turned on by Vscan1 while M2 is kept on, so that Ccomp is charged to Vdd through M1 and M2. This rise in the voltage of Ccomp (Vc) can lower the Vth of MD and thus increase the OLED current and illumination. However, during this period, the data bus voltage (Vdata) is set at a preset voltage (Vpreset), which is relatively low to avoid the high current of MD induced by the top-gate voltage (Vc) to minimize the unwanted illumination of the OLED.
(2) Compensation
Before the real driving voltage (Vdrive) coming in, M3 is turned on by Vscan3 and Vdata is kept at the preset voltage for compensation. Meanwhile, M2 is switched to off by Vscan2 and M1 is kept on by Vscan1. In such a case, Vc is discharged through M1 and MD and thus raises the Vth of MD. This discharge current stops when Vc comes to a voltage that changes the Vth of MD to match the preset voltage at the bottom-gate to turn off the transistor.
Therefore, the Vth of MD can be set at a predetermined value by the voltage at its top-gate.
(3) Driving
After the compensation step, Vscan1 turns off M1 and thus the information of Vth is stored in Ccomp. Vdrive is fed to the bottom-gate of MD through M3, which is later turned off by Vscan3. Vdrive is stored in Cst to drive the OLED for a frame time.
3.3.1.2 Experimental Result
In the experiments, for simplification, Vdata is fed directly to the bottom-gate of MD instead of being driven through M3 and stored in Cst. The OLED is simulated by a 1M
resistor and a 1V DC voltage source, corresponding to the turn-on resistance and cut-in voltage, accordingly. The low and high voltages for Vscan1 and Vscan2 are -5V and 15V, respectively. Furthermore, Vdata is modified to simulate the Vth variation from various devices.
The experimental result for 4T2C circuit is shown in Fig. 3.9. As can be seen, it is distinguishable in Vc that different sets of Vdata correspond to different discharge curves. In such a case, the output voltage Voled converges to almost the same value. Namely, the compensation mechanism reduces the Vdata variation range of 1.5V to only about 0.1V difference in Voled, which verifies the circuit’s ability of Vth compensation.
Fig. 3.10 compares the experimental results for the circuit with and without Vth compensation. The case without compensation is measured by disconnecting M1 and Ccomp to exclude the effect of top-gate electrode. The variation of Voled owing to Vth shift of 1.5V is up to about 0.6V. The performance of compensation is obvious in the proposed circuit.
(a)
(b)
Fig 3.1 (a) Structure of normal OLED (b) Structure of inverted OLED [15]
Fig 3.3 The experimental results for 4T2C circuit with inverted OLED
Fig 3.4 The experimental results for the 4T2C circuit using inverted OLED with and without Vth compensation
Fig 3.5 5T2C circuit and its driving scheme
Fig 3.7 The experimental results for the 5T2C circuit with and without Vth compensation
Fig 3.9 The experimental results for 4T2C circuit with normal OLED
Fig 3.10 The experimental results for the 4T2C circuit using normal OLED with and without Vth compensation
Chapter 4
Conclusion And Futrure Work
4.1 Conclusion
A new concept using the top-gate of the dual-gate IGZO TFT to compensate the Vth is proposed. The validity of the Vth compensation is verified in examples of digital buffer and AMOLED pixel circuits. The performance of compensation is apparent. Applying this concept, new circuits can be invented.
4.2 Future work
For the next step, we will try to improve or simplify the structure of Vth compensation circuits of AMOLED pixel to achieve higher aperture ratio and operation frequency.
Furthermore, we will apply this Vth compensation concept to other circuits with the requirement of Vth compensation, such as active sensing pixel circuits, in the similar manner.
References
[1] Joon Chul Goh, Hoon Ju Chung, Jin Jang, and Chul Hi Han, “A New Pixel Circuit for Active Matrix Organic Light Emitting Diodes”, IEEE Electron Device Lett, VOL. 23, pp.
544-546, NO. 9, SEPTEMBER 2002
[2] Roger G. Stewart, “Active Matrix OLED Pixel Design”, SID Symposium Digest of Technical Papers, May 2010, Volume 41, Issue 1, pp. 790-793
[3] Jae Hoon Lee, Ji Hoon Kim, and Min Koo Han, “A New a-Si:H TFT Pixel Circuit Compensating the Threshold Voltage Shift of a-Si:H TFT and OLED for Active Matrix OLED”, IEEE ELECTRON DEVICE LETTERS, VOL. 26, p.897-899, NO. 12, DECEMBER 2005
[4] Young Ju Park*, Myoung Hoon Jung, Sang Ho Park, and Ohyun Kim,
“Voltage-Programming-Based Pixel Circuit to Compensate for Threshold Voltage and Mobility Using Natural Capacitance of Organic Light-Emitting Diode”, Japanese Journal of Applied Physics 49 (2010) 03CD01
[5] Seung Min Lee, Chang Il Ryoo, Jae Wook Park, “Control of Threshold Voltage in Back Channel Etch Type Amorphous Indium Gallium Zinc Oxide Thin Film Transistors”, SID
[5] Seung Min Lee, Chang Il Ryoo, Jae Wook Park, “Control of Threshold Voltage in Back Channel Etch Type Amorphous Indium Gallium Zinc Oxide Thin Film Transistors”, SID