Control Unit

To control the input power to the lamps, a fuzzy control algorithm is used to control the lamp power. A typical measured wafer temperature for the detection points at the geometrical center of the wafer controlled by the fuzzy control algorithm is rather stable at steady state in this RTP processor.

CHAPTER 3

RESULTS AND DISCUSSION

The major results obtained in each individual project are presented and discussed in this chapter. Complete results for each individual projects are available from the reports for each project.

3.1 The temperature uniformity of wafer

In the RTP processor, the temperature uniformity of wafer is an important factor for growing a uniform thin film. In the first individual project, we focus on the design of a new wafer heating and temperature control system to improve the temperature uniformity of the wafer. However, the temperature uniformity of wafer depends on the arrangement of lamps, the power control scheme of the lamps, the temperature detector, the geometry of the chamber, the types of susceptor and etc. To achieve this goal, we introduce a multi-zone lamp heating assembly with automatic lamp power control for each zone and an active six-zone resistance heater with isothermal circular copper plate placed just under the wafer to increase the temperature uniformity across the wafer.

As just mentioned, the temperature uniformity of the wafer depends largely on the heat flux from heating source to the wafer. For this purpose, we use the four-zone lamp heating with a fuzzy control model to adjust the input power actively. The photo of the multi zone lamp heating unit is shown in Fig. 3.1. It is important to note that the resistance heating can result in better wafer temperature uniformity than the lamp heating. So we introduce a six-zone resistance heater directly adhering to a 10-mm thick circular copper plate to improve the temperature uniformity, as shown in Fig. 3.2.

However, only using the resistance heater will increase the processing time and power

consumption obviously. To avoid this disadvantage, it is of interest to investigate whether the installation of the six-zone active resistance heater along with the four-zone lamp heating can improve the uniformity of the wafer temperature and in the meantime reduce the processing time during the whole process. Moreover, the results from this study indicate that combining the four-zone lamp heating and six-zone active resistance heating does reduce the processing time and improve the temperature uniformity of the wafer. The gas is sent into the processor at the fixed temperature of 25℃. Note that at the input gas flow Q=1 slpm the temperature variation on the wafer is still small, as shown in Fig. 3.3.

3.2 Temperature Uniformity of Silicon Wafers during RTP and Spectral Properties of BST thin films

Since the wafer is so thin that the thermal non-uniformity may be insignificant in axial ( z ) direction, we concentrate on the wafer surface thermal non-uniformity in radial (r) direction. Random measurement errors _σ were added to the desired temperature trajectories in simulation as described in the report for the second individual project. In the present study, the respective dimensional measured temperatures T₁ⁿ_,1± 0.7728^oC and T₁ⁿ_,1± 3.864^oC were simulated for the cases of

σ

=0.001 and

σ

=0.005 (Fig. 3.4).

Figures 3.5(a)-(c) show the three-dimensional graph of the incident-heat-flux profiles calculated by inverse method on the wafer surface at a measurement error

σ

=0.0 for uniform temperature tracking of the 100, 200 and 300^oC/sec ramp-up rates, respectively. Ramping of wafer temperature took place when there was an excess of absorbed energy over heat-loss energy. During the initial transient phase, the wafer temperature increased with the increasing energy absorption, and heat losses also

increased as the wafer temperature increased. The initial absorbed energy, required for wafer uniform-temperature tracking, was larger than that during other periods.

Inverse dynamic incident-heat-flux profile results for wafer surface thermal non-uniformities at three linear ramp-up rates with a measurement error of σ ^=0.0 are shown in Figs. 3.6(a)-(c), respectively. These figures show that when incident heat-flux profiles are controlled as in our inverse-method approach, temperature differences develop at the edges of the wafers. Initially, the temperature difference (thermal non-uniformity) is not significant, however, as the ramp-up of the wafer proceeds, the thermal non-uniformity developed at the edge increases with increasing edge-heating compensation, as shown in Fig. 3.9. When the wafer reaches the higher steady state, the incident-heat-flux profile changes from the transient stage to the steady stage, the thermal non-uniformity drops gradually and approaches the steady-state. Thus, edge-heating compensation has an overheating effect on thermal uniformity during processing. The thermal non-uniformity was not significant in the present inverse incident-heat-flux profiles, even though during transient periods, resulting maximum temperature differences were 0835, 1.174 and 1.516℃ for the 100, 200 and 300 ℃/sec ramp-up rates, respectively. Figure 3.7 illustrates the resulting maximum temperature differences (∆T , the absolute value of temperature difference between the edge and the center of the wafer surface) during transients as a function of the desired linear ramp-up rates for measurement errors of σ =0.0, 0.001, 0.003 and 0.005, respectively. Our results show that the maximum temperature differences occurring during the ramp-up increased with the ramp-up rate. The thermal non-uniformity of the inverse results decreases with increasing measurement error

σ

from 0.001 to 0.005. Although a linear ramp-up rate of 300^oC/sec was used and measurement errors did reach 3.864^oC (in the case of

σ

=0.005), the surface

temperature was maintained within 1.6^oC of the center of the wafer surface when the incident-heat-flux profiles were dynamically controlled according to the inverse-method approach. These thermal non-uniformities could be acceptable in RTP systems.

3.2.1 Spectral Properties of BST thin films

The transmittance and reflectance of BST thin films for various film thicknesses are in the near-mid infrared wavelength region, as shown Figs. 3.8 and 3.9. With increasing of the film thickness, the transmittance is increased and the vibration of reflectance is clearly observed. Figures 3.10 and 3.11 show that the refractive index and absorption index of BST thin films for various film thickness are in visible light wavelength region. As the BST thin films thickness is 0.4µm, the highest refractive index and absorptive index can be obtained. The value of absorptive index of BST thin films is close to zero at near-mid infrared region, but the maximum value of the refractive index appears at the visible light region. Hence, in view of the RTP process on BST thin films, the BST thin films thickness of 0.4µm is the best choice.

Figure 3.12 indicates that the reflectance of BST thin films for various heating temperatures in the near-mid infrared wavelength region. Results show that there is no manifest difference for reflectance analysis and has the tendency of shifting toward to the short-wavelength in the temperatures ranging from 30 to 600 . For BST thin ℃ ℃ films, the reflectance tends to shift toward to the long-wavelength because thin film structures have been transferred upon the temperature of 600 .℃

3.3 BST thin films and their electrical properties

In this section the results from the third individual project are summarized. The stabilisation of the precursor solution was a difficult step during the preparation of

BST films because of the molecular water associated with Ba- and Sr-hydroxides released to the solvent during the refluxing step resulted in preferential precipitation of the Ti by rigorous hydrolysis. This problem was overcome by individually reacting the starting materials with 2-methoxy ethanol and evaporating the water content in the Ba- and Sr-solution by refluxing for 3–4 h before mixing to form BST complex sol.

The solution once stabilised can be stored for months without any precipitation. The individual precursor solution obtained by reacting the Ba-, Sr-hydroxides and Ti-isopropoxide with 2-methoxy ethanol were filtered and analysed by static gravimetry (by solvent evaporation of a small quantity of the solution and decomposing the resultant precursor at 700℃) prior to mixing them together to confirm the composition of the solution.

The BST film deposited on the Si/SiO2/Pt substrate peeled off very often on pyrolysis at the interface between bottom Pt-electrode and the Si/SiO2 substrate. This is mainly due to the poor adhesion of Pt-thin film on the Si/SiO2 substrate. The adhesion of bottom Pt-electrode on the Si/SiO2 substrate was greatly improved by depositing a 100 nm Ti buffer layer between Si/SiO2 and Pt layer. However, Ti buffer layer incorporation lead to added complexities by way of Ti-migration onto the surface of bottom Pt-electrode on annealing. Fig. 3.13 shows the thickness variation of the 500℃ pyrolysed thin film as a function of annealing temperature determined from the SEM cross-sectional image. The thickness of the sample increased initially up to an annealing temperature of 700℃ and thereafter showed a decrease. Fig. 3.14 shows the surface and cross-sectional image of 800℃ per2h annealed Pt/Ti/SiO2/Si wafer. Surface image shows the formation of random islands on the Pt surface due to the Ti-migration. The cross-sectional image shows that the thickness of each island is around 128 nm, which contributes to BST film thickness. The composition of this

surface discontinuous layer has been determined using XPS.

3.3.1 Phase formation characteristics

X-ray diffraction study of the films post-annealed at different temperatures indicated that reasonably well-crystallised films were obtained at a temperature as low as 500℃. The XRD pattern showed all major X-ray reflection peaks of perovskite BST phase indicating the polycrystalline nature of the film with (110) as the major peak. Crystallinity of the thin films improved with increase in the annealing temperature, indicated by the increase in intensity of the X-ray diffraction peaks. The average grain size was calculated by using the full width at half maximum of the dominant (110) peak using Scherrer’s equation. The 500℃annealed sample showed an average grain size of 20 nm, which increased to 32 nm on annealing above 600 ℃.

The grain size of the films increased with increasing annealing temperature.

Increase in grain size with increasing annealing temperature is expected because of the sintering wherein the small grains coalesce to form larger grains. Lattice parameter of the thin films annealed in the temperature range 500 – 700℃ remained almost constant (Table 3.1). However, when annealed at temperatures above 700℃, a small decrease is observed. Film annealed at 800℃ showed 0.02Å contraction in lattice parameter with respect to the film annealed at 500℃. This type of lattice shrinkage was also observed in sputtered BaTiO3 and BST, which has been attributed to non-equilibrium and highly distorted states within the films. This indicates that the low-temperature annealed films are in more strained form and the atomic entities must have been in the non-equilibrium positions which relax to the equilibrium position when annealed at higher temperatures, hence a contraction in lattice parameter is

obvious. Similarly, XRD patterns were obtained for the films prepared from different concentration solutions (0.08, 0.15 and 0.28 M) on to platinised Si-wafer, which showed phase pure BST thin films. The average grain size calculated using Scherrer’s equation was approximately 32 nm.

3.3.2 Leakage current characteristics

The leakage current density vs. electric field (J–E) plot of the BST thin films annealed at different temperatures is shown in Fig. 3.15, which shows variation with annealing temperature. In the positive voltage region of J–E plot, film annealed at 500

℃ shows larger leakage current than that annealed at higher temperatures. Lowest leakage current is observed for the film annealed at 600 and 700℃. The 800℃

annealed film shows slightly higher leakage current than 600 and 700℃ annealed films but is lower than 500℃ annealed film. The J–E characteristics of all the samples show three different regions indicating the contribution from three different types of conduction mechanisms at low, intermediate and high field regions. At lower voltage the film shows ohmic behaviour (J α E) and deviates at intermediate and higher fields. The turn-on electric field from ohmic to non-ohmic region decreased as the annealing temperature increased. The turn-on electric field for the sample annealed at 500 and 600℃ is around 300 kV cm^–1 and that of film annealed at 700 and 800℃ is around 200 and 150 kV cm^–1, respectively. The leakage current characteristics of the thin film capacitor depends upon several factors such as the top and bottom electrode interface, surface roughness, the integrity of the electrodes, formation of interfacial low impedance layer or presence of any impurity second phase in the dielectric film which provides an easy path for electrons which can dramatically increase the leakage current. Formation of hillocks on the bottom

Pt-electrode due to repeated thermal cycling is another reason for the increased leakage current in sol–gel derived films. High leakage current observed in the case of 500℃ annealed samples might be due to the presence of embedded pyrolysed decomposition products in the film.

The decrease in the leakage current with increase in annealing temperature is because of the burn-off of these embedded decomposition products. Increase in leakage current for the film annealed at 800 ℃is due to the increase in the grain size, as observed by SEM analysis, which contributes to surface roughness. The grain size of the film could play an important role in deciding the surface roughness; the small grain size films usually have smooth surface and low leakage current. SEM surface analysis of the 500 and 600℃ annealed samples show smooth fine grain surface, of which a low leakage current is expected. But the experimental result of 500℃

annealed film is contrary, which shows higher leakage current indicating the presence of embedded decomposition products. On annealing above 600 ℃ these decomposition products are completely burnt-off and the film is in the more pure form than the 500℃ annealed film and show the lowest leakage current.

On further increasing the annealing temperature, the film sinters resulting in higher grain size associated with higher roughness. Hence, a higher leakage current is expected from the film annealed at 800℃ than the 700 ℃ annealed film as observed experimentally. The surface roughness of the film is also affected by incorporation of a bottom adhesive layer such as Ti. The Ti-migration onto the surface of the bottom Pt-electrode makes the surface rough by forming islands. This will increase the roughness of the film and also increases the leakage current.

To verify whether the system under investigation (Ag-BST) satisfy the

percolation theory, the leakage current density at 100 kV/cm is plotted as a function of Ag content in BST films (Fig. 3.16). Assuming that the increasing leakage current density is proportional to increasing conductivity, the plot between leakage current density at 100 kV/cm for each composition of the composite film and Ag-content has been found to fit into a second order polynomial, which is in accordance with the percolation theory and satisfies the predicted power dependence.

3.3.3 Effect of concentration on the J-E characteristics

Concentration of the BST precursor solution showed pronounced influence on the leakage current behaviour of the thin films as it decides the microstructure of the film at a given annealing temperature. BST films for this study were prepared using different concentration solutions (0.08, 0.15, 0.28 M) and remaining conditions such as solvent evaporation (140℃), pyrolysis (500℃), annealing temperature (700℃) and duration of these processes were fixed. Fig. 3.17 shows the J–E characteristics of the BST thin films prepared using solutions of three different concentrations and annealed at 700℃ for 2 h. The J–E plot for thin films deposited using each concentration is different. Important observations are:

1. Leakage current density increased with increase in precursor solution concentration.

Leakage current density of the BST film prepared from 0.28M solution is larger than those prepared from the low concentration solution.

2. The turn-on voltage is different for the film deposited from different concentration solution: film prepared from high concentration solution (0.28 M) showed turn-on voltage of approximately 250 kV cm^–1, that of film prepared from 0.15 and 0.08M solution is 200 kV cm^–1 in the positive voltage region.

3. The positive and negative field J–E behaviour is different and asymmetric for the

reason already described in the previous section.

3.3.4 Dielectric properties

Figs. 3.18 (a) and (b) shows the variation of dielectric constant and the loss tangent with applied d.c.-electric field of the BST thin films annealed at different temperatures. With the increase in the annealing temperature the dielectric constant also increased. The 800℃ annealed thin film shows maximum dielectric constant of around 650 and that of the film annealed at 500℃ is the lowest, approximately 325 at zero bias. The electric field at which the dielectric constant has its maximum value is not located at the zero bias fields instead shifted towards the positive voltage region.

Maximum dielectric constant field (Em) has shifted consistently from 43 kV cm^–1 for 500℃ annealed film to 20 kV cm^–1 for the film annealed at 800℃. The increase in dielectric constant with increasing annealing temperature is attributed to the increase in the grain size and crystallinity of the thin film. XRD and SEM results showed that with increasing annealing temperature, crystallinity and grain size increased, which in turn resulted in larger polarization density there by increasing the dielectric constant.

It is well known that as the grain size increases the dielectric constant increases and as the porosity in the film increases, the dielectric constant decreases.

The shift in electric field at which the dielectric constant has its maximum is because of the same reason that changes in the interface characteristics brought in by annealing the film at different temperature and associated Ti-migration problem which modifies the interface. The space charge capacitance at the two interfaces is different because of the difference in interface characteristics. The dielectric loss is maximum for film annealed at 500℃ (0.14 at zero bias). Lowest loss tangent is observed for the BST films annealed at 600 and 700℃ (0.04). Also, these thin films

show approximately similar behavior under the bias field variation. Further increase in the annealing temperature to 800℃ resulted in the increase of loss tangent to higher value (0.06 at zero bias) than the film annealed at 600 and 700℃ but much lower than the film annealed at 500℃.

The dielectric loss originates from two mechanisms: resistive loss and relaxation loss. Resistive loss mechanism involves energy consumption by the mobile charges in the film; whereas, in the case of relaxation loss mechanism, it is relaxation of the dipole which dissipates the energy. If there is very few mobile charges in the film then the later mechanism is dominating. The resistive loss mechanism is directly connected to the leakage current of the film: if the leakage current is higher the loss is also higher. Alternatively, if the dielectric constant of the film is larger, then an increase in the dielectric loss is obvious due to the contribution from the second mechanism. Enhanced polarization increases the energy dissipation during the relaxation. The higher dielectric loss of 500℃ annealed film is due to the higher leakage current of the film. Lowest leakage current is observed for the films annealed

The dielectric loss originates from two mechanisms: resistive loss and relaxation loss. Resistive loss mechanism involves energy consumption by the mobile charges in the film; whereas, in the case of relaxation loss mechanism, it is relaxation of the dipole which dissipates the energy. If there is very few mobile charges in the film then the later mechanism is dominating. The resistive loss mechanism is directly connected to the leakage current of the film: if the leakage current is higher the loss is also higher. Alternatively, if the dielectric constant of the film is larger, then an increase in the dielectric loss is obvious due to the contribution from the second mechanism. Enhanced polarization increases the energy dissipation during the relaxation. The higher dielectric loss of 500℃ annealed film is due to the higher leakage current of the film. Lowest leakage current is observed for the films annealed

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