6.1 User Interface (UI) and Simulation Process
The numerical techniques and physical models of p-NEP have already been introduced in Chapter 2. In this chapter, the user interface and simulation process of p-NEP which is written using the well-known software, MatLab, are discussed. In addition, the simulation results are demonstrated as well.
Firstly, the basic structure of the simulator p-NEP is shown in Fig. 6.1. It can be seen that the code of p-NEP is comprised of four parts: (i) a main program of p-NEP which can yield the hole subband structures, Fermi level, confining electrostatic potential profile, and so on in the p-type inversion layer; (ii) a hole mobility program which can evaluate the group velocity over all k-plane, scattering rates based on the momentum relaxation mechanism, and hole mobility; (iii) a hole gate direct tunneling program which can calculate the hole gate direct tunneling current with the WKB approximation; and (iv) a threshold voltage and capacitance program which can compute the threshold voltage using the linear extrapolation of inversion hole density and the capacitance versus gate voltage using the formula ⁄ .
To the part one, Fig. 6.2 demonstrates the UI for the main program. First of all,
we run the m-file named NEP4.m in the window of the current folder. Then, the setting parameters are keyed in the command window of MatLab one by one. After completing the input procedure, the popup window for saving path will appear. All simulation results of p-NEP are saved as the type of MatLab data and the data size of one bias point is of around three hundred megabyte. To the part two, the UI for the hole mobility program is displayed in Fig. 6.3. We start by dropping the wanted MatLab data into the same folder and running the m-file named Sub_Program_Head.m in the window of current folder. Then, we select the loaded MatLab data and press OK in the popup window. When completing the next popup window for the scattering parameters setting, the hole mobility program will be executed. To the part three, the UI for the gate direct tunneling program is illustrated in Fig. 6.4. The operational procedure is basically the same as that shown in Fig. 6.3, beside the running m-file named Program_Head.m and without the second popup window.
To the part four, the UI for the threshold voltage and capacitance programs is in Fig. 6.5. The operational procedure here is divided into two steps: the first step represents the threshold voltage calculation and the second step represents the capacitance calculation. We start by dropping the wanted MatLab data into the same folder and running the m-file named Program_Head.m in the window of current folder. Then, select the loaded MatLab data and press OK in the popup window. When the first step is done, the popup figure of the hole inversion density versus gate voltage and the second popup window which should be keyed with the range of the linear extrapolation are shown. After that, the results of the second step will appear in the popup figure as well.
6.2 Demonstration Results
6.2.1 Hole Subband Structure
The simulation results from the part one of p-NEP in Fig. 6.1 are shown as follows. Firstly, the triangular potential based hole subband levels, occupancies, and structures in the stressed p-type silicon inversion layer are shown in Fig. 6.6, 6.7 and 6.8, respectively. In Fig. 6.9, 6.10, and 6.11, the fully-iterated (by the six-band k‧p Schrödinger-Poisson self-consistent method) energy contours of the first subband with the different materials, silicon, germanium, and gallium arsenide, are illustrated.
6.2.2 Hole Inversion-Layer Mobility
About the part two of p-NEP in Fig. 6.1, the hole group velocity of the first subband over all k-plane on both (001) and (110) are shown in Fig. 6.12 and 6.13. The corresponding scattering rates versus energy at a specific angle θ=0 are shown in Fig. o 6.14 and 6.15. In order to see the screening effect as depicted in Eq. (2.3.4.1), Fig.
6.16 shows the (001) and (110) hole inversion-layer mobility with and without screening effect. It is reasonable for the larger screening effect to appear in the stronger inversion layer.
6.2.3 Hole Gate Direct Tunneling and Capacitance
As to the part three and four of p-NEP in Fig. 6.1, the simulation results of the
hole gate direct tunneling current and capacitance are shown as follows. In Fig. 6.17, the calculated unstressed hole gate direct tunneling current density are found in the satisfactory agreements with the experimental data from [1]. Then, the unstressed and stressed capacitance versus gate voltage can also be satisfactorily compared with the experimental data from [2] where the stressor originated from the selective fully silicided (FUSI) gate, in Fig. 6.18 and Fig. 6.19. More practically, the hole gate direct tunneling current density and capacitance are drawn simultaneously with the varying poly-gate doping concentrations, stress conditions, and metal-gate work functions in Fig. 6.20, 6.21, and 6.22.
References
[1] K. N. Yang, H. T. Huang, M. C. Chang, C. M. Chu, Y. S. Chen, M. J. Chen, Y. M.
Lin, M. C. Yu, S. M. Jang, D. C. H. Yu, and M. S. Liang, “A physical model for hole direct tunneling current in p+ poly-gate pMOSFETs with ultrathin gate oxides,” IEEE Trans. Electron Devices, vol. 47, no. 11, pp. 2161-2166, Nov.
2000.
[2] D. W. Lin, M. Wang, M. L. Cheng, Y. M. Sheu, B. Tarng, C. M. Chu, C. W. Nieh, C. P. Lo, W. C. Tsai, R. Lin, S. W. Wang, K. L. Cheng, C. M. Wu, M. T. Lei, C. C.
Wu, C. H. Diaz, and M. J. Chen,“A millisecond-anneal-assisted selective fully silicided (FUSI) gate process,” IEEE Electron Device Lett., vol. 29, no. 9, pp.
998–1000, Sept. 2008.
Fig. 6.1 The basic structure of the simulator p-NEP.