Design target

A broad band (from VHF to lower L band) and high power (>2 W) design is required, but deficient in the industry. The major goal of this thesis is to prove that such low Q (~0.6), broad band and high power board level RF power amplifier is available by using an unmatched GaN HEMT. Such PA can be used in the military FHSS SDR.

Table 1.3 Specifications of this work

Categories

Specifications

Frequency range (MHz)

200 ~ 1200

Gain (dB)

>10

Output power (dBm)

>36

PAE (%)

>40

Chapter 2

RF Power Amplifier Miscellanea

No doubt the most expensive hardware component in a wireless communication system is the RF power amplifier. Though the RF power amplifiers had developed for a very long time and some of them were quite matured, many new architectures and devices still bloom and thrive because of new wireless communication technology launch. No matter how the new technology and devices are evolving, some fundamental categories and terminologies yet remain firm and erect.

2.1 RF power amplifier operation modes

In spite of there are different classifications for PAs, the most widely used is the distinction between linear and switching amplifiers. In linear amplifiers, the output amplitude of the signal is a linear function of the input amplitude. Class A, B, and AB amplifiers come under this type where the output transistor acts as a current source and the average output impedance during the operation is relatively high. The current and voltage waveforms through and across the output device are often full, or partial sinusoids. In switching amplifiers like Class-D, E and F, the power amplifier is driven with a large amplitude signal, turning the device ON or OFF as a switch. These amplifiers can achieve a very high efficiency at the expense of linearity.

OMN IMN

VDD

RFC

D G

S

Figure 2.1 A basic PA topology

2.1.1 Linear Mode Amplifier

Linear amplifiers operate at constant gain and are based on the load-line theory [7], which states that the maximum power a transistor can deliver to a load is determined by the supply voltage and the maximum current of the transistor. When the transistor load is a large inductor/RF choke, the maximum voltage swing possible at the drain of this transistor is 2*supply voltage. The load line (of the optimum load resistance) for maximum output power is plotted from Ropt = VDSmax -

Vk / Im.

In other words, PAs can deliver maximum power to a load given by RLoad,opt. This resistance is then transformed to 50 Ω using an impedance transformation network.

Figure 2.2 The I/V curve showing the bias point and load line for a transistor

2.1.1.1 Class A

In class A, the quiescent current is large enough that the transistor remains at all times in the saturation (active) region and acts as a current source, controlled by the drive. Consequently, the drain voltage and current waveforms are (ideally) both sinusoidal. The Class-A amplifier is

defined by a transistor that conducts current over the full 360 degrees of a cycle, 100% of the input signal is used. Class-A amplifiers are typically more linear and less complex than other types. The class of operation is determined by the operating point on the load-line i.e., from the I/V characteristics of the transistor. Figure 2.3 shows the bias point for a transistor in Class-A operation. Here the transistor is biased at the center of the load line i.e., the transistor is in the saturation (active) region at all times and the output voltage/current swings are maximum. The conduction angle α, which is the time for which the device is conducting, is equal to 2π in class-A amplifiers, as shown in Figure 2.8.

Figure 2.3 Class-A operation

The voltage, current and power waveforms of a class-A amplifier are shown in Figure 2.4. As can be seen from the plots, the amplifier is always conducting, which results in a maximum efficiency of only 50%.

However, the linearity is excellent as it preserves the input and output waveforms without any distortion.

Figure 2.4 Class-A amplifier waveforms

It is interesting to note that the use of an inductive RF choke for the DC supply as shown in Figure 2.1 allows a theoretical maximum efficiency of 50%. If we look at the plot of instantaneous drain (collector) dissipation and load dissipation in Figure 2.5, we see that the average power dissipated in the load and in the transistor drain (collector) are equal, hence the figure of 50%. As the transistor drain (collector) current decreases on the falling side of the wave, the DC source “pumps” power into the load circuit. As the transistor drain (collector) current increases, dissipation increases in the transistor and instantaneous power into the load decreases. The DC current from the supply remains practically constant. This is because the RFC inductor acts to smooth the current waveform.

Figure 2.5 Class-A amplifier waveforms

2.1.1.2 Class B

Class-B amplifiers are biased at the threshold voltage of the transistor such that the conduction angle is now π, as shown in Figure 2.8.

The current waveform is positive only for one cycle of the input voltage.

Hence the power consumption will be lower than class-A type. The optimal load resistance is now R

Load,opt

= V

max

/(I

max

), which is the same as

with Class-A type amplifiers. Theoretical efficiency is around 78%, but the linearity is worsened in these types of amplifiers. However, Class-B amplifiers also suffer from cross-over distortions at the switching points.

The gate bias in a class-B PA is set at the threshold of conduction so that (ideally) the quiescent drain current is zero. As a result, the transistor is active half of the time and the drain current is a half sinusoid.

Since the amplitude of the drain current is proportional to drive amplitude

and the shape of the drain-current waveform is fixed, class-B provides

linear amplification.

Figure 2.6 Class-B operation

2.1.1.3 Class AB

Class-A and B are two extremities of PA topologies in terms of efficiency and linearity. However, PA’s operating in the region between these two operating points is widely used and they are aptly known as class-AB amplifiers. Good linearity and efficiency can be achieved with devices in this regime. The conduction angle now is π <α<2 π.

2.1.1.4 Class C

Class-C amplifiers, which are non-linear, are biased below the cut-off region and their conduction angle is < π, as shown in Figure 2.8.

With very low power consumption, the efficiency can reach up to 100%.

However, the output power levels will also be quite low and unsuitable for most of the applications.

Figure 2.7 Q-point of Class-A, AB, B and C type amplifiers

Figure 2.8 Conduction angle relations for linear amplifiers

2.1.2 Switch mode amplifiers

In switching amplifiers, the power amplifier is driven with a large amplitude signal, turning the device ON or OFF as a switch. They operate at constant input power (in saturated mode) and power control is obtained by varying the gain of the amplifier. Note that switching amplifiers are by definition non-linear with respect to the input signal; that is, amplitude information is not preserved.

2.1.2.1 Class D

Class-D PAs use two or more transistors as switches to generate a square drain-voltage waveform. A series-tuned output filter passes only the fundamental-frequency component to the load, resulting in power outputs of (8/π

²

)VDD

²

/R and (2/π

²

)VDD

²

/R for the transformer-coupled and complementary configurations, respectively. Current is drawn only through the transistor that is on, resulting in 100 % efficiency for an ideal PA. A unique aspect of class D (with infinitely fast switching) is that efficiency is not degraded by the presence of reactance in the load.

Practical class-D PAs suffer from losses due to saturation, switching speed, and drain capacitance. Finite switching speed causes the transistors to be in their active regions while conducting current. Drain capacitances must be charged and discharged once per RF cycle.

2.1.2.2 Class E

Class-E amplifiers are a relatively novel type of switching amplifier wherein the voltage and current waveforms are shaped using L’s

and C’s in such a way to achieve an efficiency of 100%. Under ideal condition, the voltage of the switch transistor drops to zero and has zero slope just as the transistor turns on and conducts current. This ensures that neither voltage nor current exists simultaneously in the circuit, thus achieving 100% efficiency. Class-E amplifiers require only a single transistor and can operate at frequencies as high as tens of GHz.

2.1.2.3 Class F

Class-F amplifiers employ harmonic resonators at the output to shape the drain waveforms. The harmonic traps are designed in such a way that the voltage waveform resembles a square wave (with the introduction of some harmonic components in the waveform) and the current wave resembles a half sine wave. Conversely, “inverse class-F”

can also be designed. Again, both the voltage and current waveforms do not exist simultaneously, thus achieving good efficiency. With higher harmonics, the efficiency can be improved up to 100%, but linearity is severely worsened.

Table 2.1 Summary of power amplifier classes

2.2 RF power amplifier terminologies

In this section, some of the important terms and specifications related to a PA are discussed.

2.2.1 Transducer Power Gain

PA’s are required to boost the transmitted signal by providing a signal gain to the output of the preceding stage, usually a PA driver or a mixer. Transducer power gain is the ratio of output power (delivered to the load) to the input power (available from the source).

Power Gain =

^(2.1)

(Power delivered to the load)/(power available from the source)

Figure 2.9 Block diagram showing definition of transducer power gain

2.2.2 Gain Flatness

This is the measure of uniformity of the gain across the wide frequency range of interest. This parameter commonly used for wide band systems. It is desired that the gain be flat over the frequency band.

2.2.3 Linearity

Linearity is an important metric of any amplifier. It is desired that the amplifier operate with high linearity i.e., the output power be linear with input power. However, a device eventually saturates after a certain input power, and this introduces harmonics in the output power spectrum.

Linearity in power amplifiers is of serious concern because they can be often made to operate in the non-linear region to deliver a large output power. 1-dB compression and third order intercept points are typically used to measure linearity.

2.2.3.1 1-dB compression

As the name suggests, this is the input power at which the linear gain of the amplifier has compressed by 1 dB. The output referred 1-dB compression point (in dB) would then be given by the sum of the input referred 1-dB point (in dB) and the gain of the amplifier (in dB). This metric is a often used measure of the linear power handling capability of the PA.

Figure 2.10 1-dB Compression characteristics

2.2.3.2 Third-order intercept point

This is a useful metric when comparing RF blocks with different specifications as it is independent of the input power levels. Assuming two interferers very close to the desired frequency, a non-linear output from the amplifier will generate inter-modulation products. The most important of the products is the third order product since it falls directly in the frequency band of interest. This situation is shown in Figure 2.11.

Figure 2.11 Corruption of signal due to nearby interferers

The amplitude of this IM3 product term increases in the order of cube of the fundamental amplitude and can be as significant as the fundamental tone after a certain input power. Figure 2.12 shows a plot of the IM3 product as a function of the input RF level. The third-order intercept point is the extrapolated intersection of this curve and the fundamental power. The input/output referred IP3 can be estimated from this plot.

Figure 2.12 Third-order Intercept calculation

Linearity can often be traded-off with efficiency depending on the class of operation. The choice of high linearity versus efficiency is based on the type of modulation used for transmission. For constant envelope modulation schemes like GMSK, FSK, the amplitude remains constant and the data is modulated using the phase of the carrier signal. Whereas in non-constant envelope modulation schemes like CDMA, the amplitude of the signal also carries some data information and hence it is important to maintain the exact shape of the signal without introducing any distortion through the power amplifier. Extremely linear power amplifiers are required for non-constant envelope modulation techniques, while the linearity can be traded-off for better efficiency in constant envelope modulation schemes.

Alternatively, techniques exist to improve the linearity while maintaining a good efficiency. Examples of such techniques are Doherty Amplifiers, Envelope elimination and restoration, Feed-forward technique, etc.

2.2.4 Efficiency

A measure of how efficiently the supply power is translated to output power is given by the efficiency.

(2.2)

A 100% η implies that the entire supply power is delivered to the load. However, this is practically impossible to achieve. The best way to improve the efficiency is the use of circuit techniques such that both voltage and current waveforms do not exist simultaneously. Switching amplifiers use this approach to achieve efficiencies up to 80%. However, as a trade-off, linearity needs to be compromised for better efficiency.

When comparing PAs with different input power levels, PAE (Power Added Efficiency) is a commonly used metric.

(2.3)

2.2.5 Power control

One of the many power saving schemes, especially in cellular systems, is the use of power control circuitry. When the mobile system is near a base-station, a decision logic at the output of the PA senses that high output power levels are not required and the control circuitry controls the amount of bias/supply to reduce the power levels. The reverse operation is performed when the base-station is at a distance away

η 𝑜𝑤𝑒𝑟 𝑑𝑒𝑙𝑖𝑣𝑒𝑟𝑒𝑑 𝑡𝑜 𝑡ℎ𝑒 𝑙𝑜𝑎𝑑 𝑜𝑤𝑒𝑟 𝑑𝑟𝑎𝑤𝑛 𝑓𝑟𝑜𝑚 𝑡ℎ𝑒 𝑠𝑜𝑢𝑟𝑐𝑒

from the mobile system. The battery life is thus improved, but at the expense of extra circuitry.

Chapter 3

Broad Band Design Techniques

To design a broad band amplifier, many specs other than bandwidth, such like output power, linearity, efficiency, etc., will be compromised in order to expand the operation bandwidth. In this chapter, several broad band design techniques are presented. Each of them has their unique pros and cons, depending on their specific application.

3.1 Previous work on broad band power amplifiers

In broad band power amplifier design, a key element is maintaining a flat gain over the band while also providing a good input VSWR. Commonly this is addressed using the balanced amplifier approach, as illustrated in Figure 3.1, whereby the input is reactively matched for gain sloping (equalization) and quadrature couplers provide a good match when two similar amplifiers are placed between them.

INPUT

OUTPUT

Figure 3.1 A simplified diagram of the balanced amplifier

Another approach often used is the distributed amplifier, as illustrated in Figure 3.2. The distributed amplifier has the advantage of large bandwidth, excellent flatness, and low input VSWR. But it has low gain, low efficiency, and requires a relatively large size.

I N P U T

O U T P U T

Figure 3.2 A simplified diagram of the distributed amplifier

Also used for broad band amplifiers is the feedback amplifier, as illustrated in Figure 3.3. This approach commonly employs negative feedback in a combination of series current and shunt voltage type to provide input match and gain equalization. This approach yields a relatively small size but at microwave frequencies the gain is low and the efficiency is compromised when resistive feedback is used.

OUTPUT

INPUT

Figure 3.3 A simplified diagram of the feedback amplifier

3.2 Compressing Trajectory Dispersion Method [8]

Shunt C and series L disperse a trajectory in smith chart with increasing frequency. In other words when using these matching elements in a low pass network, the higher frequencies will rotate and transform more than the lower frequencies, which spreads the trajectory relative to frequency in a clockwise direction. In Figure 3.4, a two-element low pass network is charted on a Z0 = 25 normalized Smith Chart. The normalized impedance of 25 ohms is calculated from the geometric mean of the system load and source impedance, 50 to 12.5 ohms respectively. The constant Q curve of 1.75 is derived from the resistive ratio of 50/12.5 from the equation

1 Q

²

R

ratio (3.1)

Figure 3.4 Z0=25, Q=1.75; node1-node2 shunt C=6.1pF;

node1-node2 series L=3.8nH; red line marks the trajectory dispersing ranging from 800MHz to 1000MHz

On the other hand, high-pass matching networks consisting of shunt inductors and series capacitors will transform the lower frequencies more than the higher frequencies. In Figure 3.5, a two-element high pass L-network transformation from 50 to 12.5 ohms is demonstrated on a 25-ohm normalized Smith Chart. It is easy to see that the trajectory , ranging from 800MHz to 1000MHz, of lower frequencies dispersing more than the higher ones.

Figure 3.5 Z0=25, Q=1.75; node1-node2 shunt L=5.1nH;

node1-node2 series C=8.2pF; red line marks the trajectory dispersing ranging from 800MHz to 1000MHz

Unlike a low-pass L-network, the higher frequencies are transformed less than the lower frequencies. If the low-pass trajectory of Figure 3.4 were overlaid onto Figure 3.5, the two trajectories would form the letter X. Exploiting this relationship by combining these dispersion

effects can leverage a broad band transformation. A broad band band-pass network is illustrated in Figure 3.6, a 50 (node1) to 3 (node5) ohm transformation. With the Smith Chart normalized to the geometric mean, it is easy to see that low pass nodes 1-2-3 are symmetrical in Q to the high pass nodes 3-4-5. Combining these two networks’ halves folds and compresses the trajectory into a condensed 3-ohm driving point load.

Figure 3.6 50 to 3-ohm transformation; Z₀ = 12.5, Q = 1.75; node1-node2 Shunt C

= 6.10pF; node2-node3 Series L = 3.85 nH; node3-node4 Shunt L = 1.32 nH;

node4-node5 Series C = 32.3 pF.

Compare to the simple two low pass L-network, as depicted in Figure 3.4 and Figure 3.5, the combination of Low-Pass and High-Pass L-Network obviously compresses the trajectory around node5 and thus broadening the bandwidth, shown in Figure 3.6.

3.3 Multiple-Q Method (Chebyshev broad-banding technique)

As a rule in broad band transformations, maintaining a lower Q (quality factor) curve for a given transformation by increasing the number of n-sections will yield a higher bandwidth. However, there is the limitation that using more than a four-section matching network will not yield greater bandwidth. To further extend the bandwidth, one of the effective ways is the multiple-Q method, also called Chebyshev broad-banding technique.

With the complexity of the multiple Q curve network, deriving a design from a Smith Chart alone would not be an intuitive process.

Tables 3.1 and Tables 3.2 were derived by optimization with an ADS simulator utilizing a gradient optimizer.

Table 3.1 Q curves, 2-section network, per transformation ratio. The Q curves are numbered from the outer most Q1 towards the inner Q3.

Table 3.2 Q curves, 3-section network, per resistive transformation ratio. The Q curves are numbered from the outer most Q1 towards the inner Q3.

Q1 Q2 Q3 Trans. Ratio 0.92 0.60 0.65 1.67 1.37 0.90 0.61 5.00 1.53 1.00 0.60 7.14 1.68 1.08 0.58 10.00 1.89 1.21 0.53 16.67 2.06 1.32 0.50 25.00 2.20 1.41 0.49 33.33 2.41 1.52 0.45 50.00 2.57 1.61 0.44 66.67 2.80 1.74 0.41 100.00

As illustrated in Figure 3.7, the transformation is mostly symmetrical with two Q curves, an outer curve (Q1 green) and an inner curve (Q3 magenta). However, node 5 falls at a higher impedance than the 3-ohm target in order to center the fish shaped trajectory at Z = 3 + j0 and so therefore a third Q curve (Q2, cyan) is defined at node 4.

Figure 3.7 Z0 = 12.3, SWR = 1.12 @ ZS = 3; N1-2 Shunt C = 6.9 pF; N2-3 Series L = 4.4 nH; N3-4 Shunt C = 30.4 pF; N4-5 Series L = 0.99 nH.

In Figure 3.8, there is a three-section transformation, the trajectory fits into a 3-ohm 1.01 SWR circle. Three Q curves are adequate for defining the three section network since the trajectory is small and circular in shape, unlike in Figure 3.7, here no impedance offset is needed at node 7.

Figure 3.8 Z0 = 12.2, SWR = 1.01 @ ZS = 3; N1-2 Shunt C = 4.30 pF, N2-3 Series L = 6.22 nH; N3-4 Shunt C = 16.57 pF, N4-5 Series L = 2.42 nH; N5-6 Shunt C = 42.05 pF, N6-7 Series L =0.63 nH.

As mentioned above, Table 3.2 was derived from optimization.

Here Q curves are provided for resistive transformation ratios of 1.67:1 (50 ohms to 30 ohms) to 100:1 (50 ohms to 0.5 ohms).

3.4 Dummy bias technique

This broadband technique is suitable for implementing in the gain block or the PA driver and has shown the excellent gain flatness.

Figure 3.9 Circuit diagram of dummy bias

This technique use smaller RF choke (L) and much larger bias resistor (R), hence causing more power consumption.

3.5 Bridged-T network

To deduce the Bridged-T network, an evolution view of circuit analysis is present. Starting from a simple L type LC low pass filter example shown in Figure 3.10, the 3dB bandwidth is about 1.35GHz.

Figure 3.10 A simple L type LC low pass filter

To extend the 3dB bandwidth, one more inductor is added and formed a T type low pass filter, the 3dB bandwidth extended to about 1.46GHz.

Figure 3.11 A T type LC low pass filter

Based on the T type low pass filter, a capacitor is added between two terminators, after some adjusting, this capacitor significantly increased the 3dB bandwidth. This might be due to the zero included because of the new bridged capacitor.

Figure 3.12 A T type LC low pass filter added a bridged capacitor

The following will describe the use of the bridged-T input matching network that absorbs the FET input capacitance into a simple filter network to provide simultaneous gain flatness, good input return loss [9]. The bridged-T input matching network is a second-order

“all-pass” network shown in Figure 3.13. In Figure 3.14, it shows a simplified linear FET model.

Figure 3.13 The prototype of the bridged-T matching networks

Neglecting Ri, Cds, and taking into account Miller effect, we obtain the further simplified FET model of Figure 3.15, where Cin, is the equivalent input capacitance and RL is the load impedance presented to the FET stage.

Considering the circuit shown from Figure 3.13 to Figure 3.15, this bridged-T is a second-order all-pass network if L = Rs

2Cgs/2, C1=Cgs/4, R=Rs, [9]. When Ri >0 the network no longer is of the standard all-pass form but L, C1 and R can still be chosen such that the generator sees a pure resistive at all frequencies. The design equations for this condition are [10]

R = R

_s

(3.2) L = R/ω

c

(3.3) C1 = 1/2ω

c

R (3.4)

C2 = 2/ω

_c

R (3.5)

Figure 3.14 Simplified FET linear model

Figure 3.15 Further simplified FET model with equivalent input capacitance

Figure 3.15 Further simplified FET model with equivalent input capacitance

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