Experiment Details

3.5.1 Post deposition annealing (PDA) effect on ZrO

MIS capacitors with Ti/HfO2/ZrO2/Si structure was fabricated on (100) oriented p-type silicon wafers which were one side polished and their resistivity was 0.1 to 1 ohm-cm. Fig. 3-5, Fig. 3-6, and Fig.3-7 shows that flowchart of fabrication of MIS capacitors in our experiment.

20 

Prior to the growth of HfO2/ZrO2 stack dielectrics, the native oxide was cleaned by the conventional RCA cleaning and diluted HF etching in sequence for the removal of particles and native oxides. After standard initial RCA clean, a 1nm ZrO2 thin film was grown on Si substrate by Dual E-gun evaporate deposition system. After that, some samples were subjected to post deposition annealing (PDA) treatment in O2 ambient at 500°C for 5 minute, and the others without PDA. Then, a 4nm HfO2 thin film was grown on Si substrate by Dual E-gun evaporate deposition system. After the thin films were deposited, all samples were annealed in O2 ambient for 5 minute at 500°C after deposition (PDA, Post deposition anneal) again.

Finally, all samples were deposited 200nm thick Ti layer defined as shadow mask by E-gun. The active region pad of etch capacitors’area was 1.33×10^-4/cm ².

3.5.2 Plasma treatment on HK stack w/ or w/o ZrO

PDA

MIS capacitors with Ti/HfO2/ZrO2/Si structure was fabricated on (100) oriented p-type silicon wafers which were one side polished and their resistivity was 0.1 to 1 ohm-cm. Fig. 3-8, Fig. 3-9, Fig. 3-10 and Fig. 3-11 shows that flowchart of fabrication of MIS capacitors in our experiment.

Prior to the growth of HfO2/ZrO2 stack dielectrics, the native oxide was cleaned by the conventional RCA cleaning and diluted HF etching in sequence for the removal of particles and native oxides. After standard initial RCA clean, a 1nm ZrO2 thin film was grown on Si substrate by Dual E-gun evaporate deposition system. After that, some samples were subjected to post deposition annealing (PDA) treatment in O2 ambient at 500°C for 5 minute, and the others without PDA. Then, a 4nm HfO2 thin film was grown on Si substrate by Dual E-gun evaporate deposition system. After the thin films were deposited, all samples were annealed in O2 ambient for 5 minute at 500°C after deposition (PDA, Post deposition anneal) again.

The next step was using HDPCVD to add plasma N2 treatment in order to improve the electrical properties of dielectric. The deposition source N2 flow rate was 100 sccm, ICP power was 200 W, bias was 0 W, process pressure was 100 mTorr, and process time was 30 sec and 90 sec, temperature was 300°C. After nitridation, we also annealed these samples to reduce the plasma damage (PNA, Post nitridation anneal).

Finally, all samples were deposited 200nm thick Ti layer defined as shadow mask by E-gun. The active region pad of etch capacitors’area was 1.33×10^-4/cm ² .

3.5.3 Post deposition annealing (PDA) effect on ZrO

after plasma fluorination pretreatment

MIS capacitors with Ti/HfO2/ZrO2/Si structure was fabricated on (100) oriented p-type silicon wafers which were one side polished and their resistivity was 0.1 to 1 ohm-cm. Fig. 3-12, Fig. 3-13, Fig. 3-14, and Fig. 3-15 shows that flowchart of fabrication of MIS capacitors in our experiment.

Prior to the growth of HfO2/ZrO2 stack dielectrics, the native oxide was cleaned by the conventional RCA cleaning and diluted HF etching in sequence for the removal of particles and native oxides. After standard initial RCA clean, wafers are placed into the chamber of PECVD. All samples were prepared in CF4 plasma. The reactive pressure and flow rate of CF4 was 67 Pa and 100 sccm, respectively. The substrate temperature was increased to 300^oC and the RF power was 20 W for CF4 plasma exposure times of 10 seconds.

After CF4 plasma pre-deposition treatment, a 1nm ZrO2 thin film was grown on Si substrate by Dual E-gun evaporate deposition system. After that, some samples were subjected to post deposition annealing (PDA) treatment in O2 ambient at 500°C for 5 minute, and the others without PDA. Then, a 4nm HfO2 thin film was grown on Si substrate by Dual E-gun evaporate deposition system. After the thin films were

22 

deposited, all samples were annealed in O2 ambient for 5 minute at 500°C after deposition (PDA, Post deposition anneal) again.

Finally, all samples were deposited 200nm thick Ti layer defined as shadow mask by E-gun. The active region pad of etch capacitors’area was 1.33×10^-4/cm ².

3.5.4 Plasma treatment on HK stack w/ or w/o ZrO

PDA after plasma fluorination pretreatment

MIS capacitors with Ti/HfO2/ZrO2/Si structure was fabricated on (100) oriented p-type silicon wafers which were one side polished and their resistivity was 0.1 to 1 ohm-cm. Fig. 3-16, Fig. 3-17, Fig. 3-18, Fig. 3-19 and Fig. 3-20 shows that flowchart of fabrication of MIS capacitors in our experiment.

Prior to the growth of HfO2/ZrO2 stack dielectrics, the native oxide was cleaned by the conventional RCA cleaning and diluted HF etching in sequence for the removal of particles and native oxides. After standard initial RCA clean, wafers are placed into the chamber of PECVD. All samples were prepared in CF4 plasma. The reactive pressure and flow rate of CF4 was 67 Pa and 100 sccm, respectively. The substrate temperature was increased to 300^oC and the RF power was 20 W for CF4 plasma exposure times of 10 seconds.

After CF4 plasma pre-deposition treatment, a 10Å ZrO2 thin film was grown on Si substrate by Dual E-gun evaporate deposition system. After that, some samples were subjected to post deposition annealing (PDA) treatment in O2 ambient at 500°C for 5 minute, and the others without PDA. Then, a 40Å HfO2 thin film was grown on Si substrate by Dual E-gun evaporate deposition system. After the thin films were deposited, all samples were annealed in O2 ambient for 5 minute at 500°C after deposition (PDA, Post deposition anneal) again.

The next step was using HDPCVD to add plasma nitridation in order to improve

the electrical properties of dielectric. The plasma treatment conditions were in pure N2, N2O, and NH3 for 60 seconds respectively and the flow rate were 100 sccm. After nitridation, we also annealed these samples to reduce the plasma damage (PNA, Post nitridation anneal).

Finally, all samples were deposited 2000Å thick Ti layer defined as shadow mask by E-gun. The active region pad of etch capacitors’area was 4×10^-4/cm ².