3.1 Introduction
Much of my graduate school time in I-V and noise measurement was to re-build our noise instruments. To do this work is useful for me to know lots of details about the connection in IV and Noise system. I learn the whole concept of the system and have the ability to maintain the noise system work. However, too much time in setting up the system, it let me have not enough time to research all the structure change induce by stress.
That explains why I have no NMOS experiment data.
3.2 Device Structure Description
Fig.5 shows the STI induced stress in the channel width (W) and channel length direction (L). It is easy to know the compressive stress due to SiO2 and Si lattice difference. Many of research [15] have discussed the stress induced mobility change. We can change the value of the channel width (W), channel length (L), gate to STI spacing (A) to control the stress with the reference point available.
3.3 I-V Noise Experimental Setting
The device under test was a PMOSFET fabricated using the concept of process compressive strain, main through the trench isolation. The physical gate oxide thickness was 1.3nm as determined by capacitance voltage fitting. In the channel length direction, we fixed channel length 1um and channel width 10um. By changing the gate to STI spacing A, can give the distinct stresses. On the other hand, in channel width direction, we fixed the channel length as 1um while the channel width spanned a wide range of 0.11,0.24,0.6,1, and 10um. Here a reduction in channel width means an enhancement in compressive strain in the channel width direction. Also we have the TEM picture to check the accurate dimensional in our device.
The IV measurement setting in Vd is -25 mV and -100 mV, that we can use the perturbation of flat-band theory to fit our experimental data, We set the Vg at -1~0V, to make sure our device is working at no breakdown region. The noise spectral set Vd= -50meV, with Vg is -0.3V, -0.4V,-0.5V,-0.6V and -0,7V. The scanning frequency is 1Hz to 1000Hz, The reason for using a smaller frequency is to avoid the thermal noise effect on our PSD which appears above 10KHz.
Chapter4
Experimental Results and Detail Analysis
4.1 Noise Fitting Between (Vg-Vth) and Id/gm
The Number fluctuation with mobility correlation model is according to flat-band theory. Ananda S. Roy and Christian C. Enz [16]
have been discussed the appropriate applicability range in flat-band theory. We need to make the same assumptions that are behind the flat-band perturbation method: a long-channel MOSFET, a pure number fluctuation model, and a constant trap density over the band gap.
However, Chan, et al.’s paper [17] shows their gate to STI spacing effect on stress in noise data. Their device bias on Vd =-0.7V. The fluctuation model is not therefore suitable for their analysis. Their noise data variation is also too big to have the accurate standard deviation.
On the other hand, some research fit the noise data, which can be used to assess the trap density Nt(cm-3eV-1) and scattering factor α (Vs/C) by the method of fitting Svg0.5 and (Vg-Vth).
In the traditional analysis, one often set the id/gm= Vg-Vth .Because
Fig.6 shows the difference between id/gm and Vg-Vth, which means that Vg-Vth is a straight line, and id/gm is a curve. We can put the same data from our ultra-thin gate oxide device to fitting the Svg0.5 by id/gm or Vg-Vth to discuss if mobility variation is important or not. The Fig.7 shows two different fitting results on the same sample. Obviously, id/gm is the correct choice for fitting. The NMOS device has less mobility factor α (Vs/C) influence. So, we can get in accurate but similar result with the Vg-Vth method. On the other hand, it is important for our PMOS device to use the Id/gm method.
1
4.2 Stress Simulation by Sentaurus TCAD Simulation and Mobility-Shift Extract Stress
Usually, there exist two ways to determine the stress in the device.
One is mobility shift approximation method, and the other is TCAD lattice simulation. In this subsection, I will demonstrate the 2D TCAD simulation result in the channel width direction, and compare with other references, the mobility shift approximation method will discussed latter.
First of all, the TCAD stress simulation follows the standard STI fabrication process to realize the device structure. It includes the substrate, pad oxide, nitride deposition, STI lithography mask, STI Etching, annealing, TEOS deposition, and fake STI CMP. Main reasons for the stress origin and the lattice mismatch induced stress. Fig.8 shows the contours of stress across the whole device. We choose the stress under the surface of 2nm, which means actual carrier transport region for our device analysis. Fig.9 demonstrates the stress distribution along the channel width. Also, Fig.10 compares our simulation result with that Shih of etal. [18], compare results can be seen similar. At the same time, by using Fig.11 we can use our simulation to separate the channel stress into the average edge stress and the average flat region stress.
In 2006, Thompson etal. [15] provides the energy level calculation relation between Stress and mobility shift. At the low strain condition, the mobility enhancement is
(4-3)
were
/
is the fractional change in mobility
and
arethe longitudinal and transverse stress, and the and are the longitudinal and transverse piezoresistance coefficients express by Pa-1 respectivelyThe complete summary of the piezoresistance coefficient is shown in Table 1.
/
4.3 TEM Picture
In the narrow device, we have taken the cross-sectional transmission electron microscopy (TEM) (not shown in the thesis) picture of devices in the width. From the TEM results, we can take it as the reference to confirm the precise stress simulation. Unfortunately, TEM results tell us the delta width (DW) does not exist for our device.
In saturation region,
(4-4)
By fixing the channel width length, we can get the correct mobility shift from our experiment in order to extract the inner stress.
2 )^
2
Cox
(Vg Vth L
Id
W
eff 4.4 Channel Length Direction related IV and Noise Experiment
4.4.1 Vth and Mobility Shift
Fig.12 show the Vth shift for different value of gate to STI spacing (A). Fig13 shows the mobility of four devices, using calculated mobility shift by piezo-resistance coefficients. The stress extracted in Table2.
Experiment shows the small spacing A gives the larger stress in our device.
4.4.2 Noise Data Analysis
Fig.14 Fig.15 Fig.16 Fig.17 is the Svg0.5 varies Id/gm line at frequency =25Hz, Spacing A=10um, 2.4um, 0.495um, and 0.21um.
Fig.18 is the fitting line for the trap density Nt (cm-3eV-1) and scattering factor α (Vs/C). Fig.19(a) and 19(b) shows the correspond Nt and α change. Although the stress change is large, and Nt has only slightly increase. The change of scattering factor is also weak.
4.5 Channel Width Direction related IV and Noise Experiment
4.5.1 Vth and Mobility shift
Fig.20 shows the Vth shift in narrow device, revealing that the more narrow width, the less change for Vth. It is well known that inverse narrow channel effect would apply especially in STI device process.
Δ Vth~10meV was typical for edge electric field Increase, Many researches [19] suggest that the edge electrical field is more strong which makes Id current turn on more quickly.
Fig21.a is the mobility of five device (W=10,1,0.6,0.24,0.11um). If we set the x-axis as channel width, y-axis as the mobility in Vg=-0.5V, the mobility shift is very interesting. Fig.21b shows the concave up in case of narrow device, but the prediction of compressive stress effect on narrow device is presented the red line. It seems that the narrow device has different behaviors. The inverse narrow channel effect may be the suitable explanation for this phenomenon.
4.5.2 Noise Data Analysis
We have show in section 4.4 that more compressive stress renders device trap slitly increase. Fig22(a) , 23(a), 24(a), 25(a), 26(a) is the Svg0.5 varies Id/gm line at frequency =25Hz ,for the channel width W=10um , 1um ,0.6um,0.24u,0.11um. Fig.22(b), 23(b), 24(b), 25(b), 26(b) shows the fitting lines for the trap density Nt(cm-3eV-1) and scattering factor α (Vs/C).
Fig.27 (a) and (b) gives us more surprising results, the Nt in narrowest device (W=0.11um) is 1/8 of Nt(W-10um). In our further experiment, it is not reasonable, leading a simple assumption that more stress give more defects Nt. So, we think the narrow device corner has less trap density. It gives the reason why the average Nt is much more degraded in narrow device This structure difference overcomes the compressive stress effect in narrow channel case. Meanwhile, the scattering factor α is in the increasing trend, which can account for the mobility abnormal phenomenon in narrower device.