3.2.1 The structure and gate dielectric of TFTs fabrication
In the Literature Reviews, the fabrication and properties of bottom gate type thin film transistors using IGZO film as active layers will be described. We use the bottom gate structure for TFTs fabrication on N+-type silicon wafer as substrate. When using IGZO thin film as active channel material of TFT, usually adopt bottom gate structure for better quality of semiconductor active layer than top gate structure. Because of the active layer is deposited after gate dielectric layer. It will be avoided the plasma bombarding or thermal treatment damaging active layer when deposited gate dielectric layer. The silicon wafer be used as substrate and gate electrode of the TFTs fabrication, and chose N+-type silicon wafer for lower resistance and bias voltage of gate electrode than N-type silicon wafer.
After RCA clean procedure, we choose three kinds of material for the gate insulator on silicon wafer. We describe it following: First we use silicon dioxide (SiO2) as the gate insulator because it compatible with silicon wafer. The SiO2 deposited by thermal oxidation in furnace setting the temperature at 1050°C with 80 minutes. The thickness of SiO2 is 1350Å , and the slightly thick thickness can avoid the gate leakage current to influence device I-V properties. The other materials are Al2O3 and HfO2 that have higher dielectric constant (k) than silicon dioxide (~3.9).
In order to have the equivalent insulation efficiency, SiO2 dielectric layer should be thicker than high-k materials. Therefore, we replace SiO2 with the high-k materials which are Al2O3 (~9) and HfO2 (~25) and we can
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reduce the driving voltage to achieve the same operating efficiency compared with SiO2-based structures. In addition, Al2O3 and HfO2 have a large band gap (~8.8eV and ~5.68eV) sufficient to yield a positive band offset with respect to IZGO. So we respectively deposited Al2O3 300Å on silicon wafer by Atomic Layer Deposition (ALD) and HfO2 400Å by Metal-organic Chemical Vapor Deposition (MOCVD).
3.2.2 IGZO thin film deposited by APPJ
First, the precursor solution for IGZO film was prepared by dissolving 0.067M of zinc nitrate hexahydrate [Zn(NO3)2·6H2O], 0.067M indium nitrate hydrate [In(NO3)3·xH2O] and 0.067M gallium nitrate hydrate [Ga(NO3)3·xH2O] in distilled water. These precursors were mixed at an atomic ratio of In:Ga:Zn = 1:1:1.
According to our group had been study of APPJ system, we could set a suitable deposition condition including gap distance, substrate temperature, carrier gas flow rate, main gas flow rate, and nozzle speed in APPJ system. When the precursor solution for IGZO was prepared already, the carrier gas carried mists of precursor solution to the plasma region. The carrier gas and mists of precursor solution were mixed with main gas, and these gases would become plasma by arcing mechanism because of high pulsed voltage. Precursor, carrier gas, and main gas would participate with some reactions in plasma region. And then main gas would carry these plasmas to substrate and reduce the plasmas temperature. We could use a computer to control scanning path including starting point and terminal point. The main gas carried plasmas to
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substrate and the IGZO films were deposited by chemical vapor deposition.
Chemical vapor deposition (CVD) is the process of depositing a solid film on the wafer surface through one or more volatile precursors, which react or decompose on the substrate surface to produce the desired deposit. Frequently, volatile by-products are also produced, which are removed by gas flow through the reaction chamber. The sample surface or its vicinity is heated in order to provide additional energy to the system to drive the reactions. The plasma and radicals would cause reactions and nucleation on samples, and then IGZO films would grow from island shape to continuous films.
3.2.3 Annealing
After IGZO thin films deposited on the wafer covered with insulator by APPJ, we put these samples in furnace. Then, these samples were annealed for 30 min at various temperature in the range from 200 to 500°C in oxygen ambiance. We expect that oxygen atoms can diffuse in the films and repair oxygen vacancies which in the IGZO films. If in the transparent TFT fabrication, it will not suit for annealing in oxygen ambiance, because oxygen will influence the electrode and effect device electrical characteristics. So we also anneal for 30 min in nitrogen ambiance at various temperature in the range from 200 to 500°C, because nitrogen is inert gas.
3.2.4 Patterning
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After IGZO deposited, the next step was to define each TFT’s active layer region. This procedure was carried out in lithography area by photo resist spinner and mask aligner. The patterns on mask for defining active layer region, drain electrodes, and source electrodes is shown in figure 3-6. We etched IGZO thin film by 0.5% hydrochloric acid water solution after photo resist had been put cover over IGZO film as a barrier layer for the region which we wanted to reserve.
When IGZO film which we did not want to reserve had been etched completely, the next step was to define drain and source electrodes. At the first, we though the procedures of defining drain and source electrodes were depositing aluminum and etching it by lithography and wet etching. But the active layer was under drain and source electrodes. It is difficult to choose suitable acid solution which kept good etching cover over IGZO region which we did not want aluminum deposited. And then we used E-Gun evaporation to deposit aluminum about 1000Å on silicon wafer. At last, we set silicon wafer in acetone with ultrasonic shaking to lift off aluminum on the photo resist. Then, a part of aluminum would stay on active layer as drain and source electrodes. And the device
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as shown in figure 3-8 would be measured electrical properties and the results would be discussed in next chapter.