1. The whole AFEA circuit will be integrated into the implantable epilepsy detection and stimulation system and it will be test in vivo. The SOC will be packaged in a special case passing FDA inspection.
2. For long time monitoring biopotential signal, fast settle is necessary. Therefore, a clock generator should be designed on chip to generate the “fast settle” signal.
3. The proposed pre-amplifier has an advantage of their NEF performance due to decline of noise. However, the rear end circuit might dominate the noise source. For more thorough and complete front-end circuit design, we should diminish the noise and power consumption of analog multiplexer and PGA circuit.
4. To reduce power dissipation, we might add power gating at bias circuit of chopper stabilized pre-amplifier. Let the 8 channel pre-amplifiers will NOT consume static power at the same time.
5. Although the analog MUX and PGA are shared by eight channels pre-amplifier, overall power is still too large. Therefore, the power of the shared part should be more optimized.
6. Considering external disturbance, using pseudoresistor to generate high pass corner frequency might be NOT the best choice. However, current mode circuit may be another choice for addressing the issue.
5. Finally, a full understanding of neural recording system and a more careful consideration are essential to design and implement a front-end circuit for these applications. There is still large improvement available in this design.
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VITA
姓 名：蔡宗昀 學 歷：
臺北市立成功高級中學 (86 年 9 月~89 年 6 月) 國立交通大學土木工程學系 (89 年 9 月~93 年 6 月)
國立交通大學電子研究所碩士班 (96 年 6 月~99 年 12 月) 研究所修習課程：
類比積體電路 吳介琮教授
數位積體電路 周世傑教授
計算機組織輔助設計特論 周景揚教授
穩健品質及工程設計 黎正中教授
功率積體電路設計 陳科宏教授
前瞻類比積體電路設計 洪浩喬教授
鎖相迴路設計與應用 陳巍仁教授
生醫系統設計導論 林俐如講師
英文報告技巧 Steve Wallace
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