Integrated Circuit (IC) industry is mainly composed of IC design, IC fabrication, IC packing and IC testing and is illustrated in Figure 1. Over the last few years, Taiwanese IC industry has become widely renowned as industry benchmark due to the complete supply chain and vertical separation (IEK, 2009). IC fabrication, IC packing and IC testing industries in Taiwan have been ranked as number one and IC design industry has been ranked as number two in the world. IC industry is the essential lifeblood of Taiwan economy (Jiang and Chen, 2008). Taiwanese IC industry is a representative of global high technology industry so its relative topics are worthy to study (Kozmetsky and Yue, 1998). Moreover, there are many different industrial characteristics among these sub-IC industries. For example, the capital expenditure and techniques for IC packaging and testing industry compared to ID fabrication are low. The research and development expenditure and patents for IC packaging and testing industry compared to ID design are less too. These different industrial characteristics result in the tendency towards specialization, i.e., most firms of Taiwanese IC industry only specialize in one field of IC industry. So many researches study these sub-IC industries respectively and then offer the different managerial strategies independently. In recent years, many researchers have studied the performance evaluation of Taiwanese IC design firms and IC fabrication firms. The related research of Taiwanese IC packing and testing industry is less relatively. Seeing the entry barriers of IC packaging and testing industry compared to IC design and IC fabrication are low and more potential competitors in the highly competitive market, the performance evaluation of Taiwanese IC packing and testing industry is a noteworthy subject.
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The global capacity of IC packaging and testing industry are provided by both Integrated Device Manufacturers (IDMs) and Semiconductor Assembly and Test Services (SATSs).
IEK (2009) predicted that the output value of SATSs will exceed IDMs after 2012 so SATS will become the protagonist in the global IC packaging and testing market. Taiwanese IC packing industry and testing industry are included in SATS and have contributed more than 44% and 60% respectively of global market shares since 2006 as shown in Table 1.
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Although now some IDMs do not utilize the outsourcing of IC packaging and testing and still operate IC backend process by themselves, the annual growth rate of SATSs output
value from 2007 to 2012 will be estimated to be 14.1%, higher than -1.06% of IDMs as illustrated in Figure 2 (IEK, 2009). Forecasting the further development depend on the current situation, the output value of Taiwanese IC packing and testing industry will continue to grow up in the global IC packaging and testing market.
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Taiwanese IC packing and testing industry has been able to contribute to the global semiconductor supply chain because of the following reasons. Firstly, electronic products diversified by IC design firms results in Taiwanese IC packing and testing industry develops the great ability of specialization and customization (IEK, 2009). Taiwanese IC packing and testing companies have involved in research and development of advanced IC packaging and testing technology actively. The product lines of Taiwanese IC packing and testing companies are sufficient to fulfill the requirement of IDMs or IC design companies.
Besides, under the complete supply chain and vertical separation of Taiwan semiconductor industry, IC foundries and IC packaging and testing companies have become several strategic alliances to provide more complete and advanced techniques in response to the increasingly technology needs of IC design firms and IDMs (IEK, 2009; Wu and Chien, 2008). So chip makers can focus on core competence of IC design and utilize the outsourcing of IC packaging and testing to reduce operational costs, enhance capital-effectiveness of investments, and diversify the risks among the vendors (Wu and Chien, 2008).
For the collaborative firms in a global supply chain membership, performance management and resource utilization are always the most important concerns (Jiang and Chen, 2008). An objective and impartial performance evaluation can lead to a good performance management. Data Envelopment Analysis (DEA) has been proven effectively in performance evaluation when multiple performance measures are present and has been widely used to measure the efficiency of peer decision making units (DMUs) (Zhu, 2000).
DEA is a convenient method for the firms of IC industry to find out their inefficiency and benchmark in the highly competitive market. The ultimate purposes of DEA are offering useful managerial strategies and implicating best resource utilization.
DEA has been employed in the performance evaluation literatures of Taiwanese IC packing and testing industry. Liu and Wang (2008) thought among these 15 firms in Taiwan, atop firms may have huge influence on their own country, or even, global market. A firm will
be aware of what kind of weaknesses they should watch out for and remedy. Hung and Lu (2008) thought the overall technical inefficiencies of Taiwanese IC packing and testing firms were due primarily to the pure technical inefficiencies rather than the scale inefficiencies.
Taiwanese IC packing and testing firms resolved the scale problem by consolidating with other smaller units to achieve an optimal size. However, traditional efficiency models, such as DEA, can only measure the efficiency of one specific stage when a two-stage production process is present (Chen and Zhu, 2004).
Several DEA researches have studied on two-stage processes of late. For instance, Seiford and Zhu (1999) developed a DEA approach for evaluating US commercial banks in a two-stage process characterized by profitability and marketability. In the study, profitability is measured using labor and assets as inputs and the outputs are profits and revenue. In the second stage for marketability, the profits and revenue are then used as inputs, while market value, returns and earnings per share are used as outputs. Seiford and Zhu (1999) applied the standard DEA approach to each stage, but did not address potential conflicts between the two stages arising from the intermediate measures. For instance, the second stage may have to reduce its inputs (intermediate measures) in order to achieve an efficient status. Such an action would, however, imply a reduction in the first stage outputs, thereby reducing the efficiency of the first stage.
Some DEA studies have been developed to undertake the solution of conflict. Those prior two-stage DEA approaches may infer that two inefficient stages lead to an overall efficient DMU with the inputs of the first stage and outputs of the second stage (Zhu, 2003;
Chen and Zhu, 2004). Based upon the variable returns to scale DEA model (Banker et al., 1984), Chen and Zhu (2004) developed a linear DEA model where each stage’s efficiency is defined on its own production possibility set. The two production possibility sets are linked with the intermediate measures which are set as decision variables for each DMU under evaluation. Chen and Zhu’s (2004) model guarantees an overall efficient two-stage process when each stage is efficient. For inefficient DMUs, Chen and Zhu (2004) model provided a DEA projection with a set of optimal intermediate measures.
Kao and Hwang (KH model) (2008) modified the standard DEA model to develop a different approach where the entire two-stage process can be decomposed into the product of the efficiencies of the two sub-processes. Hence both the overall efficiency and each stage’s efficiency are obtained. Such an efficient decomposition is not available in the standard DEA approach of Seiford and Zhu (1999) and the two-stage DEA approach of Chen and Zhu
(2004). Chen et al. (2009) studied the relationship between the approaches of Chen and Zhu (2004) and KH model. The approach of KH model is developed under the assumption of constant returns to scale in the multiplier CCR DEA model of Charnes et al. (1978). Chen et al. (2009) showed that the CCR version of the Chen and Zhu (2004) model can be equivalent to KH model. The two-stage process has a unique feature that the first stage’s outputs are the only inputs to the second stage. Consequently, improvement to the DEA frontier could be distorted, i.e., the performance improvement of one stage affects the efficiency status of the other, because of the presence of intermediate measures (Chen et al., 2009).
Chen et al. (2010) (CCZ model) show that the overall efficiency scores resulting from Kao and Hwang (2008) are not direct indicators of potential input reductions or output increases not realized by the inefficient DMUs, e.g. how much more output each DMU can produce given its present inputs, or how much each DMU could reduce its input-use while still producing the same output. In other words, the resulting DEA scores do not provide complete information on how to project inefficient DMUs onto the DEA frontier for a specific two-stage process. Although we know the efficiency scores, we still do not know where the DEA frontier is. Chen et al. (2010) applied the approach for determining the frontier points for inefficient DMUs within the framework of two-stage DEA.
Many prior researches treat revenue or patents as the final output of a company.
However, revenue or patents are just the outputs of the first stage whose main purpose is profit generation and can not present the value of a company. Every company should take maximizing ROE and market values into account as the ultimate goal. Because most managers think that return on equity (ROE) can present the current value of a company and market value presents the future expected value of a company. Moreover, many managers have the misconception to think that increasing income can enhance ROE and market values directly. Increasing revenue without judgment might incur an exactly opposite effect. For example, a firm takes the action of price reduction in order to gain more customers and revenue. However, the action might result in the firms earn less profit than before, which further impacts on ROE and market values. Furthermore, although the patents can create income or present the technical capability of a company, overmuch patent can not promise the increase of ROE and market values. A firm might spend huge costs to apply or maintain patents. This shows that the assumption of “more is better” is not appropriate for the revenue and patents. How to look for the optimal intermediate measures, like revenue and
patents, should be accepted as a new strategy for inefficient DMUs. Hence, CCZ model of the two-stage DEA could be used to provide the solution to find out the optimal intermediate measures.
This study applies the model proposed by Chen et al. (2010) to evaluate the technical efficiency and get the optimal intermediate measures simultaneously. There is no paper to provide such instructions currently. This paper uses the output-oriented models of CCZ model to adjust the intermediate measures given its present inputs in two-stage processes, which can help every firm in the same industry to get its own optimal intermediate measures and then project onto the efficiency frontier. Due to the intermediate measures plays an important role in the performance evaluation, the adjusted percentage and tendency of the intermediate measures are the major research subjects in this paper, which can offer useful managerial implications for Taiwanese IC packing and testing industry.
The structure of this study is as follows: Section II provides the empirical specification and Section III consists of the data source, input and output variables, empirical results and discussion. Section IV concludes this paper.