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Chapter 2 Basic Theory about Photodetector

2.6 Detectivity

The specific detectivity D* is used to characterize performance of a photodetector. A more-sensitive detector has a larger detectivity than a less-sensitive detector. The definition of D* is

D* =

where e is the electronic charge, ηis the quantum efficiency, h is Planck’s constant, νis the frequency of the radiation, Ro is the dynamic resistance at zero bias, A is the detector area, k is Boltzman’s constant, and T is the absolute temperature [6].

The advantage of D* as a figure of merit is that it is normalized to an active detector area of 1cm2and noise bandwidth of 1Hz. Therefore, D* may be used to compared directly the merit of detectors of different size whose performance was measured using different bandwidths.

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2.7 C-V measurement

Capacitance-Voltage (C-V) Measurement is one of the very basic measurements that can be done to characterize semiconductor devices. What is normally done is the device is hooked up to the instrument and C-V graphs are plotted and with that data we can conclude the type of device, whether it’s a p-type or an n-type device and many other parameters. The main aim of the C-V measurement is to extract the doping information of the diode.

The capacitance of a device is defined as

dV

C= dQ (2.15)

where dQ is the magnitude of the differential charge in charge on one plate as a function of the differential charge in voltage dV across the capacitor. For a MOS capacitor ,there are three operating conditions: accumulation, depletion, and inversion.

Fig. 2.5 (a) shows the energy-band diagram of an MOS capacitor with a p-type substrate for the case when a negative voltage is applied to the gate. A small differential change in voltage across the MOS structure will cause a differential charge in charge on the metal gate and also in the hole accumulation charge, as shown in Fig 2.5 (b), the capacitance C per unit area of the MOS capacitor for this accumulation mode just the oxide capacitance

ox ox ox

acc C t

C ε

=

= (2.16)

17

where Cox is the oxide capacitance per unit area ,and εox ,t are the permittivity ox and thickness of oxide, respectivity.

Fig. 2.5 (a) Energy-band diagram through an MOS capacitor for the accumulation mode. (b) Differential charge distribution at accumulation for a differential change in gate voltage.

In inversion condition, a positive voltage is applied to the gate, inducing a space charge region in the semiconductor. In the limit of very high frequency, the inversion layer charge will not respond to a differential charge in capacitor voltage. Fig 2.6(a) shows the energy-band diagram of the MOS device for this condition. Fig 2.6(b) illustrate the charge distribution through the device. A small differential change in voltage across the capacitor will cause a differential change in the space charge width.

The total capacitance of the serious combination is

s

Where Cs is the capacitance of semiconductor in the space charge width, and Cinv

is the total capacitance in inversion condition.

|dQ|

|dQ|

EF

EFi

18

Fig 2.6 (a) Energy-band diagram through an MOS capacitor for the inversion mode.(b) Differential charge distribution at inversion for a differential change in gate voltage.(high frequency)

The flat-band voltage is defined as the applied gate voltage such that there is no band bending in the semiconductor. It was given by

VFB =

Where Qss is the equivalent fixed oxide charge and φms is the metal-semiconductor work function difference. The flat-band voltage shift to more negative voltages for a positive fixed oxide change.Since the oxide charge is not a function of gate voltage, the curves show a parallel shift with oxide charge, and the shipe of the C-V curves remains the same as the ideal characteristics.

The C-V characteristics can be used to determine the equivalent fixed oxide charge. Using the equation given in Ref. 7, for a given MOS structure, Cox are given ,

∆VFB can be determined.

19

Where ε is the permittivities [7]. In the case of multilevel charge storage,

(2.21)

Where tn is the upper control gate oxide thickness, tdot is the nanocrystal diameter, and εox and εsi are the permittivities of the oxide and silicon, respectively[7].

2.8 Reference

1. Donald A. Neamen, Semiconductor Physics & Devices, third Edition.

2. S.M. Sze, Physics of semiconductor devices. New York: John Wiley & Sons 1981.

3. David Wood, “Optoelectronic Semiconductor Devices”, (Prentice Hall, New York, 1994).

4. M. Razeghi and A. Rogalski, J. Appl. Phys. 79, 7433 (1996).

5. Bahaa E. A. Saleh and Malvin Carl Teich, ”Fundamentals of Photonics”, ( Wiley - Interscience Publication, New Yok, 1991).

6. C. K. Wang, T. K. Ko, C. S. Chang, S. J. Chang, Y. K. Su, T. C. Wen, C. H. Kuo, and Y. Z. Chiou, IEEE Photon. Technol. Lett. 17, 2161 (2005).

7. T. Z. Lu,a M. Alexe, R. Scholz, V. Talelaev, and M. Zacharias, APL .87, 202110 (2005)

20

Chapter 3 Experimental Details

3.1 Process

3.1.1 Preparation of mesoporous silica template

The mesoporous silica (MS) films [1] are initially spin-coated on silicon wafers using sol-gel-prepared precursors that contain different organic templates (cetyltrimethylammonium bromide (CTAB), polyoxyethylene cetyl ether (Brij-56), and Triblock copolymer Pluronic P-123 (P123)) for controlling the pore-size , followed by drying at 40°C and baking at 110°C for five and three hours respectively . The MS film was formed by molecular self-assembly aggregation in this step. The film was employed as nanotemplate for the growth of three-dimensional array of Si (Ge) nanocrystals (nc).

The flowchart of mesoporous silica nanotemplate films preparing is shown in Fig. 3.1.

The sol-gel was made by mixing H

2O, HCl , tetraethylorthosilicate (TEOS), and ethanol at 70℃ for 90 min. The molar ratios of reactants were 1:0.008-0.03:3.5-5:0.003-0.03:10-34(TEOS/(P123,CTAB,Brij-56)/H

2O/HCl/ethanol).

After aged at room temperature fore more than 3hours, it was spin-coated onto silicon substrates at 2200 rpm for 30 seconds.

21

Fig. 3.1 Flowchart of sol-gel procedure for preparing mesoporous silica nanotemplate films.

Aging for 3-6 hours, RT

Spin coating on Si Wafer

Drying at 40

o

C and baking at 110

o

C (Self-assembly aggregation )

Addition of triblock copolymer template

MS template preparing flowchart Precursor sol : P123/H2o/HCl

70℃, 90 min

Aging for 3-6 hours, RT

Spin coating on Si Wafer

Drying at 40

o

C and baking at 110

o

C (Self-assembly aggregation )

Addition of triblock copolymer template

MS template preparing flowchart Precursor sol : P123/H2o/HCl

70℃, 90 min

22

3.1.2 The growth of 3-D Si (and Ge ) nanocrystals by HDP-CVD

Inductivity coupled plasma-chemical vapor deposition (ICPCVD) [2,3] of thin films is widely used in microelectronic circuit manufacturing. Materials deposited include conductors such as tungsten, copper, aluminum, transition-metal silicides, and semiconductors such as gallium arsenide, epitaxial and polycrystalline silicon, and dielectrics such as silicon oxide, silicon nitride, and silicon oxynitride. High-Density Plasma Chemical Vapor Deposition (HDPCVD) with the features of low process temperature, low pressure and high plasma density was chosen to growth Nc-Si (or nc-Ge) in the MS tempelate.

Base pressure of chamber was as low as 10

-6

Torr. Mixture plasma at 500W was powered on after loading MS-coated wafers into the chamber. During the entire process, pressure was kept below 10m torr and the substrate temperature was hold at 400℃. MS films embedded with high density silicon (or germanium) nanocrystals were prepared by using 12 – 18 cycles of pulsed SiH

4+H

There are numerous reactions involved in the formation of nc-Si (or nc-Ge) in the MS template with ICPCVD . Firstly, the pure-H

2-ICP-plasma (step A of Fig. 3.2) removes organic-templates of MS matrices lightly for enabling limited nucleation sites of Si-OH on pure-surfaces [4]. This is a self-limiting reaction (SLR), which is a core concept in atomic layer deposition [5]. Sequentially, ICP-dissolved SiH

x (GeH

x) species (step B of Fig. 3.2) in the form of nanoclusters diffuse into the nanopores, and are then absorbed and embedded in the residual organic-template of MS. They eventually react with the nucleation sites through hydrogen-elimination reaction (HER). Therefore, both

23

self-limiting reaction [5] and hydrogen-elimination reaction (HER) [4,5] govern the conversion of ICP-dissolved species in MS into nc-Si (or nc-Ge). The density of nc-Si (or nc-Ge) grown by pulsed plasma can as high as 2.5x10

18

/cm

3

.

Fig. 3.2 Schematic mechanism of 3D Si nanodots formed by pulse ICP process.

SiO2

Si

24

3.1.3 Device fabrication

The device structure is depicted schematically in Fig. 1.First, a 220-nm-thick MS template layer is formed on Si substrates. Si nanocrystals were thereafter synthesized in the MS templates by using a plasma deposition process.12 For device applications, the organic contents of MS are removed by calcinations in the same chamber with H

2 plasma at the flow rate of 150 sccm for 2 hours. The indium–tin–oxide (ITO) films of 2400A

o

thick were deposited onto the samples by E-gun evaporation, followed by 20 min of annealing at 400℃ in N

2 ambient.

Fig. 3.3 A schematic drawing illustrating the configuration of the photodiodes of ITO/nc-Si embedded MS /p-Si.

Calcined (Remove organic contents) H2plasma, flow rate: 200 sccm, 2hours,450℃

E-gun evaporation : ITO film 240nm

P type Si substrate ITO

nc-Si embedded in MS 220nm

p- Si substrate

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3.2 Experiment Setup

3.2.1 The Capacitance-Voltage measurement system

The system we used to measure the low ferquence capacitance is Bias Temperature Stress measurement system (BTS): Keithley 590 CV analyzer 、Keithley 595 Quasistatic CV meter、Keithley 230 programmable voltage source、Keithley 5951 remote input coupler and computer with AIT software installed. Fig 3.4 shows the schematic diagram of C-V measurement system.

Fig. 3.4 The schematic diagram of C-V measurement system.

Shielding Box

Probe Station

Probe Probe

Microscop

Keithley 230 programmabl

e voltage

Keithley 595 Quasistatic

CV meter

Keithley 5951 remote input coupler Keithley 590 CV analyzer

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3.2.2 Spectral responsivity measurement system

The setup of spectral responsivity measurement system as showed in Fig. 3.5.

Spectral responsivity measurements were achieved using a 300 W xenon lamp with wavelength selection using a double-grating monochoramator ( Jobin-Yvon Gemini 180).

Lamp focuses on the sample through 2 focal lens which focal length is five centimeter.

The spot size is about 3x4 mm2 after focusing and the power is 0.1~0.7 mW on the surface of the sample. The measurements of current-voltage characteristics were controlled by the Labview programs. A Keithley 2400 source measurement unit was used to apply biases to the electrodes., Bias-dependent responsivity was measured in dc mode by recording current–voltage (I –V) curves under a fixed wavelength and power. The power density of the excitation was determined with a calibrated UV Si photodetector.

Fig. 3.5 Diagram of spectral responsivity measurement system.

Keithley 2400 Computer

Monochoramat Xe

lamp

XYZ Stage

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3.3 References

1. D. Zhao, P. Ya ng, N. Melosh, J. Feng, B. F. Chmelka, and G. D. Stucky, Adv. Mater.

10, 1380 (1998).

2. J. M. Shieh, K. C. Tsai, and B. T. Dai, Appl. Phys. Lett. 81, 1294 (2002).

3. J. H. Wu, J. M. Shieh, B. T. Dai, and Y. S. Wu, Electrochemical and Solid-State Letters 7 (6), G128 (2004).

4.

ö

. Dag, G. A. Ozin, H. Yang, C. Reber, and G. Bussie`re, Adv. Mater. 11, 474 (1999).

5. Y. J. Lee, and S. W. Kang, Electrochemical and Solid-State Letters, 6 (5), C70 (2003).

28

Chapter 4 Results and Discussions

4.1 TEM Image

The experiment was started with the formation of a 220-nm-thick MS template layer on p-type silicon substrates. Si or Ge nanocrystals were thereafter synthesized in the MS templates by using a plasma technique [1]. Fig. 4.1 is the cross-sectional transmission electron microscopy (TEM) image for the sample. One can see that the MS film was decorated with ~1018 cm-3 of Si nanocrystals, and the mean size of nc-Si was found to be 4 nm.

Fig. 4.1 The cross-sectional TEM images of the mesoporous silica (MS) films with high density silicon nanocrystals.

20nm

29

4.2 C-V Measurement

For C-V measurement, a compound oxide with structure of SiO2/MS with Si (Ge) QD imbedded/SiO2 was formed on p-type Si wafer. The tapping oxide and tunneling oxide with thickness of 10nm and 5nm were deposited by HDPCVD, with gas flow of SiH4:N2O=1:15 sccm and process temperature of 3750C. After that, the top and back contact layers of Aluminum were plated by thermal coater. Fig 4.2 (a) illustrates the device structure, and (b) is the image of device.

Fig. 4.2 (a) A schematic drawing illustrate the configuration of the device with compound oxide. (b) The image shows device with Al contact layer.

SiO

2

20nm

SiO

2

3nm

Si (Ge) QD imbedded MS 220nm

Al

P-type Si (sub) Al

Al

30

To investigate the trapping characteristics of the structure we performed multiple up-down capacitance voltage (C-V) sweeps between inversion and accumulation regions. The measurements were performed at 1MHz using BTS C-V measurement system at room temperature. Fig 4.3(a) and (b) illustrate the characteristic multilevel charge storage for our metal-oxide-semiconductor (MOS) structures. The C-V hysteresis was observed, which is caused by the successive charge trapping and de-trapping processes in the Si (Ge) NCs. With sweeping range of 20V, the hysteresis widths of Si and Ge doped sample can be as large as 16 and 12 V, respectively.

Fig. 4.3 High frequency C-V characteristics of the sample (a) with Si QD and (b) Ge QD imbedded in MS.

As can be seen in Fig 4.4, a different programming bias applied at the gate results in a various C-V hysteresis widths. Hence, the narrowest C-V loop corresponds to the charging of only one layer and the widest one to the charging of more layers of QDs imbedded in MS. The sweep is from the inversion to the accumulation region for the MOS devices based on p-type substrates. For negative program bias, more and more holes are trapped in the QDs which are evident by the counterclockwise

-15 -10 -5 0 5 10 15 20

31

hysteresis. After each sweep, holes charged in the QDs were always erased by positive bias to bring the device back to the neutral stage.

Fig 4.4 shows characteristic of multilevel charge storage, the steps in the flat-band shift, was caused by the charging of the numerous layers of nc-Ge.

Fig 4.4 The dependence of the memory window, i.e., the flatband shift on programming voltage. There are multilevel charge storages in mesoporous silica matrix with Ge nanocrystals.

We calculated the flatband voltage using the equation (2.21)[2]. Set ∆VFB

equal to 12 V, the diameter of nc-Ge to 4nm. There would be 6 layers of nc-Ge distributed in the oxide layer, and the density of nc-Ge per layer would be 9.4x1012 cm-2 (~1018 cm-3 per unit volume), very close to the value we got from TEM image.

The shift of flatband voltage caused by charging of numerous layers of nc-Ge layers (using equation (2.21)) coincided with the multilevel charge storage character shown in Fig 4.4.

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4.3 I-V characteristics of the photodetector

For light detection, a 220-nm-thick MS template layer is formed on p-type Si substrates. Si nanocrystals were thereafter synthesized in the MS templates by using a plasma deposition process. For applying bias, a back Al contact layer and a top (transparent) indium-tin-oxide (ITO) electrode of 2x2.5 mm2 are formed on samples to conduct (collect) an external bias (photocurrent) and to allow light transmission. A schematic structure of the photodetector is shown in Fig 4.5

Fig 4.6 shows current-voltage (I-V) characteristics of this ITO/nc-Si (nc-Ge) embedded MS/p-Si device without illumination. A rectifying ratio of 87 was measured at ±3 V. In the range of low forward bias from 0 to 1 V, the I-V characteristic was fitted fairly using the equation given in Ref. 3 and presented in Fig.

4.6 by series connection of a diode (ideality factor 20 (14) for nc-Si(Ge) embedded photodetector). Over this range, a bias dependence current (~V2.03and V1.78 for Si and Ge) was obtained, indicating that space-charge-limited current dominates I-V characteristics.[4]

Very different I-V characteristics were observed at reverse bias. As shown in Fig. 4.6, for the bias >1.1 V, the originally very low reverse current (hereafter referred to as the dark current) increased drastically when the device was illuminated with light in the wavelength range of 340–1000 nm (only several typical curves are depicted here). The increase of photocurrent exhibited a linear dependence with increase of voltage at lower reverse bias until the current saturated to a value IS at higher bias.

33

Fig 4.5 A schematic drawing illustrating the structure of the photodetector MS/ p-Si

Fig 4.6 Current-voltage characteristics of (a) ITO/nc-Si-embedded MS/p-Si and (b) ITO/nc-Ge-embedded MS/p-Si devices under dark and under illumination at wavelength from 340 to 1000 nm.

34

4.4 Results of Spectral response

Fig. 4.7 summarizes the measured photoresponse over a wide range of incident light wavelengths for the ITO/nc-Si(Ge) embedded MS/p-Si MOS detectors at bias voltages of +8 V, together with a reference curve obtained for the same device structure but without nc doped, namely, ITO/MS/p-Si diodes. The photoresponse values plotted in the figure were calculated after subtracting the dark current at the corresponding bias. To compare with the effect of intrinsic absorption, typical spectral response for Si and Ge detectors were also shown [10]. Biased at +8 V, the photoresponse of an ITO/MS/p-Si structure increased essentially linearly with wavelength from 340 to 1000 nm by three times. The responsivity character of both nc-Si and nc-Ge distributed device were essentially the same. For the nc-Si doped sample, the responsivity were as high as 0.36, 0.7 and 0.9 A/W at 430, 560 and 790 nm, respectively. And for the nc-Ge doped sample, the responsivity were 0.3, 0.72 and 1 A/W at 420, 640 and 800 nm, respectively. The illumination intensity dependence of photocurrent in the device without nc-Si or nc-Ge distributed ( ITO/MS/ p-Si ) was relatively small. As shown in Fig.4.7, the responsivity over the measured region (340~1000nm) was smaller than tenth of nc-Si (Ge) distributed device.

For convenience, a guideline was plotted in Fig. 4.7, representing the quantum efficiency value of 100%. We measured conversion efficiency values of more than 100% over the wavelength range of 530 to 970 nm, and as high as 138% (153%) at 800 nm for the ITO/nc-Si (Ge)-embedded MS/ p-Si detector. Therefore, there must be an amplification mechanism to enhance the measured photoresponse at reverse bias.

Furthermore, low dark currents with high dynamic resistance of 19.2 MΩ and high photoresponse yield high detectivity of 7.2x1012 cm Hz0.5W−1 for the present detector.[6]

35

Fig 4.7 Spectral dependence of the photoresponse of detectors with ITO/nc-Si-embedded MS/ p-Si, ITO/nc-Si-embedded MS/ p-Si, ITO/MS/p-Si structures and typical spectral response for Silicon and Germanium. A guideline was plotted representing the quantum efficiency value of 100%.

300 450 600 750 900 1050 0.0

0.2 0.4 0.6 0.8 1.0 1.2

nc-Ge

Si

undoped η =100%

Ge nc-Si

R e s p o n siv ity (A /W )

Wavelength (nm)

36

4.5 Amplified current caused by barrier lowing of transistor 4.5.1 Bipolar junction transistor

We can gain a basic understanding of the operation of the transistor and the relations between the various and voltages by considering simplified analysis. The minority carrier concentrations are shown in Fig.4.8 for an npn bipolar transistor biased on the forward active mode. The electrons diffuse across the base are swept into the collector by the electric field in the B-C space charge region. Assuming the ideal linear electron distribution in the base, the collector current can be written as a diffusion current given by The collector current controlled by the base-emitter voltage; that is, the current amplify from barrier lowing of a BJT was caused by applied bias.

FIG. 4.8 (a) Biasing and carrier distribution of an npn BJT in the forward-active mode. (b) The principle of operation of the phototransistor. The primary photocurrent acts as a base current and give a large photocurrent in the emitter-collector circuit.

37

4.5.2 Phototransistor

The phototransistor [7] is a bipolar junction transistor (BJT) that operates as a photodetector with a photocurrent gain. The basic principle is illustrated in Fig.4.8.(b) In an ideal device, only the depletions, or the space charge layers (SCL),contain an electric field. The base is terminally open and there is a voltage applied between the collector and emitter terminals just as in the normal operation of a common emitter BJT. An incident photon is absorbed in the SCL between the base and collector to generate an electron hole pair (EHP). The field E in the SCL separates the electron hole pair and drifts them in opposite direction. This is the primary photocurrent.

When the drifting electron reaches the collector, it becomes collected (and thereby neutralized)by the battery. On the other hand, when the hole enters the neutral base region, it can only be neutralized by injecting a large number of electrons from the emitter into the base. These electrons diffuse across the base and reach the collector and thereby constitute an amplified phptocurrent.

Alternatively, one can argue that the photogeneration of EHPs in the collector SCL decrease the resistance of this region which decreases the voltage VBC across the base-collector junction. Consequently the base-emitter voltage VBE must increase inasmuch as VBE +VBC=VBC (Fig.4.8.(b)). This increase in VBE act as if it were a forward bias across the base-emitter junction and injects electrons into the base due to the transistor action, that is the emitter current

) / exp(eV kT

IEBE

The current amplify from barrier lowing was caused by the incident photon in the space charge region.

38

4.5.3 Transistor-like mechanism

Based on the experimental evidence, we propose the following mechanism to explain why the detector efficiency could be more than 100% through this two-terminal detector with a nc-Si (or Ge )-embedded MS layer as the absorption medium. This is illustrated in Fig. 4.9.(a) Before illumination, the device operates like a normal MOS capacitor, i.e., a significant number of electrons are accumulated at the MS-Si interface forming a n-type inversion layer if a large enough reverse bias is applied. Only a few carriers could flow over the MS barrier layer, leading to a considerably low dark current. As seen in Fig. 4.9. (b), upon optical excitation, strong absorption occurs for incident photons with the energies matching the transition energies from the ground hole states (Eh0) to the ground electron states (Ee0) (the gap

Based on the experimental evidence, we propose the following mechanism to explain why the detector efficiency could be more than 100% through this two-terminal detector with a nc-Si (or Ge )-embedded MS layer as the absorption medium. This is illustrated in Fig. 4.9.(a) Before illumination, the device operates like a normal MOS capacitor, i.e., a significant number of electrons are accumulated at the MS-Si interface forming a n-type inversion layer if a large enough reverse bias is applied. Only a few carriers could flow over the MS barrier layer, leading to a considerably low dark current. As seen in Fig. 4.9. (b), upon optical excitation, strong absorption occurs for incident photons with the energies matching the transition energies from the ground hole states (Eh0) to the ground electron states (Ee0) (the gap

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