CHAPTER 4 SIMLATION AND MEASUREMENT
4.3 Measurement
Using Agilent E4440A Spectrum Analyzer & Agilent E5052A Signal Source Analyzer (SSA)
Fig 4.8 Spectrum
-0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 9.4
9.6 9.8 10.0 10.2 10.4
Y Axis Title
X Axis Title
B
Fig 4.9 Tuning Range
Fig 4.10 Phase noise
Table 4.3 Specification
規格 CMOS 0.18 m
結果比較 量測 模擬
Frequency (GHz)@(Vc=0~0.5) 9.46~10.21 9.57~10.35
Frequency (GHz)@(Vc=-0.5~0.5) 9.46~10.41 NA
Phase noise (1MHz) @(Vc=0~0.5) -112.49 -113
Tuning range(GHz) 9.6% 7.8%
Pdiss (total) (mW) 1.3~1.5 0.7~1
Die size (mm2) 0.61x0.85=0.5185
Fig 4.11 Layout
Fig 4.12 Microphotograph
CHAPTER 5 Design Flow 5.1 Design Flow
The simulation software ADS designer is used to design the circuit. ADS momentum is used to do EM simulation. After the layout of circuit is finished, DRC
& LVS & LPE is done to check the correction for the design.
Specification
Literature survey
Circuit design
Simulation & Optimization
Layout and Check (DRC, LVS)
Post-Simulation
Finish Fit Spec
NO
YES
Fit Spec
YES
NO
CHAPTER 6 Conclusions & Improvement 6.1 Conclusion
As a consideration of high frequency, small area, low-phase noise and low-power, there aren’t many architectures could satisfy the conditions. A transformer-feedback voltage-controlled oscillator is proposed as the structure choice for low-voltage, low-power, and low-phase-noise application. Transformer feedback enables to increase output swing by the dual signal swings across the supply voltage and the ground potential. The design also provides higher quality factor to improve phase noise and the power consumption.
The measurement results show that the oscillation frequency is 10 GHz with 9.6% tuning range. The core dc power consumption is only 1.3mW. The phase noise at 1-MHz offset is -112.49 dBc/Hz. The chip size is 0.51mm , core size is only 2 0.063mm . 2
To realize the integrated RF circuits with the good performances, the monolithic inductor with good quality factor is an essential requirement, especially for phase noise of VCO. In the passive components, the differential type inductor and deep-trench inductor are the better choice in Q-enhancement. Symmetrical differential inductor is the best choice since it has higher quality factor, resonant frequency and small die area [9]. Every circuit combined with passive and active device. The improvements in both of them are important for our design. The physics is limited, but the idea is infinite. We always try to combine some useful improvement and concepts, no matter how strange the idea is.
(6.1)
(6.2)
Table 6.1 the comparisons with others literatures
Ref Process Freq
6.2 Improvement
There is an issue on Substrate noise coupling effect.With the metal interconnects linked to the transistors and varactors, the noise collected by the inductor can be an important contributor to the undesired spurs in addition to the direct coupling through the body of the nonlinear devices. A straightforward solution is to use a DNW layer to prevent the noise coming from the substrate. Both of two structures provide the isolation of noise. The DNW structure has been widely used to reduce undesired interference as shown in Fig 5.1(a). [25]
Fig 5.1 (a) DNW inductor (b)Patterned Ground Shields inductor Another structure, PGS, is also employed to reduce the substrate noise coupling.
With the metal strips placed underneath the inductor, the PGS structure has been used to increase the inductor quality factor, owing to the reduced image current [26]. We can improvement our circuit with PGS under the inductor.
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