Measurement of RTN

Chapter 1 Introduction 1

2.2 Measurement of RTN

equilibrium temperature, respectively (Fig. 2.1(b)). While traps with energy levels several kT above the Fermi level would be permanently empty. Both of the two cases have no contribution to RTN.

2-2 Measurement of RTN

The measurement setup is shown in Fig. 2.3. Agilent 4155C was used for our measurements on RTN. The sampling mode was selected, and the gate and drain bias were well controlled so that the trap energy level may close enough to Fermi level.

With an appropriate sampling rate, the current fluctuation would be extracted and shown on the screen of 4155C.

2-3 Extraction of the Trap Position

A convenient method based on 1D model proposed by IBM[9] can extract the lateral trap position in a cell. With linear region operation, the applied drain voltage (Vds) affects the trap linearly depending on its position in the device. Therefore, we can apply different gate/drain bias to change the local potential at the trap site and sense the variation of <τc> and <τe>. As a result, the extraction of trap position along the channel can be attained with the equation:

where Vts denotes the voltage raised at the trap position by the drain voltage and Lg is the channel length and Lts is the distance of the trap to the source (Fig. 2.4). Fig. 2.5 is the profile of trap position along the channel. According the the experiment result, oxide trap are more likely to be located near the source/drain edge.

ts ts

- 7 -

2-4 Current Percolation Effect and RTN Amplitude

In an advanced device, number of substrate dopants is so small that cannot be regarded as an uniform doping concentration but a random and discrete distribution.

Such discrete dopants may produce discrete potential barriers in channel surface (Fig.

2.6 [10]. Conducting carriers find a smoothest path to avoid these potential barriers as flowing from source to drain. This phenomenon is called current path percolation effect and more precisely in this case - random dopants induced percolation effect.

Random discrete dopant effects may vary RTN’s amplitude [11]. The illustration in Fig.2.7 exhibits two different random dopant distribution with two different current percolation pattern correspondingly. One the interface state trap an electron, the current flow will be affected at the same time. If the interface trapped-charge is located at the key spot for current percolation path, the RTN amplitude is relatively large (large ΔID). On the other hand, smaller RTN amplitude implies that trapped-charge might be located at a minor spot for current percolation path, as shown in the lower case in Fig. 2.7.

2-5 Percolation Effect Induced RTN V

Distribution

Recently, it has been reported that single-trap RTN amplitudes and thus Vt

fluctuations exhibit an exponential distribution experimentally and a statistical model based on a three-dimensional Monte Carlo simulation with the same consequence can be described as [12-14]: (Fig. 2.8)

- 8 -

( _t) 1exp( V^t)

f V

σ σ

Δ = −Δ

In a FG flash memory for instance, the RTN tail is attributed to random dopant induced current-path percolation effects and σ is dependent on a substrate doping concentration, cell size and oxide thickness. The RTN amplitude distribution has a larger tail at a shorter gate length.

We also perform an experiment and 3D atomistic simulation on 45nm node planar SONOS flash cells to evaluate the distribution of Vt. Fig. 2.9 is the result with 200 simulations which also reveals the identical result that RTN induced Vt

fluctuation follows an exponential distribution. We will give you a brief simulation flow in the following Chapter 3.

- 9 -

(a)

(b)

Fig. 2.1 (a)The origin of RTN, (b) RTN phenomenon with the band diagram in interface

SiO

₂

Si

E

- 10 -

Fig. 2.2 Typical drain current RTN of time domain plot pointing out the three major parameters of RTS noise.

Time

Dr a in c u rre n t

τ _c

τ _e

ΔI _d

empty trap state

occupation trap state

- 11 -

Fig. 2.3 The experimental setup for measuring random telegraph noise

- 12 -

Fig. 2.4 Illustration of the objects meaning in trap position extraction

Source Drain

L

_ts

L

V

_ts

V

_ds

V

- 13 -

Fig. 2.5 Cumulative trap position distribution along the channel. Lg is the channel length and Lts is the distance of the trap to the source

0.0 0.2 0.4 0.6 0.8 1.0

Trap Position, ^x ^t (1- ) L

Trap Position, ^x ^t

(1- ) L

- 14 -

Fig. 2.6 An illustration of random dopant induced percolation effect.

- 15 -

Fig. 2.7 Different RTN amplitude caused by two different percolation path

- 16 -

Fig. 2.8 Cumulative probability of RTN induced Vt shift for different NOR technologies ranging from 180nm to 45nm.

- 17 -

Fig. 2.9 The measurement and simulation data of cumulative probabilities versus RTN induced Vt shift in 45nm SONOS cells.

0.0 0.1 0.2

10 ^-3 10 ^-2 10 ^-1 10 ⁰

ΔV _t (V)

C u mu la ti ve Pr o b ab ilit y (% )

45nm node

RTN (meas.)

RTN (simu.)

- 18 -

Chapter 3 Program Charge Effect on Random Telegraph Noise Amplitude in Floating Gate and SONOS Flash

Memory

3-1 Introduction

In this chapter, I would like to introduce program charge effect on RTN in floating gate flash and SONOS flash. In a floating gate flash, program charges are stored in a conducting poly-silicon floating gate. The potential in the floating gate is constant and does not affect the percolation paths caused by substrate dopants. Thus, the program-state RTN amplitude is identical to erase-state RTN amplitude in a floating gate cell. In a SONOS flash cell, however, program charges are stored in random and discrete nitride traps. Such random program charges may produce additional discrete potential barriers in channel surface. The current percolation paths are therefore affected by the placement of both substrate dopants and program charges which may lead percolation path into a large change from erase-state to program-state in a SONOS flash. The difference of program charge storage characteristics of FG flash and SONOS flash are shown in Fig. 3.1.

3-2 Measurement of RTN Amplitude in MLC Flash

In order to identify the concept of program charge induced percolation effect, first of all we measured single-trap RTN relative amplitudes (ΔId/Id) versus drain

- 19 -

current in both FG flash cell (Fig. 3.2) and SONOS flash cell (Fig. 3.3) with different program window for MLC application. The FG flash cell dimension is W/L=0.11μm/0.09μm. RTN amplitudes in erase-state and in two different program-state are set at the same read current level of 500nA, drain voltage at 0.7V.

We find that program-state and erase-state RTN amplitude are identical, no matter program ΔVt is 1V or 2V. However as we measured single-trap RTN relative amplitudes versus drain current in a SONOS flash cell (cell dimension:

W/L=0.09μm/0.08μm, a 2.8 nanometer tunnel oxide, a 6 nanometer silicon nitride and a 6 nanometer top oxide) with program window 0.8V and 1.5V, the curve of erase-state and program-state misalign. The result can be explained by the idea we mentioned earlier: (i) The program charges in the FG flash is continuous distribution and does not affect the percolation paths caused by substrate dopants. (ii) The current percolation paths are affected by the placement of both substrate dopants and random program charges in SONOS flash. There is another information we can get: RTN amplitude decreases as drain current increases indicating that number fluctuation dominates at high current level and percolation effect plays a more important role at low current level.

3-3 Statistics Result of Program-state and Erase-state RTN

We also measured single-trap RTN relative amplitudes (ΔId/Id) in 40 FG flash cells and 60 SONOS flash cells, then we perform a bit-by-bit tracking plot of program-state RTN amplitude versus erase-state RTN amplitude. Devices with RTN amplitudes less than 3% are excluded to avoid possible measurement errors. In the case of FG flash, we find that almost all the dots are lay on the straight line with slope=1, which means program-state and erase-state RTN have identical amplitudes in

- 20 -

each FG cell (Fig. 3.4). As a contrast, a distinctly different feature is obtained in planar SONOS cells. The RTN amplitudes spread in a wide range after programming and are almost independent of erase-state RTN (Fig. 3.5). One erase-state RTN amplitude might have many possible program-state RTN amplitude after programming. Therefore, we can deduce that program charge effect on RTN amplitude is insignificant in FG flash but severe in SONOS flash.

3-4 Correlation Factor for Program-state and Erase-state RTN

To quantify program charge effect on RTN amplitude, a correlation factor, ^f , for program-state and erase-state RTN is defined as [15]

where

x

_and y denote RTN amplitudes in erase-state and in program-state, respectively, and x and ^y are average values. A larger correlation factor suggests a smaller program charge induced percolation effect. Table. 1. Shows the measured correlation factor is 0.998 in FG flash, suggesting no program charge effect on RTN while the correlation factor reduces to 0.286 in planar SONOS flash.

3-5 P/E Cycle Dependence of RTN

The RTN amplitude versus the drain current in the first three P/E cycles in FG flash is shown in Fig. 3.6. The result shows program-state and erase-state have the same RTN characteristics and implies that program charges in a FG do not alter current percolation paths caused by substrate dopants and no P/E cycle dependence.

The first three P/E cycles in SONOS flash is shown in Fig. 3.7. The program-state

2 2

- 21 -

RTN amplitude varies from cycle to cycle, suggesting that random program charges play an important role in current percolation paths. The measured RTN waveforms and the Id -Vg for SONOS flash are shown in Fig. 3.8 and the waveforms of the first two program-state are shown in Fig. 3.9. Two-level current switching is observed in both erase and program-states, showing that RTN arises from a single interface trap and no additional traps are created during P/E cycles. As a result, we affirm that the variation of RTN amplitude from cycle to cycle is attributed to different program charge percolation paths, not additional trap creation.

3-6 3D Atomistic Simulation of RTN

To evaluate percolation effect on RTN, we performed a 3D atomistic simulation [12] for FG and SONOS cells. The first step is establishing a flash cell for both FG and planar SONOS and then placing random discrete dopants in substrate and defining a site of an interface trap inside bottom oxide layer.

We need to consider two individual states: trapping and detrapping when simulating RTN amplitude. The first one with nothing is placed at the interface trap standing for emission trap state in RTN phenomenon lets us extract an IV curve, and the second on with an electron charge is put in the interface trap symbolizing occupation trap state lets us extract another IV curve. Once we get the two IV curve, we can simulate the relative RTN amplitude by calculating ΔId/Id. So, the simulation of erase state RTN amplitude can be achieved by following the procedure above.

- 22 -

When simulating program state RTN amplitude, two different program charge storage characteristics in FG and SONOS flash have to be taken into account respectively. In FG cell simulation, program charges have a continuous distribution and an equi-potential condition in a FG is obtained in the simulation. Besides, in a SONOS cell, nitride program charges are randomly placed. So again, the simulation of program state RTN amplitude can also be accomplished by the same method. Fig.

3.10 is our simulation flow chart for reference.

Fig. 3.11 shows our simulated RTN amplitude versus the drain current in a FG cell. The program and erase-state RTN are measured in three P/E cycles. The RTN amplitudes are all the same in three P/E cycles, in agreement with our measured result.

Fig. 3.12 shows the simulation result in a planar SONOS cell. Ten different sets of random program charges with a similar program-state Vt are simulated. In all simulations no matter it is program-state or erase-state, a fixed placement of random substrate dopants and interface trap is used. The simulation shows that program-state RTN has a wide spread in amplitudes since each set of program charges results in a different current percolation path, the large variation of program-state RTN amplitude can be realized.

- 23 -

Fig. 3.1 An illustration of two different program charge storage characteristic resulting distinct outcome of percolation path. Continuous distribution in FG flash and random discrete distribution in SONOS flash

- 24 -

Fig. 3.2 RTN amplitude versus drain current in a FG flash cell at two program window : 1V, 2V. The drain voltage in measurement is 0.7V and the gate voltage is varied.

10 ^-7 10 ^-6 0

10 20 30 40

R T N Am pl it ude

, Δ

I d /I d (%)

Drain Current (Amp)

Floating gate cell

Prog. state Ers. state

(ΔV _t =1V)

(ΔV _t =2V)

W/L = 0.11mm/0.09mm

- 25 -

Fig. 3.3 RTN amplitude versus drain current in a SONOS flash cell at two program window : 0.8V, 1.5V. The drain voltage in measurement is 0.7V and the gate voltage is varied.

R T N Am pl it ude

, Δ

I d /I d (%)

Drain Current (Amp)

Prog. state Ers. state

W/L = 0.09mm/0.08mm

10 ^-7 10 ^-6 0

10 20 30 40

(ΔV

=0.8V) (ΔV

=1.5V)

Planar SONOS cell

- 26 -

Fig. 3.4 Measured program-state RTN amplitude versus erase-state RTN amplitude in 40 FG flash cells. The RTN amplitude is measured at Id=500nA @Vd=0.7V. The device dimension is W/L=0.11μm/0.09μm. The program window is 1V or 2V.

0 10 20 30 40 0

10 20 30 40

P ro g. St at e R T N A m pl it ude

, Δ

I d /I d (%)

Erase State RTN Amplitude, ΔI _d /I _d (%)

40 Floating Gate cells

Prog. ΔV _t =1V Prog. ΔV _t =2V Slope=1

I _d =500nA

- 27 -

Fig. 3.5 Measured program-state RTN amplitude versus erase-state RTN amplitude in 60 planar SONOS cells. The RTN amplitude is measured at Id=500nA @Vd=0.7V.

The SONOS cells have W/L=0.09μm /0.08μm, a 2.8nm tunnel oxide, a 6nm SiN and a 6nm top oxide.

0 10 20 30 40 0

10 20 30 40

P ro g. S ta te R T N Am p li tu d e,

Δ I /I (%) d d

Erase State RTN Amplitude, ΔI _d /I _d (%)

60 Planar SONOS Cells

Slope=1

- 28 -

Fig. 3.6 RTN amplitude versus drain current in a FG flash cell in three P/E cycles.

The Vt window is 1V. The drain voltage in measurement is 0.7V and the gate voltage is varied.

Ers. state Prog. state

P/E cycle

- 29 -

Fig. 3.7 RTN amplitude versus drain current in a SONOS cell in three P/E cycles. The Vt window is 1V. The drain voltage in measurement is 0.7V and the gate voltage is varied.

Ers. state Prog. state

P/E cycle

- 30 -

Fig. 3.8 Measured RTN waveform and Id versus Vg plot (a) in erase-state and (b) in program-state of a SONOS cell. Electron trapping at an interface trap is manifested by a current discontinuity in the Id-Vg plot

1.95 2.00 2.05 2.10

0.0 1.95 2.00 2.05 2.10

0.0

- 31 -

Fig. 3.9 The waveform of two-level RTN current switching is observed in erase-state and 1^st and 2^nd program-state.

2.00 2.05 2.00 2.05 2.10

1.95 2.00 2.05 2.10 Dr a in Cu rr en t (μ A)

0.2 1.95 0.3 0.4 0.5

0.2 0.3 0.4 0.5

1

^st

P/E 2

^nd

P/E

erase state program state

Time (sec) Time (sec)

Dr a in Cu rr en t (μ A)

- 32 -

Fig. 3.10 Simulation flow chart of our 3D atomistic simulation for RTN amplitude at program state and erase state for both FG flash and planar SONOS flash.

interface trap dopant

program charge

Random Dopants

Equi-Potential Distribution in a FG

Random and Discrete Program Charges

RTN Relative Amplitude (ΔI

/I

) Calculation

Program State

Erase State

Flash Cells

Planar SONOS Floating Gate

- 33 -

Fig. 3.11 Simulated RTN amplitude versus drain current in a FG flash cell.

Program-state and erase-state have the same placement of substrate random dopants.

The RTN trap is placed in the middle of the device.

10 ^-8 10 ^-7 10 ^-6 0

10 20 30 40 50 60

R T N Am pl it ude

, Δ

I d /I d (%)

Drain Current (Amp) Floating Gate (simulation)

Prog. state

Erase state

- 34 -

Fig. 3.12 Simulated RTN amplitude versus drain current in a planar SONOS cell.

Program-state and erase-state have a fixed placement of substrate dopants. Ten different sets of random program charges are simulated. An RTN amplitude due to number fluctuation is calculated with continuous substrate doping and program charges.

- 35 -

Chapter 4 Device Structural Dependence on Random Telegraph Noise in SONOS Flash Memory

4-1 Introduction

Now, we are going to discuss a device structure effect on RTN in SONOS flash.

In a FinFET structure which conducting current is confined to the corners of a silicon fin in weak inversion condition (Fig. 4.1). The percolation effect can be quite different from a planar SONOS.

4-2 Program Charge Effect on RTN in FinFET SONOS

Fig. 4.2 shows our measured program and erase-state RTN in FinFET SONOS for two P/E cycles. The fin height (Hfin) is 40nm and the fin width (Wfin) is 25 nm.

Unlike a planar SONOS, program-state and erase-state RTN are almost the same in a FinFET SONOS. Fig. 4.3 shows the statistical result in 50 FinFET SONOS. It is apparent that the program-state RTN amplitude spread is significantly reduced in the FinFET SONOS (correlation factor ^f ⁼ ^0.941 ) as compared to the planar SONOS( ^f ⁼^0.286 ) which means that FinFET structure can substantially reduce program charge induced percolation effect. The correlation factors can be found in Table. 1.

- 36 -

4-3 Degree of Inversion in FinFET SONOS

Degree of inversion may be one of the reasons that cause the reduction of percolation effect in FinFET SONOS. As we mentioned earlier, in a condition of stronger inversion, number fluctuation replaces percolation effect to become the decisive factor in RTN amplitude. To clarify this point, we measured RTN at a smaller drain current reduced from 500nA to 200nA. We still find a good correlation between erase-state and program-state (Fig. 4.4). Stronger inversion does not seem to be the cause of the high correlation factor in FinFET SONOS.

4-4 Channel Width Effect on Program Charge Induced Percolation Effect

The second possible reason for the large correlation factor in FinFET SONOS is the confinement of channel current. In a large-width planar SONOS, percolation paths are widely distributed in the width direction. Program-state and erase-state may have different percolation paths, as illustrated in Fig. 4.5. In a FinFET SONOS, however, the channel current is confined in the small region in Silicon fin. There are seldom choices for current percolation, so the program-state and erase-state have the same conducting path. Thus, program charge effect on RTN is smaller.

Fig. 4.6 shows that the program-state RTN spread can be further reduced as a fin width reduces from 25nm to 10nm. The measured correlation factor increases from

0.817

f = in Wfin=25nm and ^f ⁼^0.941 in W^fin=10nm (Table. 1). We also perform a 3D RTN simulation in planar SONOS with different channel width (Fig. 4.7). Our simulation indeed shows that the correlation factor increases with a decreasing gate

- 37 -

width. The measurement and simulation reveal the same trend that smaller channel width lead to smaller program charge induced percolation effect on RTN amplitude.

4-5 Symmetry of Program Charge Distribution in a Surrounding Gate SONOS

The third reason for the reduction of program charge effect in FinFET SONOS is the symmetry of program charge distribution. The illustration in Fig. 4.8 tells us that in a planar SONOS, the location of program charges matters. For example, the site #4 in planar SONOS influence the conducting path the most while the other site barely affect it. In a surrounding gate SONOS, however, all sites of program charge have the same effect on conducting path, resulting a smaller percolation effect. The FinFET structure lies in between planar and surrounding gate structure. Moreover in a real FinFET device, the corners are rounded and the shape is like an arc. So we can deduce that the FinFET has a smaller program charge effect due to structural symmetry.

- 38 -

Fig. 4.1 Cross-section of a FinFET SONOS and the electron concentration contour in the FinFET SONOS obtained from a 2D simulation.

FinFET SONOS

Gate

O N O

1E13 1E15

1E17 n=1E18/cm

FinFET SONOS

Gate

O N O

1E13 1E15

1E17 n=1E18/cm

- 39 -

Fig. 4.2 RTN amplitude versus drain current in a FinFET SONOS cell for two P/E cycles.

- 40 -

Fig. 4.3 Program-state RTN amplitude versus erase-state RTN amplitude in 50 FinFET SONOS cells. The RTN is measured at Id=500nA @Vd=0.7V. The fin height is 40nm and the fin width is 10nm. The channel length is 80nm. The program window is 1V.

50 FinFET SONOS Cells

0 10 20 30 40 0

10 20 30

40 W _FIN =10nm

Slope=1

P ro g. St at e R T N A m pl it ude

, Δ

I d /I d (%)

Erase State RTN Amplitude, ΔI _d /I _d (%)

- 41 -

Fig. 4.4 Program-state RTN amplitude versus erase-state RTN amplitude in FinFET SONOS cells. The fin width is 10nm. (a) RTN is measured at Id=500nA and (b) RTN is measured at Id=200nA.

P ro g. S ta te R T N Am p li tu d e, Δ I

/I

(%)

Erase State RTN Amplitude, ΔI

/I

(%)

60 Planar SONOS Cells

Slope=1

50 FinFET SONOS Cells

0 10 20 30 40

P rog. S tat e R T N A m p li tu d e,

Δ I /I (%)

- 42 -

Fig. 4.5 In a planar SONOS, percolation paths are widely distributed in the gate width direction. In a FinFET SONOS, conducting paths are confined to a small region in the corner of the Si fin.

Planar SONOS

(broad distribution of percolation paths)

FinFET SONOS

(confined percolation paths)

Erase State

Program State

- 43 -

Fig. 4.6 Measurement of the correlation factor in FinFET SONOS with two different fin width, 10 nanometer and 25 nanometer. The correlation factor increases from 0.82 to 0.94 as the fin width reduces from 25 nanometer to 10 nanometer.

0 10 20 30 40

P rog. S tat e R T N A m pl it ude , Δ I

/I

(% )

Erase State RTN Amplitude, ΔI

/I

(%)

P rog. S tat e R T N A m p lit u d e, Δ I

/I

(% )

Erase State RTN Amplitude, ΔΙ

/I

(%)

- 44 -

Fig. 4.7 A 3D RTN simulation in planar SONOS with different channel width. The correlation factor is calculated based on a sample size of 40 devices.

0 20 40 60 80 100 0.0

0.2 0.4 0.6 0.8 1.0

Channel Width (nm)

L _channel = 50nm

Simulation (Planar SONOS)

C orre la tion F ac tor

- 45 -

Fig. 4.8 An illustration of three different structures in SONOS flash: planar, FinFET and surrounding gate.

Surrounding gate

- 46 -

Table. 1 Measured RTN correlation factors in FG flash, planar SONOS and FinFET SONOS cells.

Correlation Factor

Floating Gate Planar SONOS FinFET SONOS

0.998 0.286 W

_FIN

=25 W

_FIN

=10

0.817 0.941

- 47 -

Chapter 5 Conclusion

Read failure due to a RTN induced Vt tail is an important issue in flash memory scaling. With a simple trap position extraction technique, we can count the oxide trap distribution along the channel. Oxide trap are more likely to be located near the source/drain edge.

In a FG flash, RTN amplitudes are mainly determined by random dopant induced percolation effect and identical in erase and program states. However, in a planar MLC SONOS, we find that RTN amplitudes have a wide spread after program.

The program-state RTN distribution is affected by both random program charges and substrate dopants. In addition, the RTN amplitude varies from P/E cycle to P/E cycle due to program induced percolation effect. Therefore the program charge effect has to be considered in RTN modeling in MLC SONOS.

According to our experiments and simulations, the program charge induced percolation effect can be significantly reduced in a surrounding gate structure, such as a FinFET SONOS.

- 48 -

References

[1] Ming-Horn Tsai, Hirotaka Muto, and T. P. Ma, “Random telegraph signals arising from fast interface states in metal-SiO2-Si transistors”, Appl. Phys. Lett.vol. 61, pp. 1691, October 1992

[2] K. Kandiah, M. O. Deighton, and F. B. Whiting, “A physical model for random telegraph signal currents in semiconductor devices”, J. Appl. Phys. vol.66, pp.

在文檔中 SONOS快閃記憶體中寫入電荷和元件結構對於隨機電報雜訊的影響 (頁 17-0)

Chapter 1 Introduction 1

2.2 Measurement of RTN

2-2 Measurement of RTN

2-3 Extraction of the Trap Position

2-4 Current Percolation Effect and RTN Amplitude

2-5 Percolation Effect Induced RTN V

Distribution

(a)

(b)

SiO

Si

E

E

E

E

Time

Dr a in c u rre n t

τ c

τ e

ΔI d

empty trap state

occupation trap state

Source Drain

L

L

V

V

V

0.0 0.2 0.4 0.6 0.8 1.0

Trap Position, x t (1- ) L

Trap Position, x t

(1- ) L

0.0 0.1 0.2

10 -3 10 -2 10 -1 10 0

ΔV t (V)

C u mu la ti ve Pr o b ab ilit y (% )

45nm node

RTN (meas.)

RTN (simu.)

Chapter 3

Program Charge Effect on Random Telegraph Noise Amplitude in Floating Gate and SONOS Flash

Memory

3-1 Introduction

3-2 Measurement of RTN Amplitude in MLC Flash

3-3 Statistics Result of Program-state and Erase-state RTN

3-4 Correlation Factor for Program-state and Erase-state RTN

x

3-5 P/E Cycle Dependence of RTN

3-6 3D Atomistic Simulation of RTN

10 -7 10 -6 0

10 20 30 40

R T N Am pl it ude

, Δ

I d /I d (%)

Drain Current (Amp)

Floating gate cell

Prog. state Ers. state

(ΔV t =1V)

(ΔV t =2V)

W/L = 0.11mm/0.09mm

R T N Am pl it ude

, Δ

I d /I d (%)

Drain Current (Amp)

Prog. state Ers. state

W/L = 0.09mm/0.08mm

10 -7 10 -6 0

10 20 30 40

(ΔV

=0.8V) (ΔV

=1.5V)

Planar SONOS cell

0 10 20 30 40 0

10 20 30 40

P ro g. St at e R T N A m pl it ude

, Δ

I d /I d (%)

Erase State RTN Amplitude, ΔI d /I d (%)

40 Floating Gate cells

τ _c

τ _e

ΔI _d

Trap Position, ^x ^t (1- ) L

Trap Position, ^x ^t

10 ^-3 10 ^-2 10 ^-1 10 ⁰

ΔV _t (V)

10 ^-7 10 ^-6 0

(ΔV _t =1V)

(ΔV _t =2V)

10 ^-7 10 ^-6 0

Erase State RTN Amplitude, ΔI _d /I _d (%)

Prog. ΔV _t =1V Prog. ΔV _t =2V Slope=1

I _d =500nA

Erase State RTN Amplitude, ΔI _d /I _d (%)

10 ^-8 10 ^-7 10 ^-6 0

40 W _FIN =10nm