CHAPTER 1 INTRODUCTION
1.9 O RGANIZATION OF DISSERTATION
This dissertation is divided into eight chapters. The first chapter goes through the brief introduction of TFT applications, OTFTs, a-IGZO TFTs, and ambipolar TFTs.
Besides, motivation and organization have also provided. The second chapter presents the experiments and equipments for OTFTs, a-IGZO TFTs, and ambipolar TFTs. The third chapter discusses the high-operating-voltage issue of OTFTs. We used polymer/TiO2 high dielectric nanocomposite dielectric as gate insulator to produce more field-effect carriers. Different percentage of TiO2 nanoparticles and surface polarity of dielectric layer have been discussed. In addition, flexible OTFTs are also demonstrated. The fourth chapter describes the photosensitivity and operating voltage can be reduced by blending TiO2 nanoparticles as recombination centers and as high κ material. Furthermore, transparent OTFTs with low photosensitivity are also presented. The fifth chapter shows OTFTs can have color
filtering function. Color filter inks are first successfully integrated into gate dielectric layer. Moreover, colored polymethyl methacrylate (PMMA) is used to be gate insulator. This unique colored polymer minimizes the phase separation issue and opens a new way for the application of multifunctional organic electronics. The sixth chapter studies the optical and electrical properties of amorphous In-Ga-Zn-O films. Photosensitivity of a-IGZO TFT under illumination with different wavelength is also discussed. The seventh chapter represents the simulation and modeling result of a-IGZO TFTs. Oxygen vacancies are first introduced into density of states. The eighth chapter presents our latest results of ambipolar TFTs and their CMOS-like inverter circuit. We combine pentacene and a-IGZO these two active materials into one device, demonstrates both p type and n type behavior. Furthermore, two ambipolatr TFTs combined together shows CMOS-like inverter characteristic. The ninth chapter gives the conclusion and future work.
Chapter 2
Experimental Methods
2.1 OTFT device fabrication
The top-contact structure was chosen to fabricate the OTFTs in our work because the metal surface was not a suitable environment for the growth of organic materials in bottom-contact structure. In addition, OTFTs with top-contact structure have better performance comparing to bottom-contact structure.
(1) Indium tin oxide electrode patterning
The substrates we used were 100 nm ITO on 1 mm-thick glass. The ITO resistivity is 10 Ω/□. We use photolithography and wet etch process to define the gate electrode pattern. The final schematic structure is shown in Fig. 2-1.
Fig. 2-1 Schematic structure of ITO-patterned-glass
(2) Substrate cleaning The details sequence is:
Step 1: Clean glasses by detergent Step 2: Clean glasses by DI water Step 3: Repeat step 1 and step 2
Step 4: Place the glasses on the Teflon carrier, and put them into a container with acetone. Ultrasonic vibrates 20 minutes to remove organic contamination.
Step 5: Place the glasses into another container with isopropanol (IPA). Ultrasonic vibrate 20 minutes to remove acetone.
Step 6: Use N2 purge to dry the ITO glasses; place them into a glass container with a cover.
Step 7: Put the glass container into an oven with 1000C.
Step 4 and step 5 are illustrated in Fig. 2-2.
acetone isopropanol
(a) (b)
Fig. 2-2 Schematic picture of (a) step 4 and (b) step 5
(3) Gate insulator layers
We used different gate insulators in each study. The details will be presented in each section.
(4) Growth of pentacene and electrodes
99.9% pentacene purchased from Fluka without additional purification, was employed as the active layer. It was sublimated by thermal coater under a back pressure below 1.1×10-6 torr. The substrate could be heated from 17℃ to 90℃, and measured with an Al-Cr thermocouple. As for deposition rate, it was controlled at a rate of 0.5 Å/sec by a quartz oscillator during the thin-film formation. A shutter allowed the stable pentacene flux to pass until the total thickness approached 60 nm.
Gold is appropriate for pentacene-based OTFTs as source/drain electrodes due to workfunction matched with pentacene HOMO level. Accordingly, 35-nm-thick Au, as top contacts, was deposited at a rate of 2~3 Å/sec through a shadow mask under 3×10-6 torr. As for the transparent devices, the hole injection layer, MoO2 was deposited at a rate of 0.5 Å/sec. ITO was deposited by sputtering at 15 mins under 8×10-6 torr. The channel width (W) was 2000μm for all devices in this study, and channel lengths (L) were varied as 75, 100, 130, 160 μm.
(5) Device processing steps
A typical OTFT processing flow chart is shown below.
pical OTFT device fabrication
2.2 Electrica
The electrical properties of the devices were measured by a Keithley 4200 IV temperature. For the devices based on
Fig. 2-3 The flow chart of ty
l Measurement of Devices
analyzer in a light-isolated probe station at room
pentacene, a negative bias of gate voltage was applied to accumulate holes in the p-channel active layer. In IDS-VDS measurement, the typical drain-to-source bias was swept from 0 to -40 Volts and the gate voltage steps were from VGS = 0 V to VGS = -40 V. Besides, in IDS-VGS measurement, the gate bias was swept from 20 to -40
Volts and the drain-to-source voltage steps were from VDS = 0 V to VDS = -40 V.
The capacitances of insulating layer modified with various polymer dielectric materials were measured by HP4284A using metal-insulator-metal (MIM) structure.
We used a Digital Instruments Dimension 3100 atomic force microscope (AFM) ic semiconducting layers. By the inte
2.3 Surface Morphology Measurement
to obtain the surface morphology of the organ
raction of the van der Waals force between the tip of the cantilever and the surface topology of the sample, the cantilever vibrates at various frequencies depending on the magnitude of the interaction. Detecting a laser beam reflected by the cantilever can sense the tiny vibration of the cantilever.
Fig. 2-4 A schematic model of atomic force microscope
The computer record these detected signals and construct the surface morphology of samples. Fig. 2-4 illustrates the configuration of AFM. From the surface morphology, we have clues to recognize the relation between the transfer characteristics and the graining formation of the organic semiconductor. During the scanning of tapping-mode, the probe oscillates up and down regularly. It prevents the probe from damaging the surface of the organic samples and obtains extra topographic information about the samples. The computer records the feedback amplitude and the phase signals of the cantilever. From the amplitude signals we can obtain the morphology information. The phase signals reveals the different materials or arranged formation of the sample.
2.4 Contact Angle Measurement
The contact angle, formed between the liquid/solid interface and the liquid/vapor interface, is defined by the edge of a liquid droplet on the surface of flat sample, which is illustrated in Fig. 2-5 indices s and l stand respectively for “solid” and
“liquid”; the symbols σ and σ denote the surface tension components of the two phases; symbol γ represents the interfacial tension between the two phases, and θ stands for the contact angle corresponding to the angle between vectors σ and γ .
s l
Fig. 2-5 The contact angle formation of liquid on solid surface
The contact angle is specific for any given system and is determined by the interactions across the three
. Furthermore, use Young’s equation [16] to calculate the surface energy of different modified insulators. The contact angle measurement and surface energy calculation were finished by Kruss Universal Surface Tester, GH100.
interfaces. The concept of static measurement mode is illustrated with a small liquid droplet resting on a flat horizontal solid surface. This method is used to estimate wetting properties of a localized region on a solid surface.
We dropped respectively diiodo-methane, water and ethylen glycol liquids on the SiO2 surfaces with various modification to measure the contact angle in each case
Young's equation : σ
s= Y
sl+ × σ
lcos θ
2.5 Sputter
(1)ns. The ions hit the target with enough energy to dislodge the target atoms, wh
nd the lowest energy state ossible. RF sputtering can be used to sputter both insulating and conducting targets,
ing
RF sputteringRF sputtering uses a radio frequency power supply, operating at 13.56 MHz, to generate plasma, which creates ions are used to sputter the target material. The ions are accelerated towards the target by a negative DC bias on the target due to the flux of electro
ich are then redeposited onto the substrate. RF sputtering is performed under vacuum, typically between 1 mTorr and 50 mTorr, to improve the quality and the deposition rate of the deposited film. A lower pressure increases the mean free path, the distance between collisions, and results in the deposited species having more energy to diffuse along the substrate surface in order to fi
p
since charge does not build up on the surface of the target. The major disadvantages f RF sputtering are cost and deposition rate.
(2) DC sputtering
change from RF to direct current (DC) sputtering is the power supply used. In DC sputtering, as the nam
(3) Sputter system in NCTU
ing system in class 10K clean room. Schematic outline is shown in Fig. 2-6. V
2 2
o
The only major
e suggests, a DC power supply is used to create the plasma. The physics of the sputtering process is unchanged. Direct current sputtering allows for higher deposition rates and is less expensive than RF sputtering.
Conventional DC sputtering can only be used to sputter conductive targets. The flux of electrons from the DC supply causes charge to build-up on the surface of an insulating target, rendering the plasma unstable so that it eventually extinguishes.
One method used to sputter insulating targets using DC sputtering involves the use of a pulsed DC source. When using a pulsed DC source, the voltage is periodically pulsed positive for a very short time to remove the charge on the insulating target.
This positive pulse duration is a very small fraction of the entire period, resulting in a higher sputter rate than that of RF sputtering.
We have our-own sputter
acuum system composes of rotation pump and cryo pump, which work for different pressure range. Power system consists of several DC and RF power modules with 6 sputtering guns. Purified gas sources are Ar, N , and O . There is also an rotation system to get high uniformity by rotating sample disk and sample holders.
Fig. 2-6 Schematic sputtering system in NCTU
Chapter 3
rganic Thin-film transistors with polymeric anocomposite dielectrics
O n
3.1 Introduction
Organic thin-film transistors (OTFTs) have been recognized as promising chnology for next generation electronics due to their unique advantages, such as ght-weight, flexibility, and low-cost fabrication [17- 19]. Potential applications clude flexible displays [20,21], radiofrequency identification (RFID) tags [22],
‘‘smart’’ cards, and other consumer electronics [ 23 , 24 ]. However, the major challenge to realize the commercialization of related products comes from their high threshold and operating voltages, due to the intrinsic low charge motilities of organic semiconductors. Because the field-induced current is proportional to the field-induced charge density, one feasible approach to achieve low-voltage operation in OTFTs is to use high dielectric constant (high-κ) materials as the gate insulators, which can afford greater surface charge density at the semiconductor-dielectric interface. Several works, especially those adopting inorganic high- κ materials, have demonstrated successfully the reduction of the OTFTs operating voltages using this concept [25,26]. However, these inorganic materials are usually expensive to fabricate and not compatible with plastic substrates due to the high-annealing-temperature processes and their fragility. Using a solution-processable method high- κ polymers can be easily fabricated and used as dielectrics for OTFTs without the complications associated with sputtering high- κ materials and the high-temperature annealing [ 27 ]. Nanocomposite materials, te
li in
consisting of titanium dioxide (TiO2) nanoparticles and cross-linked poly-4-vinylphenol (PVP), were dispersed well in organic solvents. Upon spin-coating and thermal annealing, a composite insulator film was obtained. Due to
es into the polymer matrix. In this work, surface modified TiO2 nanoparticles with organosiloxane was used in order to increase the solubility in organic solvents. With the higher content of TiO2
incorporated
3.2 Experiment
the limited solubility of TiO2 nanoparticles, the dielectric constant only increased from 3.5 to 5.4 after blending high- κ nanoparticl
, a dielectric constant higher than 11 is achieved. More importantly, we will show that the current leakage problem through the gate dielectrics can be overcome by further applying another thin organic polymer insulator. As a result, we have also demonstrated low-voltage OTFTs, which can operate within 10 V.
Titanium dioxide exists naturally as three possible crystal types, namely, rutile, anatase and brookite [28]. In this study, we employed TiO2 with rutile structure due to its higher dielectric constant (κ = 114) than that of other structures. In addition, rutile TiO2 has much lower photocatalytic activity; possible photoreactions can be avoided. Nanocomposite dielectric layers, consisting of TiO2 nanoparticles, whose surface was further modified with organosiloxane (Ishihara Sangyo Kaisha LTD., Japan), and cross-linked PVP were prepared for OTFT gate insulators. PVP (11 wt%) and poly (melamine-co-formaldehyde) methylated (4 wt%), as a cross-linking agent, were dissolved in propylene glycol monomethyl ether acetate (PGMEA), [29] and blended with different concentrations of TiO2 nanoparticles. The composite solution was then spin coated onto indium–tin-oxide (ITO) patterned glass substrates which were used as gate electrodes. The thickness of these insulators is ~700 nm.
Pentacene was thermally evaporated as the semiconductor layer. Finally, gold metal was thermally evaporated through the shadow mask and used as the source and drain electrodes (top-contact). The channel length (L) and width (W) are 160 and 2000 μm, respectively. The film thickness and roughness were measured by DI 3100 series atomic force microscopy (AFM). The current–voltage (I–V) characteristics of OTFTs were measured by a HP 4156A semiconductor parameter analyzer. The devices with metal–insulator–metal (MIM) structure, consisting of different dielectric materials sandwiched between ITO and Al electrodes, were used for capacitance measurements. The capacitance measurements were conducted with a HP 4284A Precision LCR meter. The dielectric constants were calculated by eq.
(3-1):
C = κε0Α/t eq. (3-1)
sured capacitance, ε0 is the permittivity of free space, A is the area of the capacitor
structure of the OTFT where C is the mea
, and t is the thickness of the dielectric.
Fig. 3-1 Chemical structures of the pentacene and cross-linked PVP; device
[ ]
3.3 Result and Discussion
For a pure cross-linked PVP film, the dielectric constant is 4.3 at 1 kHz, which close to the value reported earlier [27,30]. From Table 3-1, we can see that the dielectric constant increases with the amount of the TiO nanoparticle embedded in the thin films. For the dielectric film with 15 wt% of TiO nanoparticle, the dielectric constant increased to 10.8, due to the higher solubility of the organosiloxane surface modified TiO fillers, compared to that reported earlier [27].
Several theoretical models have been investigated to predict the dielectric constant of the nanocomposite [31,32]:
2
respectively, and υ is the filler volume percentage. Compared the modeling results with the experimental data, as shown in Fig. 3-2, the Model B, called Effective Medium Theory (EMT), which considers the average permittivity around the fillers
εc , ε1 and ε2 are the composite, base and filler dielectric cons
expanding from Bruggeman’s theory, can better and accurately predict the dielectric constant of the nano-composite.
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
Volume fraction of TiO2 % Experimental data
Experimental data with P8 EMT
Bruggrman L oglaw Rayleigh
Fig. 3-2 Calculated and experimental dielectric constants
lectrical parameters of the OTFTs in this study.
μsat (cm2/Vs)
From the experimental data, the dielectric constant of PVP film blended with 15%wt TiO2 was smaller than that of the film further modified with PαMS. It is suspected that the higher leakage current, resulted from the blending of nanoparticles, reduces the effective dielectric behavior of the dielectrics. After
PαMS treatment, the value of dielectric constant (κ=11.7) is closer to the value predicted from EMT model (κ=12.2). It is also found that at high filler volume regions, the dielectric constant increases exponentially with filler volume. Based on our calculation, it is anticipated that this method is promising for increasing the dielectric constant of organic insulators as long as we can load more fillers into the matrix.
(a) (b)
characteristics of OTFTs with (a) a composite insulator with 15 wt% TiO2
The drain– rrent (IDS) vs. drain–source voltage (VDS FT ifferent TiO2 concentrations incorporated in the gate insulators is shown in Fig. 3-3.
Th
Fig. 3-3 The output a neat PVP insulator (b)
source cu ) of OT s with
d
e carrier mobility was calculated in the saturation regime using the following equation:
IDS = (WCi/2L)μ(VG-VTH)2 eq. (3-2)
where Ci is the capacitance per unit area of the insulator, and VTH is the threshold
voltage. For the device with a neat PVP gate insulator, (Fig. 3-3(a)) the mobility in the saturation region and the threshold voltage of the OTFT are 0.42 cm2 V-1 s-1 and -5.2 V, respectively. The on–off ratio is more than 104. With 15 wt% of TiO2
nanoparticles blended into the dielectric layer, (Fig. 3-3(b)) the device exhibits more than triplet the field-induced current compared with that of the device using the pure PVP insulator which is attributed to the higher surface capacitance. Fig. 3-3 reveals he content of TiO2
anoparticles in the gate insulators. The parameters of the dielectric materials as ell as the corresponding electrical characteristics of the OTFTs with different mount of TiO2 nanoparticles embedded in the gate insulators are summarized in able 3-1. On the other hand, we also observe that the threshold voltage (VTH) ecreases and then increases when more nanoparticles were added (Table 3-1). From e surface morphology study by AFM, the insulator roughness increased with the creasing concentration of TiO2 blended. Consequently, the shift of VTH to higher alues may be the result of the insulators surface roughness. The interface between e organic semiconductor and the insulator is affected by the incorporation of TiO2
anoparticles. Additionally, we can also find that the on/off ratio decreases while the
conce evice
with 15 wt% TiO2 h that with 1 wt%
anoparticles. The leakage problem is probably due to the low-band gap of TiO2. In ad
). In order to rectify this problem, the insulator layer was covered with a of cross-linked that the drain–source current increased by increasing t
n
ntration of TiO2 increases (Table 3-1). Fig. 3-4 shows clearly that the d as much higher leakage current than
n
dition, structure defects induced by the present of high concentration TiO2 might also result in the higher leakage current, which has been confirmed from the fact that the surface roughness of the insulators increased with the content of nanoparticles (Table 3-1
poly(α-methylstrylene) (PαMS) layer. Due to the robustness
polymers, the underlayer was not affected by this process. As shown in Fig. 3-4, the
device off current is dramatically suppressed after spin-coating ~3 nm PαMS on the nanoparticle/cross-linked PVP insulator. The over-coating of another interfacial layer can reduce the concentration of surface defects of the dielectrics and smooth the dielectric surface. In addition the dielectric constant of the insulator modified with PαMS is higher than that without modification. This further supports the fact that PαMS can inhibit the leakage current and enhance the dielectric strength of the composite polymer. On the other hand, the smooth dielectric surface might also induce the formation of a more orderly crystalline pentacene film, and subsequently, increase the device mobility as shown in Table 3-1.
Fig. 3-4 The transfer characteristic at constant VDS= -30V for OTFTs with 1wt%, 15wt% of TiO2 nanocomposite insulators, and nanocomposite insulator with PαMS interfacial layer
Table 3-1 apparently shows that the surface roughness of the dielectric layer affects the device mobility in the saturation regime. While the concentration of TiO2
is more than 5 wt%, the mobility drops dramatically. The rough dielectric surface probably interferes with the formation of an ordered crystal structure. Fig. 3-5 shows the surface morphology of pentacene deposited on different dielectrics. In contrast to the clear crystal formation on the neat crosslinked PVP, the grain size of pentacene
is more than 5 wt%, the mobility drops dramatically. The rough dielectric surface probably interferes with the formation of an ordered crystal structure. Fig. 3-5 shows the surface morphology of pentacene deposited on different dielectrics. In contrast to the clear crystal formation on the neat crosslinked PVP, the grain size of pentacene