Contact resistance - The Operation of Organic Thin-Film Transistors

Chapter 2............................................................................................................................ 10

2.3 The Operation of Organic Thin-Film Transistors

2.3.3 Contact resistance

There are two origins of the TFT series resistance: contact resistance and channel resistance. In recent years, researchers have pointed out that the performances of OTFTs are limited by the contact resistance at metal electrode/organic interface significantly [35-37, 57, 58]. The contact resistance has been found to be comparable with channel resistance. It

where the R_p is the parasitic resistance, R_c is the contact resistance, R_b is the bulk resistance, and R_ch is the channel resistance. We can extract the R_c when the channel length is approaching to zero by equation 2-7 as shown in Figure 2.8 [57].

-40 0 40 80 120 160

Figure 2.8 The illustration of transfer line method.

Chapter 3 Experimental and Analysis Methods

3.1 Substrate Preparation

3.1.1 Preface

The top-contact structure was chosen to fabricate the n-type OTFTs in this study due to its relatively better performance. The top-contact TFT is shown in Figure 2.1a. ITO (Indium Tin Oxide) is a kind of conducting material which also has high transparency. Because of that, ITO is always coated on glass substrate to form a conducting thin film. In this study, we choose ITO/glass and Si/SiO2 substrates. With the use of ITO/glass substrate, we usually need to define the ITO pattern by optical lithography. It is attributed to that the polymer insulator often provides a higher leakage current than SiO2 insulators due to its uniformity and compactness. The cleanness is also a important issue in fabricating OTFT devices. If the substrate is not clean, the uniformity of polymer layer will be low. We will introduce the cleaning process in the following section.

3.1.2 ITO Patterning Process

The process for ITO pattern is shown in Figure 3.1. First, we spin-coated a layer of photoresist (PR) on a cleaned ITO/glass substrate, and then we put shadow a mask that we designed for ITO pattern on the ITO/glass substrate followed by UV exposure for 100 seconds.

Second, the exposure parts of PR would become soft and removed in development process.

After development, HCl was used to remove the ITO which is with no PR. Finally, the hard PR is removed with acetone.

Figure 3.1 The process of ITO patterning.

3.1.3 Cleaning of ITO/Glass Substrate

After etching of ITO, the glass substrates have to be completely cleaned. We washed the substrates with detergent first and rinsed by deionized water in the first place. The detergent can take the large particles and oil sludge away. The second step was soaking the substrates in acetone into an ultrasonic cleaner for 40 minutes. Organic pollutants would be swept away in this step. After rinsing by DI water in 5 minutes, we put the substrate in isopropyl alcohol (IPA) with ultrasonic microvibrations for 30 minutes. The residual acetone and water molecules would be taken away by IPA. Finally, we dried the substrates by nitrogen shower, and then these substrates are placed into an oven in which the temperature was set to 120°C for at least 24 hours to remove the water.

3.1.4 Cleaning of SiO

/Si Substrate

We also use heavily doped n-type silicon wafers, with thermal SiO₂ to fabricate the devices. The top SiO₂ layer was 200 nm-thick, and the sheet resistance was about 0.001~0.003 ohm-cm. The capacitance per unit area in the SiO₂ layer was 14.2 nF/cm².

First, we put the substrates into a Teflon container, and rinsed them with DI water for 5 minutes. Then we dipped the container into a 3:1 mixture of concentrated sulfuric acid (H₂SO₄) and hydrogen peroxide (H₂O₂) at 80°C for 20 minutes. After this acid bath, we rinsed the substrates with DI water again for 5 minutes. Finally, we dried the substrates with nitrogen flow, and put them into a hot oven to remove the residual water.

3.2 The Materials

[6,6]-phenyl C₆₁-butyric acid methyl ester (PCBM) [Figure 3.2(a)] was used as the active layer of the TFTs. We dissolved PCBM molecules in chloroform (CF) [Figure 3.2(b)]. The polymer poly(ethylene glycol) (PEG) [Figure 3.2(c)] has blended into the PCBM layer. The dielectric polymer film was made of poly(4-vinylphenol) (PVP) [Figure 3.2(d)] and poly(melamine-co-formaldehyde) methylated (PMCFM) [Figure 3.2(e)]; they were dissolved in propylene glycol monomethyl ether acetate (PGMEA) [Figure 3.2(f)].

The energy level diagram of the materials used in this study is displayed in Figure 3.3.

(a) (b) (c)

(d) (e) (f)

(a) (b) (c)

(d) (e) (f)

Figure 3.2 The structure of organic materials used in this experiments.

LUMO

HOMO PCBM -3.7eV

-6.1eV -4.2eV

Al LUMO

HOMO PCBM -3.7eV

-6.1eV -4.2eV

Figure 3. 3 The energy level diagram of the materials used in this study.

3.3 Device Fabrication Process of OTFTs

3.3.1 Spin-Coating Polymer Dielectric Film

The OTFT was fabricated on a ITO/glass substrate (<10 Ω/sq sheet resistance), where ITO was used as gate electrode. Before spin-casting of the polymer insulator, we put the substrates into an UV-Ozone machine for 30 minutes. The ozone molecules would burn the organic contaminant on substrates, and then be taken away by cleaning air flow.

The cleaned ITO substrates were then covered with a layer of 760-nm-thick polymer dielectric insulator, which was prepared by spin-coating of a solution of PVP (11wt%) and PMCFM (4wt%) (cross-linking agent) in PGMEA. The other OTFT was prepared on SiO₂ substrate then covered with a layer of 50-nm-thick PVP interlayer.

The PVP films were firstly baked at 120°C for 5 minutes and then 200°C for 30minutes.

The resulting capacitances per unit area of the insulator on ITO and the interlayer on SiO₂ were 5.4 and 10.0 nF/cm², respectively.

3.3.2 Spin-Coating of PCBM/PEG Blends as the Active Layer and Evaporation of Metal Electrodes

The PCBM/PEG blended film was spin-coated on the PVP coated substrate inside a N₂-filled glove box. The spin rate was set to 1000 r.p.m. for 30 seconds.

Before the deposition of S/D, the device was pre-annealed at 80°C for 15 min. Finally, Al was thermally evaporated onto the active layer under a pressure less then 5×10^-6 torr through a shadow mask to form S/D contacts. The thickness of Al S/D was 100 nm. The channel length and width were 100nm and 2000μm, respectively.

1. 100 nm Al was evaporated on top of the semiconductor layer through the

shadow mask

2. Cooling down for 30 mins

1. 50 nm PCBM with or w/o PEG was spun on the PVP insulator

2. Baked at 80°C for 15 mins 1. 760-nm PVP was spin-coated 2. Baked at 120°C for 5 mins

1. 100 nm Al was evaporated on top of the semiconductor layer through the

shadow mask

2. Cooling down for 30 mins

1. 50 nm PCBM with or w/o PEG was spun on the PVP insulator

2. Baked at 80°C for 15 mins 1. 760-nm PVP was spin-coated 2. Baked at 120°C for 5 mins

& 200°C for 30 mins 1. RCA clean

2. UV-OZONE (30 mins)

Figure 3.4 The flow chart of the device fabrication process ( ITO/glass substrates).

SiO

₂

insulator

2. Cooling down almost 30 mins

SiO

₂

insulator

2. Cooling down almost 30 mins

Figure 3.5 The flow chart of the device fabrication process ( Si/SiO₂ substrates).

3.4 Measurements and Analysis of OTFTs

3.4.1 Electrical Characteristics

In this work, we measured the electrical properties of the devices by Keithley 4200 IV measurement system at room temperature. For PCBM devices, we apply a positive gate voltage to accumulate electrons in the channel near the semiconductor/insulator interface. In the I_D-V_D measurement, we swept the gate bias from 0 to 60V, and the gate voltage step was 15 V from V_G= 0 V to V_G= 60 V. Additionally, in the I_D-V_G measurement, we swept the drain voltage from -20 V to 60 V, and the drain voltage step was from 15V to 60V.

3.4.2 Capacitance Analysis

We measured the capacitances of SiO₂ and PVP cross-linked polymer by HP 4284A using metal-insulator-metal (MIM) structure.

3.4.3 Surface Morphology Measurement

The atomic force microscope (AFM) has been invented in 1985, which could measure the surface morphology of low conductivity materials. The principle of AFM is the interaction of van der Waals force, which is different with scanning electron microscope (SEM) by electron tunneling effect. We assume there are two atoms: one is on the tip of the cantilever, the other is on the surface of sample. The interaction force between the two atoms depends on their distance as show in Figure 3.6. In this study, we used Digital Instruments Dimension 3100 AFM to get the surface morphology of the active layer. Figure 3.7 shows how can AFM work to obtain surface properties.

Figure 3.6 The interaction force between two atoms.

Figure 3. 7 The operation method of AFM.

3.4.4 X-ray Photoelectron Spectroscopy Measurement

X-ray photoelectron spectroscopy (XPS) is a quantitative spectroscopic technique that measures the elemental composition, chemical state and electron state of the elements that exist in materials. The basic components of XPS system is shown in Figure 3.8. XPS spectra are obtained by irradiating a material with a beam of X-rays while measuring the kinetic energy and number of electrons that escape from the top thin-film (1 to 10 nm) of the material being analyzed simultaneously. XPS requires ultra high vacuum (UHV) conditions. XPS detects all elements with an atomic number (Z) of 3 (lithium) and above. It cannot detect hydrogen (Z = 1) or helium (Z = 2). XPS is routinely used to analyze inorganic compounds, metal alloys, semiconductors, polymers, catalysts, glasses, make-up, teeth, bones, and many others.

From XPS measurement, we can know if there is any chemical interaction between PEG and Al S/D electrodes. In 2006, Guo et al. reported that the performances of polymer light-emitting diodes could be improved by the formation of a PEGDE (PEG dimethyl ether)/Al complex at the cathode interface [58]. In Figure 3.9, the C1s XPS spectrum of the HY-PPV/Al has a main peak at a binding energy 284.6 eV. The peak is associated with hydrocarbon atoms. When an additional PEGDE modify layer (2.5 nm) was inserted on the surface of the HY-PPV layer with Al, the C1s peak at 288.6 eV grew. PEGDE is a polymer with the same sequent carbon-oxide functional group like PEG, (-CH₂CH₂O-)_n, so a chemical reaction between the lone-pair electrons and Al in the oxygen atoms of the PEGDE chains was expected. The C1s diagram at 288.6 eV is related to the formation of the organic oxide/Al complex. Due the former results, we expect that PEG would react with Al and we can get the information from the XPS measurement.

Figure 3.8 Basic components of monochromatic XPS system.

[Adapted from http://en.wikipedia.org/wiki/X-ray_photoelectron_spectroscopy ]

Figure 3.9 XPS C1s spectra of pristine HY-PPV (◇), HY-PPV / Al (●), and HY-PPV / PEGDE / Al [58].

Chapter 4 Results and Discussion

4.1 Characteristics of Device Electrical Properties 4.1.1 The Effect of Molecular Weight of PEG

We measured these devices prepared with various molecular weight of PEG in a N₂-filled glove box, where the concentrations of O₂ and H₂O were less than 1 ppm. Figure 4.1 illustrates the ID-VD electrical properties of these devices. Figure 4.1(a) shows the characteristic of pristine 1wt% PCBM device. From 4.1(b)-(f) represent the devices prepared whose molecular weight (M.W.) was with PEG 400, 1000, 3000, 8000, and 20000, respectively. All the weight ratio of PEG:PCBM is 1:20. The device with pristine PCBM has the lowest drain current in the saturation regime, and the device prepared with PEG 20000, meaning the M.W. was 20000 had a three-times higher drain current than that of pristine PCBM TFT. We can find that when the larger molecular weight of PEG blending, we could get higher drain current.

The ID-VG characteristics are shown as Figure 4.2. The data shown in Figure 4.2 were measured at V_D = 60V and V_G was swept from -20 to 60 V. Furthermore, the electron mobility was calculated from slopes of square root of drain current versus gate voltage in the saturation regime [Figure 4.2(b)]; the important electrical characteristic parameters were summarized in Table 4.1. The device prepared with PEG 20000 had higher on-off current ratio (4.1×10⁴), and exhibited a showed lower threshold voltage (-2.61V). The mobility (0.0440 cm²/Vs) also became three times larger then that of pristine device (0.0141 cm²/Vs). The value of electron mobility is comparable with that of the device made with a Cs₂CO₃ buffer layer on Al electrodes (0.0445 cm²/Vs) [37].

0 10 20 30 40 50 60

Figure 4.1 The ID-V_D output curves of (a) pure PCBM device, and device prepared with PEG (b) 400, (c) 1000, (d) 3000, (e) 8000, and (f) 20000, respectively.

Table 4.1 The parameters of the OTFTs with distinct PEG molecular weight (MW) blending measured in nitrogen filled glove box.

MW of PEG

4.1.2 The Effect of PEG Concentration

In this section, the effect of PEG concentration is investigated. Figure 4.3 illustrates the I_D-V_D electrical performances of different devices. Figure 4.3(a) shows the characteristic of pure-PCBM device. Figure 4.3(b) to 4.3(f) represent the output curves of the devices prepared with 1%, 5%, 8%, 11% and 16% PEG (M.W.=20000), respectively. From the figures, we can find that the saturation drain current increased with increasing PEG concentration. However, while the weight ratio of PEG excess 5 wt%, the value of saturation drain current became lower as shown from Figure 4.3(d) to 4.3(f).

The I_D-V_G transfer characteristics are shown in Figure 4.4. All the devices were measured at V_D = 60 V and V_G bias was swept from -20 V to 60 V. The threshold voltage extracted from square root of drain current versus V_G shifts negatively due to the higher ratio of PEG blending. The device with 5% PEG 20000 blending shows the best electrical performance. The other important electrical characteristic parameters were shown in Table 4.2.

36 8%, (e) 11%, and (f) 16% PEG 20000 blending, respectively.

-20 0 20 40 60 concentration of PEG 20000 blending.

Table 4.2 The parameters of the OTFTs with different ratio PEG 20000 blending measured in nitrogen filled glove box.

4.1.3 The Electrical Characteristics Measured in the Atmosphere

We try to measure these devices in ambient environment in which the relative humidity was about 60%. Figure 4.5 illustrate the I_D-V_D electrical output performances prepared without [Figure 4.5(a)] and with [Figure 4.5(b)] PEG 1500. The device with PEG1500 (5%) blending had much higher saturation drain current.

0 10 20 30 40 50 60 blending in the ambient environment.

Table 4.3 The comparison of transfer characteristics of the OTFTs measured in inert and

Pure (ambient) 3.19×10^-5 23.35 0.05×10⁴

PEG (inert) 2.64×10^-2 -0.74 1.2×10⁴

PEG (ambient) 2.04×10^-3 18.58 0.2×10⁴

Figure 4.6 shows the I_D-V_G transfer output performance and it suggests that the pure-PCBM OTFT showed a poor and unstable electrical characteristic in the ambient environment. On the other hand, the device with PEG shows a relatively higher drain current although it was still prepared lower than that of the device measured in an inert environment.

Table 4.3 summarizes the transfer performances of these devices in the ambient atmosphere.

For the device prepared without PEG, the threshold voltage shifted from 17.02 to 23.35 V and the mobility decreased from 1.4×10^-2 to 3.2×10^-5 cm²/Vs. After the addition of PEG, the threshold voltage shifted from -0.74 to 18.58 V and the mobility decreased from 2.6×10^-2 to 2.0×10^-3 cm²/Vs. The mobility of the pristine PCBM device encountered three order decay;

but the mobility of PEG 1500 device decayed by just one order of magnitude. Even though the performance measured in the ambient environment was still decayed, PEG blending in active layer might be a good method to protect the channel.

-20 -10 0 10 20 30 40 with and without PEG blending in ambient environment.

4.1.4 The Effect of PEG on the Devices Fabricated on PVP/SiO

₂

Substrate

We measured the devices prepared with PCBM/PEG 400 composition fabricated on PVP/SiO₂ substrates. Figure 4.7 illustrates the I_D-V_D electrical performances measured in inert environment. The device with pristine-PCBM has lower drain current in the saturation regime. The device with PEG blending has two times higher drain current than that of pristine-PCBM OTFT. The data shown in Figure 4.8 were measured at V_D = 60 V, and V_G bias swept from -20 to 60 V. The device prepared with PEG 400 had higher on-off current ratio (9.0×10³), and then showed large threshold voltage shift (from 31 V to 5 V). The other important extracted parameters were summarized in Table 4.4.

0 10 20 30 40 50 60

Figure 4.7 The I_D-V_D output curves of the OTFTs prepared (a) without, and (b) with PEG 400 on PVP/SiO₂ substrates.

-20 0 20 40 60 without PEG blending on PVP/SiO₂ substrates.

Table 4.4 The parameters of the OTFTs prepared with and without PEG blending on

We further measured these devices seven times after first test. Interestingly, the electrical performances of pure PCBM OTFT decayed strongly and fast. After the addition of PEG 400, the device became more robust. The V_ON shifts of the devices with and without PEG blend were 16 and 8 Volts, respectively, and the loss of saturation drain current at V_DS = 60V with and without PEG blended were 19 and 69 %, respectively. PEG molecular perhaps play a role

to improve the stability. The detailed data are shown in Table 4.5 (pure PCBM) and 4.6 (PEG blended).

Table 4.5 The continuous measurement parameters of the pristine PCBM OTFT on PVP/SiO₂ substrates in N₂-filled glove box.

Measurement PVP/SiO₂ substrates in N₂-filled glove box.

Measurement

4.2 Morphological Analysis of the Active Films

The height-mode images of the PCBM films prepared with different molecular weight of PEG were displayed in Figure 4.9. Figure 4.9(a) showed the image of pristine-PCBM film deposit on a PVP film. Figure 4.9(b)-(f) represent the images of the films prepared with PEG 400, 1000, 3000, 8000, and 20000, respectively. All the blending ratio of PEG:PCBM was 1:20. The data scale is 7 nm. The film containing no PEG exhibits a smooth surface morphology. After blending 5% PEG into the film, "holes-like" images was present on the surface of the film. When increasing the PEG molecular weight, much more holes emerged.

The 5% PEG 20000 blending sample covered a biggest area. Because the concentration of the PEG is 5%, we would not expect the PEG phase to cover the whole surface. Therefore, we suspect that the distribution of PEG molecules was uneven and that phase separation in a direction normal to the substrate occurred in the thin films.

Although the PEG molecular did not cover the entire area, the chemical reactions between the Al atoms and PEG molecules of the partially regimes were sufficient to decrease the charge injection barrier. In summary, we have found that the positive relationship between the hole numbers and electron mobility as shown in Table 4.7.

Table 4.7 The relationship between hill numbers and mobility with distinct molecular weight (M.W.) of PEG.

M.W.

(g/mol)

Pure 400 1000 3000 8000 20000

Hole

(numbers) 0 35 50 80 130 170

Mobility

(cm²/Vs) 0.0141 0.0245 0.0264 0.0285 0.0376 0.0440

(a) (b)

(c) (d)

(e) (f)

(a) (b)

(c) (d)

(e) (f)

Figure 4.9 The height-mode images measured by AFM :(a)pristine PCBM, (b) to (f) PEG 400 (5%), PEG 1000 (5%), PEG 3000 (5%), PEG 8000 (5%), and PEG 20000 (5%), respectively.

4.3 Analysis of Device Resistances

The linear regime was used to extract the device resistances by transfer line method (Figure 4.10) [47]. At the linear regime, the drain bias ranged from 0 to 4 Volts for getting linear current-voltage property, and the gate bias were 30 and 60 Volts, respectively.

-50 0 50 100 150 pristine-PCBM; (b) with PEG 20000 (5%).

Table 4.8 Resistance analysis of PEG molecular weight.

PEG

From Figure 4.10, the parasitic resistance can be extracted by the y-axis intercept. We can separate the parasitic resistance into two parts: contact and bulk resistance. The contact resistance decreased significantly after the addition of PEG (5%) into active layer (22.4 to 1.7 MΩ). However, the bulk resistances are almost no difference in all devices (~3 MΩ). From the slope, we can extract the channel resistance. The channel resistance at V_G=60V also decreased after the addition of PEG (5%) into active layer (0.18 to 0.09 MΩ/μm). The device resistances of different PEG blended are summarized in Table 4.8.

Table 4.9 Resistance analysis of PEG blending ratio.

PEG 20000

A low ratio of PEG present in active film (1 to 11%) can efficiently decrease the contact resistance. When 16% PEG blended into active layer, the bulk resistance increased abruptly (3.4 to 31.1 MΩ) and the channel resistance also increased (0.18 to 0.96 MΩ). The effect is attributed to the fact that too much PEG molecules would decrease the conductivity of active film. The device resistances of different PEG ratio are summarized in Table 4.9.

The decrease of the potential drop across the organic-metal interface probably change the distribution of the electric field in the vertical direction, which my influence the values of VT.

In principle, the higher the contact resistance, the larger the V_T will be. Therefore, the decrease of contact resistance not only increased the mobility of the device, but also improved the threshold voltage. The positive relationship is shown in Table 4.1 and 4.2.

From the analysis of contact resistance, we believe that there are chemical reactions between PEG molecules and Al atoms, and these reactions may modify the contact between the metal electrodes and the active layer.

4.4 The Analysis of XPS Measurements

From Figure 4.12, we can see a main peak at a binding energy 284.5 eV. The lines with square and circular solid dots represent PCBM thin-film prepared without and with PEG 20000 (5%), respectively. The C1s spectra from 288 to 284 eV of pure PCBM/Al film is narrower than the polymer film with PEG blending due to the increasing C-O bonds.

Another peak around 289.5 eV is observed in the PCBM:PEG/Al sample. The extra peak is associated with the formation of the organic oxide/Al complex [58]. We can conjecture that there are some chemical reactions between PEG and Al atoms and the interaction can decrease the charge injection barrier and also increase the injection current.

295 290 285 280

0.2 0.4 0.6 0.8 1.0

289.5 286.0

284.5 N o rm a li ze d C o u n ts ( a .u .)

Binding energy (eV)

PCBM/Al

PCBM & PEG/Al

Figure 4.11 The C1s XPS spectra of PCBM/Al with and without PEG.

Chapter 5 Conclusion and Future Work

5.1 Conclusion

We have demonstrated that the mobility, threshold voltage, and on-off ratio can be improved by blending PEG into the semiconducting layer for n-channel OTFTs. We do not need another fabrication steps to modify or protect the PCBM. This enhancement was due to

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