Organization

The rest of the thesis is organized as follows. Chapter1 of the article is a review of the literature. This is followed by the method of studying discrete models for chaos. The Chapter3 section describes the design of chaos generator and analysis of stability. The results for the simulation analysis are presented in the fourth section. Finally, conclusions are presented and suggestions are made for further research.

Chapter2

Basic Theory of Boost Converter and Chaos

2.1 State Analysis of Boost Converter

DC-DC Converters are widely used in regulated switch-mode dc power supplies. The input to these converters is an unregulated dc voltage obtained by rectifying the line voltage;

therefore it will fluctuate due to changes in the line-voltage magnitude. Switching DC-DC converters are used to convert the unregulated dc input into a controlled dc output at a desired voltage level.

In DC-DC converters, the average output level can be adjusted to a desired value when input or output loading is varying. Switch-mode conversion concept can be illustrated with Fig.2-1(a). The average output value Vo depends on to and toff in Fig.2-1(b).

v

o

T Vd

Vo

t

t

^on _toff

Fig.2-1(a) Switch-mode DC-DC conversion(b)The average output value V_o depends on t_o and t_off

DC-DC converters have many types and wide applications including step-down converter, step-up converter, buck-boost converter, Cuk DC-DC converter, full bridge DC-DC converter, etc. In this thesis, a boost converter in Fig.2-2 is employed as the main system.

Therefore, the following will expound the fundamental theorem of the boost converter.

Fig.2-2 Boost Converter circuit

For a boost converter, as the name implies, the output voltage is always greater than the input voltage. When the switch turns on, the diode is revered biased, so isolating the output stage. The input saves energy in the inductor. However, when the witch turns off, the output stage receives energy from the inductor as well as from the input.

2.1.1 Continuous Condition Mode(CCM)

When system is in steady state and the inductor current is all greater than zero, the

system operates in continuous condition mode. In Fig.2-3(a), when the switch turns on, the inductor voltage , and the inductor current increases linearly. Besides, the

iL

E

v_L = i_L

capacitance discharges to the resister. In Fig.2-3(b), when the switch is off, the inductor voltage increase , and the input voltage and the inductor voltage charge to the capacitance. Besides, the inductor current decreases linearly.

o

L E v

v = −

iL

i

L

v

c

ⁱ

^L

L

-+ v + v

_L

-v

c

v

o

v

_o

+ +

− −

(a) (b)

Fig.2-3 Boost converter circuit states (a)switch is on (b)switch is off

t

vL

E

v

o

E −

I

L

iL

t

t

on ^toff

T s

On

Off

Fig.2-4 Waveforms of voltage and current of inductance

In steady state, because the average value of the inductor voltage at one period is zero, therefore,

(2.1)

So, the relation of the output voltage and input voltage is

D

If the circuit is lossless,

o

2.1.2 Boundary between CCM and DCM

When the inductor current is just equal to zero at end of at a period, the boundary between continuous condition mode and discontinuous condition mode is happened.

t

off

Fig.2-5 The inductor current at the boundary In Fig.2-5, the average value of the inductor current at the boundary is

s

Therefore, if a boost converter is operated in CCM, the condition is as

)2

2.1.3 Discontinuous Condition Mode(DCM)

From (2.10), if is less than , the system is operated under discontinuous condition mode. Fig.2-6 are series of its illustration that there are three conditions at a period under DCM. The first duration is when the switch is on and the diode is off.

L L_B

three circu

Ts

The second duration is D₂T_s when the switch is off and diode is on, and the inductor current is zero. The third duration is D₃T_s when the switch and the diode are off. All of the above have shown the relation of D₁, D₂,D₃ as:

2 1

1+ D <

D (2.11)

3 1

2

1+D +D =

D (2.12)

(a)The witch is on, the diode is off

(a)The witch is off, the diode is on

(c) The witch is off, the diode id off

Fig.2-6 The cir DCM

v

L

v

L

v

c

v

c

v

o

v

o

v

L

v

c

v

_o

cuit the boost converter operates under

According as the integral of the inductor voltage over one time period to zero,

Therefore, from (2.13),

2

If the circuit is lossless,

2

Fig.2-7 The inductor current under DCM From Fig.2-7, we can get:

2 ) 1 1 )(

(

2 1 1

2 L

RT D RT

D

D L ^s

s

+ +

=

(2.18)

Therefore, (2.18) shows that change of , is relative to loading under DCM.

Compared to the condition under DCM, the duty ratio in CCM is simpler.

1 2

D D

2.2 Analysis of Discrete Model

The discussion of the chaotic phenomenon of DC-DC converters starts from the modeling of chaotic systems. Chaos and quasi-periodicity are difficult to identify using standard time-domain simulations or frequency-domain measurements. They are usually identified by bifurcation diagrams. In order to capture a certain bifurcation diagram by means of simulation, we need to devise an elaborate procedure which may require the use of specific computational techniques. Some papers have proposed that the discrete modeling is suitable to observe the phenomenon of chaos[24-26]. Before describing the discrete modeling, some expressions are introduced.

2.2.1 Sampled Data

Several discrete time maps have been defined to develop the analysis of nonlinear phenomena in power electronics. The stroboscopic and the S-switching maps have been mostly used in converters. The S-switching map is sampled when a switch changes. Since the

samples of S-switching map are rare, the skipped cycle is ignored. The stroboscopic map is the most widely used discrete time model for DC-DC converters. This map can be obtained by observing the system dynamics every T seconds. Fig.2-8 and Fig.2-9 show the sampling types of waveforms under voltage and current modes respectively.

Stroboscopic Map S-switching Map

Skipped cycle

Fig.2-8 Sampling Types of control voltage and ramp waveforms under voltage mode control

Fig.2-9 Sampling Types of the desired level and inductor current under current mode control

T

Iref

−2

tk t_k−1 t_k t_k+1 t_k+2 t_k+3 t_k+4

−2

tn t_n−1 t_n t_n+1 t_n+2 − t_n+3

Skipped cycle

i L

S-switching Map

dT

Stroboscopic Map

In this study, the model is built by the stroboscopic map. For periodical systems, like most of the fixed frequency switching converters, information can be easily obtained by sampling waveforms at constant intervals. Fig.2-10 illustrates how this sampling process reveals the periodicity of waveforms at period-1 and period-2 states by the stroboscopic map.

Fig.2-10 Waveform sampled at constant intervals giving (a)one fixed point(b) two fixed

2.2.2 Mapping

From Figure Fig.2-11, a mapping is a mathematical function that takes each point of a given space to another point. If a certain point in the space maps to itself, it is said to be a fixed point. A mapping that converts a point in the n-dimensional real space

points.

F R to ⁿ

another point in the same space can be written where is a nonlinear transformation, and

n

n R

R

F: a , F

R is an n-dimensional space. In functional notation, n

, where here x_n is the state variable. In this thesis, F is a discrete model of a converter.

Fig.2-11 Illustration of a discrete mapping

2.2.3 Phase Portrait and Attractor

Suppose that the discrete model of a system is available. We can iterate the map starting from any initial condition and plot the discrete time evolution in the 2-D state space. The picture obtained is called a phase-portrait of the system. It can be a point, or region of the state space. If an initial condition is placed outside this region, in subsequent iterations of the map it moves to the set of points shown in the figure. If points in the state space are attracted to this region in the state space and in this sense the region shown in the figure is called an attractor. We can judge what state the system is by phase portrait and attractor.

Fig.2-12 from [26] presents a phase portrait of the converter at obtained from simulation. Because there are many attractors in Fig.2-12, it is under chaos state.

V E 35=

Fig.2-12 The phase portrait of the buck converter E 35= V

2.2.4 Bifurcation Diagram

The purpose for using bifurcation diagram is that operating state can be observed easily.

In a bifurcation diagram, the characteristics of bifurcation for a system are exhibited by some parameters varying. For example Fig.2-13, most bifurcation diagram consists of an x-y plot, where sampled data are plotted against the chosen parameter.

Fig.2-13 The bifurcation diagram of output and the parameter E

2-3 Model of a Boost Converter with Peak Current Control

The discussion of the chaotic phenomenon of DC-DC converters starts from the modeling of chaotic systems. Chaos and quasi-periodicity are difficult to identify using standard time-domain simulations or frequency-domain measurements. They are usually identified by bifurcation diagrams. In order to capture a certain bifurcation diagram by means of simulation, we need to devise an elaborate procedure which may require the use of specific computational techniques. Some papers have proposed that the discrete modeling is suitable to observe the phenomenon of chaos[24-26]. Before describing the discrete modeling, some expressions are introduced.

As the above-mentioned expression, a model of a boost converter with peak current control in CCM mode is discussed in the following example. First, we must build a formula for a boost converter. Fig.2-13 presents the conditions of different switch states for a boost converter. In Fig.2-13, we assume that the switch is on when , and the switch is off when . Besides, we assume the state variable are and . In Fig.2-13(a), when the switch is on, the behavior of the circuit is as:

n t tn

From (2.20), whent=t_n^', the following expression can be yielded:

)

In Fig.2-13(b), when the switch is off, (2.21) can be as the initial state in the mode and the following expression can be yielded:

]

In the open loop for a boost converter under current mode control, the control parameter of interest is the reference current . Furthermore, duty ratio d is a main factor for

controlling output voltage, and presents the iteration parameter of . Therefore, the relation between and can present in following expression:

Iref

So the discrete model of the boost converter in open loop is

(2.26)

Table 2-1

L C R fs Iref

E

m

1 120u 20 10k 0.7~1.6 4

We define a set of specification in Table 1 and employ the Matlab tool to iterate (2.26). When varies, the sampled data of the inductor always change, too. The bifurcation diagram is presented in

Iref i_L

Fig.2-. We can find the way from a period-1 to chaos. When , the system operates under period-1 state. When , the system is under the period-doubling state. Finally, when the reference current increases up to a level,

, operating state can not be judged. We define the state to be a chaos state.

A I_ref ≤0.87 A

I_ref >0.87

Iref

A I_ref >1.52

Fig.2-14 The bifurcation diagram of the boost converter byI_ref varying

Chapter3

Design of Converters with Chaos Generator

Compared to the Chua’s circuit [22, 23], we propose a circuit as a chaotic generator. It is similar to that discussed in[27] for the theory . It does not involve any inductor like other popular chaos generator architectures such as Chua’s circuits; hence, it is particularly compatible to fully analog on-chip realization

3.1 Modeling of Chaos Generator

Fig.3-1 Schematic of chaos generating circuit

Fig.3-1 shows the schematic of simple chaotic generator. The circuit mainly consists of a

DC voltage, two resisters, two switches, a comparator, a reference voltage, and a R-S latch.

The process is controlled by a set-rest latch. The clock signal is an impulse train at frequency

f_c=T1. The impulse train is using a periodic waveform with a period T and a low duty cycle. Firstly, when clock generator sends a high level signal to R edge, Q edge is on high level and drives the switch1. The capacitor is charged by a voltage source through a resister . In addition, the comparator provides a high level signal and sends to S edge when the capacitor voltage reaches a reference voltage which is a desired value.

Therefore, sends a high level signal and makes the switch2 turn on. The capacitor is discharged to ground through a resister . Because of the motion of the switches turning on and off repeatedly, a signal of charging and discharging is produced.

C V_s

R1

VR

Q C

R2

Fig.3-2 shows the derivation of the capacitor voltage. When the switch1 is on, the switch2 is off. Thus, the capacitor is charged. The behavior of the circuit is as

R1

When the switch2 is on, the switch1 is off. So, the capacitor is discharged. The behavior of the circuit is as

1

Fig.3-2 The derivation of the capacitor voltage

In order to build a model of the circuit, we employ stroboscopic map to describe the behavior of the circuit. First of all, as shown in Fig.3-2, we define a borderline voltage and which is the value of at . When , the capacitor charges for a time and is smaller than a period

(3.4)

V b

V n v(t) t_n V_n >V_b t , _n1

n1

t T . On the other hand, whenV_n<V_b, the capacitor charges and

the waveform has no effect on the next clock pulse until the . The time is over a period

VR t_n1

T .

3.3), assuming that

From ( t =t_R, t_n1 =t_R −t_n, we can calculate thet_n1as

Therefore, when v_c(n)>V_b, the next sample value of the capacitor voltage is as

Therefore, from (3.7) and (3.8), the stroboscopic map of the system is as:

⎪⎪

3-2 Simulation of Numerical Analysis

Fig.3-3 The circuit frame of the new chaos generator

Fig.3-3 is the circuit frame of the new chaos generator. The circuit parameters are listed in Table 3-1. Based on the iterating map from (3.9), we can generate the bifurcation diagram handily and fast. By controlling the as the bifurcation parameter, we periodically collect the discrete-time values of with the initial transient discarded. Thus, we have one set of data for each value of

Vs

vc

Vs. A bifurcation diagram can then be constructed after a sufficient number of data sets are obtained as shown in Fig.3-4.

Fig.3-4 presents the results of the way from period-1 to chaos. The relationship of system states and controlling parameter V_s is shown in Table 3-. It is worth noting that the circuit generates chaotic signal when V_s is less than11.7V from Table 3-. Moreover, the waveforms of different states in time domain are shown in Fig.3-5.

Table 3-1 The specifications of the boost converter

V^s V^R C R¹ R² T 15~7V 5 1uF 200 100 1/100K

Table 3-2 The relation of operating states and V_s

Vs State

V 28 .

>14 Period-1

V V ~14.28 65

.

13 Period-2

V V ~13.68 71

.

11 Period-4

V 71 .

<11 Chaos

Fig.3- 4 Bifurcation Diagram of the Chaos Generator

(a) Period-1 (V_s=14.29V)

(b) Period-2 (V_s=14V)

(c) Period-4 (Vs=12V)

(d) Chaos (V_s=10V)

Fig.3-5 The waveforms of different states in time domain

3.3 A Current-Controlled Boost Converter without Chaos Generators

Fig.3-6 blocks of the close loop circuit with constant frequency signal

In order to introduce DC-DC converters with chaos generators, we firstly describe an

operating condition of a boost converter without chaos generators. The system consists of a DC-DC converter, a compensator, a current modulator, and a PWM modulator. Fig.3-6 shows the blocks in close loop. When the system is at transient state, the output voltage and reference voltage are always adjusted to the desired voltage level. The error signal produced by the output voltage and reference voltage passes through the compensator which makes system operate stably in period-1 state. A signal from the compensator becomes a peak level of the inductor current to control the inductor current in current modulator block. Finally, in the driving circuit block, a S-R flip-flop is controlled to generate a switch signal by the constant frequency clock signal and the modulation signal. By adjusting the output voltage continuously, a set of switching signals are produced to make the system stay in steady state.

When duty ratio is small than 0.5 in peak current control, it is stable in period-1 state.

Therefore we assume a specification of a boost converter operating in the period-1state:

5

In addition, the simulations will be shown in Chapter 4.

3.4 A Current-Controlled Boost Converter with Chaos Generators

Fig.3-7 blocks of the close loop circuit with chaotic signal

Switch signal

Chaotic signals Error signal Inductor current

(a)

Error signal Inductor current

Chaotic signal

Switch signal

(b)

Fig.3-8 The behavior of driving circuit (a) the circuit of S-R flip-flop(b) the signals of driving circuit

Compared with Fig.3-6, the main point in Fig.3-7 is the block of driving circuit. A set of chaotic clock signals and modulation signals are used for a S-R flip-flop. In Fig.3-8(a), because the signal of S-R flip-flop can control the switch to turn on: therefore a system can be operated to be under the chaos state when the signal of S-R flip-flop is chaotic. It is worth noting that the switch is still to be on when the inductor current charges and

Q

S

R

signal have a pulse at that time. Fig.3-8(b) illustrates the behavior of driving circuit.

3.5 Analysis of Stability of a Boost Converter with Chaos Generators

Because important point is stability for a DC-DC converter, therefore we analyze the stability of a boost converter with chaos generator in the section

3.5.1 The Clopes of Charge and Discharge of an Inductor Current in a Boost Converter under Current Mode Control

Fig.3-9 Inductor current waveform of the boost converter under current-mode control

Fig.3-9 presents the behavior of the inductor current waveform of the boost converter under current mode control. When the inductor charges, the slope of the inductor is yielded:

1

Where I_ref is a reference current, Eis the input voltage. When the inductor discharges, the

slope of the inductor is yielded:

2

When the system is in the steady sate, the is constant. Therefore, from (18) and (19), is constant in the steady state.

vc

1and

m m₂

3.5.2 The Influence of the Gain of PWM Circuit and Current Modulator

Fig.3-10 Block diagrams of a close-loop for a power converter with current control

In the beginning, we must analyze the influence of the gain of driving circuit and current modulator when the clock signal is varying. Fig.3-10 presents block diagrams of a close loop for a power converter with peak current control. It must be noted for the gain of PWM

modulator and current modulator. Fig.3-11 analyzes in detail the influence. There are an

inductor current in the steady state, the rising slope of an inductor current, duty ratios, different currents ,the reference currents , , and varying frequency clock signals in

Fig.3-11. The relations of duty ratio and the difference of reference current are presented in the following expression:

ref1

When the system is in the steady state, the slopes of charge and discharge of an inductor current are constant. Therefore, (3.13) and (3.14) depict that the gain are not affected in despite of the varying frequency of clock signals.

Fig.3-11 The inductor current waveform for different reference currents

3.5.3 Analysis of Period-1

Fig.3-12 The inductor current waveform in period-1

Fig.3-12 indicates the behavior of an inductor current in steady state under period-1 state.

We assume the duty ratio D and period T are as:

In addition, because of the slopes of charge and discharge for an inductor current, we can define the peak-to-peak value of the inductor current isΔI. Thus the slope of charge and the slope of discharge are as:

1 2

2

1 m m

D m D

−

=

= (3.20)

3.5.4 Analysis of Period-2

i L

DT

T

T D) 1 ( − ΔI

m2

Iref

Clock

m1

Fig.3-13 The inductor current waveform in a period T

Fig.3-14 The inductor current waveform in period-2

Before analyzing the condition under period-2 state, we discuss the relation of the

peak-to peak value of the inductor current and a periodT . From Fig.3-13, (3.18) and (3.19),

Because the clock frequency becomes slower, the duration that an inductor current charge and the period of an inductor current is in the period-2 state. Fig.3-14, we assume the relation of duty ratioD^', a period T , and duty ratio in the period-2 state are as: ^'

So, the average duty ratio in period-2 state is as:

Fig. 3-15 The waveform of Q signal in period-4 state

Because clock signal is mainly generated by Q signal ,we observe the Q signal by chaos signal. From Fig.3-15, because the quality of chaos, a small difference causes period-2 state to be period-4 state.

Fig.3-16 The inductor current waveform in period-4

Fig.3-16 presents the inductor current waveform in period-4 state. We define a period in the period-4 state asT₁^''+T₂^'', whereT₁^'' =T^'+δ, T₁^'' =T^'−δ and δ have small differences.

The dotted line presents the inductor current in the period-2 state and the solid line presents

The dotted line presents the inductor current in the period-2 state and the solid line presents

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