Organization of the Thesis

In the following sections, we will show our research efforts.

In Chapter 2, the electrical characteristics and fabrication processes of poly-Si TFTs with Argon ion implantation will be proposed. Experimental results reveal that the performance and reliability of our devices have remarkable improvements in comparison with conventional TFTs. Additionally, we make a detail discussion to explain the results of experimental.

In Chapter 3, the fabrication processes and electrical characteristics of Floating channel polycrystalline silicon thin-film transistors will be proposed. Experimental results reveal that poly-Si TFTs with floating channel have better performance than the conventional TFTs. Then, we will make a complete discussion about the electrical characteristics of poly-Si TFTs with floating channel.

In Chapter 4, he fabrication processes and electrical characteristics of TFTs with SPC poly-Si nanowire (NW) channels fabricated by a novel sidewall spacer technique will be proposed. Experimental results reveal that poly-Si TFTs with NW channel fabricated by a novel sidewall spacer technique is simple, low-cost, process-compatible with modern semiconductor manufacturing processes and has good electrical characteristics. Then, we will make a complete discussion about the

electrical characteristics of our devices.

At the end of this thesis, we will make a conclusion in Chapter 5.

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Chapter 2

The Study of Ar Ion Implantation to Enhance Solid Phase Crystallization in Poly-Si TFTs

2.1 Introduction

Solid-phase crystallization (SPC) of amorphous silicon (a-Si) has been attracted many interests for the application of polycrystalline silicon thin-film transistors (poly-Si TFTs) in active-matrix-liquid-crystal displays (AMLCDs) [1][2]. In these applications, the electrical characteristics of poly-Si TFTs are strongly dependent on the microstructure of poly-Si film. In particular, grain boundaries and intragranular defects which act as scattering centers and midgap traps are known to affect the carrier transport properties [3]. Unfortunately, the conventional SPC methods acquire an interface-nucleation mechanism which has a nucleation of Si atoms from bounded a-Si film interface (a-Si/SiO2) in the initial stage and therefore lead to smaller grain size[4]-[6]. To date, various techniques based on novel surface-nucleation SPC kinetic such as utilizing the oxygen blowing process during the initial deposition of a-Si [7], and deposition of a-Si bilayer structure with different concentration of oxygen [8]

were proposed to improve the crystallinity of SPC poly-Si film by initiating the nucleation of Si atoms from the free top surface of a-Si film, leading to larger grain size. Recently, I. W. et al.[9] has proposed another concept about retarding the Si nucleation at the interface of a-Si/SiO2 by deep Si ion implant into a-Si. The interface-nucleation rate decrease was due to the implant-induced recoiled-oxygen at the interface of Si/SiO2. Among aforesaid process, a oxygen-rich layer is introduced at

the interface of Si/SiO2 by different methods It is well known that oxygen atoms will hinder solid-phase-epitaxy regrowth rate in the epitaxy Si regrowth [10]. Therefore, the presence of oxygen atoms at the interface can prohibit the interface-nucleation rate.

The above-mentioned methods are practical for grain size enhancement of poly-Si film, but they have not been successively adopted for TFTs fabrication.

In this paper, we propose a novel surface-nucleation SPC scheme with the grain size enhancement is achieved by deep heavy Argon ion implantation located beyond the a-Si/SiO2 interface prior to solid-phase-crystallization to further improve the poly-Si crystallinity and the therefore enhance the performance and reliability of poly-Si TFTs.

2.2 Experimental

The self-aligned top-gated n channel poly-Si TFTs with Argon ions implantation were investigated in this study. Fig. 2-1 show the process flow and cross-sectional view of the investigated poly-Si TFT. A 100-nm-thick undoped amorphous silicon (a-Si) film was deposited on a 500-nm-thick oxide-coated Si wafer by low pressure chemical vapor deposition (LPCVD) system at 550°C. Then, Argon ions were implanted into the a-Si film. The ion implantation dose was 1×10¹² cm⁻², an accelerating energy of 90 keV, and tilt angle of 7^o, respectively. The projection range of Argon ions was located beyond the interface of a-Si/SiO2 and the implantation was performed without any pad oxide on a-Si. The Ar-implanted a-Si film was then recrystallized at 600°C for 24 hrs in N2 ambient. After crystallizing the a-Si film, the active region was patterned by photolithography and plasma etching. A 50-nm-thick tetraethylorthosilicate (TEOS) gate oxide and a 200-nm-thick poly-Si gate electrode were successively deposited by LPCVD system. After patterning and plasma etching

of gate electrode, phosphorous ions were used as the self-aligned source/drain and gate implantation with the dosage and energy of 5x10¹⁵ cm⁻² and 40 keV, respectively.

Then, a 400-nm-thick SiH4 based passivation oxide was deposited by plasma enhanced chemical vapor deposition (PECVD) at 300°C. After the deposition of passivation oxide, the source/drain and gate region were activated at 600°C for 12hrs in the N2 ambient. Then, the contact hole was then defined and etched by buffer oxide etching (BOE) solution. The aluminum (Al) electrode layer was deposited, patterned, and etched to form the metal pads. Finally, all devices were performed with a NH3

plasma treatment at 350°C for 30 min before measurement. The conventional poly-Si TFTs without Argon ions implantation were also fabricated for comparison.

2.3 Results and Discussion

The bird-eye-view scanning electron microscopy (SEM) image of a secco-etched poly-Si film is shown in Fig. 2-2 which apparently reveals a large difference in grain size for Argon-implanted and conventional devices. A better crystalline poly-Si film with larger grain size and lower intragrainular defect is found in the Argon-implanted sample. The possible reasons for the better poly-Si crystallinity for Argon-implanted poly-Si film are as follows: When implanting heavy Argon ions into the a-Si film with the projected range located beyond the a-Si/SiO2

interface which may induce implant-recoiled oxygen atoms from the SiO2 substrate to accumulate at the interface. The presence of recoiled-oxygen atoms is believed to decrease the interface-nucleation sites of Si grains at the interface. Therefore, when reducing the nucleation sites at the interface of Si/SiO2, the Si atoms will nucleate from the free top surface of a-Si film. Because the interface Si atoms are bounded to underlying SiO2, the crystallization-generated rearrangement and volume shrink of Si

atoms will cause many stress-induced defects in conventional interface-nucleation scheme. However, the crystallization-induced stress can be easily relieved from the surface-nucleation scheme in the Argon-implanted sample. XRD patterns of the poly-Si film for Argon-implanted and conventional samples after SPC annealing are shown in Fig. 2-3. The dominant polycrystalline structure is Si (111) and Si (220) preferred orientation. This result is consistent with that reported by Aoyama et al. [11].

The average grain size can be calculated from the full width at half maximum (FWHM) of the Si (111) peak. The XRD pattern shows that the Argon-implanted sample obviously has sharper and higher XRD intensity in both Si (111) and Si (220) preferred orientation. Therefore, the result further prove that better crystallinity of poly-Si film with larger grain size and fewer intragranular defects can be formed.

Fig. 2-4 shows the typical transfer characteristics for Argon-implanted and conventional TFTs at drain bias of 0.5V and 5V. The devices have a nominal channel length (L) of 10 um and a channel width (W) of 10 um, respectively. The maximum on-current and minimum off-current are both defined at drain bias of 0.5V.

Threshold voltage is defined as the gate voltage required to yield a normalized drain current of IDS = (W/L) × 100 nA at Vd = 0.5V. Distinct improvement in devices characteristics are acquired for Argon-implanted TFTs. The measured and extracted key devices parameters, including threshold voltage (Vth), subthreshold swing (S.S.), field effect mobility (uFE), maximum on-current, minimum off-current, and on/off current ratio are summarized in Table 2-1.

Consequently, the performance of Ar-implanted TFTs is significantly improved in Fig. 2-4 The Vth and S.S. of the Ar-implanted TFTs were found to be superior to the conventional ones. It is well-known that the Vth and S.S. are strongly affected by the deep trap states originated from the Si dangling bonds [12]. Because Argon ion is

a noble gas which may not react with Si dangling bonds and contributes any dopant species, the improved performance may not derive from the Argon passivation effect of poly-Si trap states and dopant-.induced lower threshold voltage. Hence, using surface-nucleation SPC by heavy Argon ions implantation can improve the microstructure crystallinity of poly-Si film. Because of the better crystalline poly-Si film, the dangling bonds at the grain boundaries were reduced, effectively.

In addition, the off-state leakage current of the Argon-implanted TFTs was smaller than that of conventional ones. It is well-known that the leakage current was generated from the field-enhanced-emission via trap states near the drain depletion region under a high electric field. The better the crystallinity of poly-Si film, the fewer the trap states can be created. Hence, the leakage current under a high electric field can be reduced. Fig. 2-4 also shows the extracted field effect mobility calculated from the value of transconductance at VDS = 0.5 V. As we can see, the maximum field effect mobility for the Argon-implanted TFTs is higher than that for the conventional ones.

The Argon-implanted TFTs show approximately 70% improvement in field effect mobility. The main cause of the superior device performance for the Argon-implanted TFTs may be further attributed to the fewer Si-Si dangling boonds, and thus better crystalline poly-Si film can be formed.

Fig. 2-5 shows the typical output characteristics (IDS − VDS) at several different common gate drive for the Argon-implanted and the conventional poly-Si TFTs. As can be seen, the Argon-implanted TFTs exhibit a larger driving current capability than the conventional ones to further confirm that the whole channel region has fewer defect densities and larger silicon grain size in the Argon-implanted poly-Si film. Fig.

2-6 shows the grain boundaries trap state densities (Ntrap) extracted from the slope of ln(ID/VG-VFB) versus 1/(VG-VFB)² at low VDS and high VGS according to the

grain-boundary trapping model proposed by Levinson and Proano method [13][14]. It can be found that the Argon-implanted TFT exhibits a Ntrap of about 3.44 × 10¹² cm^-2, whereas the conventional one possess a Ntrap of 6.48 × 10¹² cm^-2. Our results further verify that Argon-implanted technique has reduced grain boundaries trap states in the poly-Si film due to the larger grain size.

Hot-carrier-stress was performed at VDS = 20V and VGS = 20V for 1000 s to examine the electrical reliability. The threshold voltage variations and the on-current degradation over hot carrier stress time are shown in Fig. 2-7 and 2-8, respectively.

Based on these experimental results, it was clearly observed that the VTH and on-current have more severe degradation due to the easy broken of Si–Si and Si–H bonds under serious hot carrier stress, causing the larger ∆VTH and ∆ION/ION

degradation in conventional TFTs. In contrast, the Argon-implanted TFTs have higher immunity against the hot carrier stress than conventional TFTs do It is well known that the VTH is strongly dependent on the deep trap states originated from the dangling bonds at the grain boundaries [12].. The significant enhancement in the electrical reliability can be ascribed to the better microstructure crystallinity of poly-Si film with reduced Si–Si and Si–H bonds at poly-Si grain boundaries in Argon-implanted device.

2.4 Summary

In summary, we have investigated the SPC of a-Si film with reduced nucleation sites created by heavy Argon ions implantation induced-recoiled oxygen rich region at the a-Si/SiO2 interface. It has been found that the interface-nucleation rate was suppressed, hence the microstructure quality of poly-Si films from fewer nucleation-sites seeded SPC of a-Si at 600^oC has been improved. A novel process compatible poly-Si TFTs with Argon-ion implantation is proposed. The field effect

mobility for Argon-ions implanted TFTs is higher than 46.06 cm²/Vs, which was superior to the conventional TFTs. In addition, the Argon-implanted TFTs can possess higher immunity against the hot carrier stress. It is speculated that the larger grain size of poly-Si film will result in fewer grain boundaries defects such as weak Si–Si and Si–H bonds. Fabricating poly-Si TFTs with Argon ions implantation improve not only the electrical performance but also the reliability. Furthermore, the manufacture process is simple and compatible with the conventional poly-Si TFTs fabrication processes.

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