Chapter 1 Introduction
1.4 Overview of Dissertation
Organic thin film transistors attracted many researchers and company to investigate and develop due to their future applications. Some main issues including low mobility, stability, and high operation voltage had been described above. In our work, we focus on developing and investigating low temperature and low cost processes to fabricate high quality silicon oxide as a gate insulator for OTFTs. Silicon dioxide is a kind of very cheap and rich resource in the world and used as main gate insulator for MOSFET. Band gap of silicon dioxide is about 9 eV which is good to be used as a gate insulator. In addition, good stability and reliability of silicon oxide were also proposed in many researches. The highest process temperature of OTFTs usually happened in gate insulator. So decreasing the processes temperature of gate insulator is very important for OTFTs due to the plastic substrate could not sustain high temperature. For the purpose of low cost and high throughput processes, atmospheric pressure plasma jet (APPJ) was utilized in this thesis. We controlled our processes temperature from room temperature to 200 oC. There are lot of advantages of APPJ such as low temperature, low cost, and high throughput.
Figure 1-9 shows the basic structure of atmospheric pressure plasma jet. Because APPJ could be operated in atmospheric pressure it is suitable for large area application which is very important for cost down.. Good quality of silicon oxide deposited by APPJ had been developed by us and leakage current density was
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suppressed below 1~2E-8 A/cm2 at 0.5 MV/cm in MIM structure. We controlled temperature, flow rate, gap distance, and main gas to improve the performance of silicon oxide which were all described in chapter 2. In addition, silicon oxide deposited with APPJ was successfully applied for the gate insulator of OTFTs. The thickness of our demonstrated silicon oxide is only 9 nm so the operation voltage of OTFTs was about -2 V. Threshold voltage is about 0.8 V, mobility is about 0.66 cm2/V-s, and subthreshold swing is about 0.6 V/decade in our proposed OTFTs. The detail fabrication and discussion of OTFTs were described in chapter 3. We found that higher molecular ordering of organic semiconductor would influence the leakage current of OTFTs. Many studies used surface treatment to improve the molecular ordering of channel layer and increase the mobility of OTFTs. However, leakage current of OTFTs was also increased after improving molecular ordering and this drawback was ignored. We used to contact structure of OTFTs to investigate and discuss this problem in this chapter 4.
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Figure 1-1 Flexible displays announced by LG.
Figure 1-2 Photo of OTFT-driven OLED display wrapped around a cylinder with 4 mm radius. (Sony Corp.)
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Figure 1-3 2T-1C OTFT driven OLED pixel design
Figure 1-4 Electronic artificial skin integrated pressure and temperature sensors.
Made by Prof. Takao Someya, University of Tokyo in Ref. [22].
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Source Drain
Active layer
Substrate Gate
Gate insulator
(a)
Substrate
Source Active layer Drain
Gate
Gate insulator
(b)
Figure 1-5 Top contact structure (a) and Bottom structure (b) of OTFTs
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(a)
(b)
Figure 1-6 Output (a) and transfer (b) characteristics of a typical OTFT. The inset shows the molecular structure of pentacene, which serves as semiconductor in the device.
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Figure 1-7 Schematic band diagram of gold and the energy of the frontier orbitals of pentacene. Data taken from Ref. 22.
Figure 1-8 Upper processing temperature of flexible substrate.
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AC Main Gas
Flow
Ar carrier gas
TEOS
Silicon wafer Hot
plate
Gap Distance
Figure 1-9 Schematic of the atmospheric-pressure plasma jet for the deposition of silicon oxide.
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Chapter 2
Factors for SiO2 Deposition by Atmospheric Pressure Plasma Jet
In this chapter, we aim at depositing high quality silicon oxide at low temperature by atmospheric pressure plasma jet (APPJ). First, we discussed the temperature influence on deposition of silicon oxide and defined the deposition temperature of silicon oxide. Second, because carrier gas’s flow rate may influence the deposition rate and the quality of silicon oxide, we discuss the flow rate of carrier gas in section 2-2. We also found that the gap distance between nozzle and sample surface and main gas would influence the deposition rate and quality of silicon oxide, discussed in section 2-3 and 2-4, respectively. Leakage current density of silicon oxide was used to determine the quality of silicon oxide in these discussion. To improve surface morphology was also a problem for SiO2 layer processed by APPJ. These pellets leading to large surface roughness would influence the characteristics of OTFTs.
Fortunately, the pellets and surface roughness can be modified by controlling temperature, carrier gas’s flow rate, gap distance, and main gas, discussed in following sections.
2.1 Effect of Growth Rate Influenced by Substrate Temperature on Different Substrate Materials
2.1.1 Introduction
Organic thin film transistors were usually to be fabricated on plastic substrate for
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flexible electronics application. Because the plastic substrate can not sustain high temperature processes, the development of low-temperature processed OTFTs are more and more important. As we known, to gain good film quality with a low leakage current, a high-temperature insulator activation is required. Therefore, it is very important to investigate low temperature processes for high-quality gate insulator. In this study, we are devoted to use atmospheric pressure plasma jet for depositing gate insulator material because APPJ could be operated at atmospheric pressure and lower temperature, which was suitable for large area and low cost application [1,2]. Also, APPJ has been used for surface treatments on many kinds of applications [3-5]. In order to deposit high quality silicon oxide, we tuned parameters to optimize the conditions for film deposition. The film quality and deposition rate could be influenced by substrate temperature, proposed by many studies. In this section, we will investigate the effect of substrate temperature during process and find out the best condition for TFT device fabrication. As we expected, a low leakage current density of 1E-7 A/cm2 at 0.5 MV /cm for silicon oxide deposited by low-temperature APPJ was demonstrated here.
2.1.2 Experiment
2-1-2-1 Silicon oxide MOS capacitors by APPJ
To simplify the process flow, the organic thin film transistors would be fabricated on silicon as a bottom substrate for basic electrical test [7-8]. The common metal insulator semiconductor (MIS) structure was utilized for the analysis of film quality deposited by APPJ and E-gun. First, a p-type silicon wafer used as the substrate was cleaned by RCA process to remove native oxide, particles, and contamination.
Sequentially, the TEOS was introduced by a carrier gas of argon to deposit silicon
22
oxide in a atmospheric pressure plasma jet (APPJ) system. The plasma power was set around 560 W with an appropriate scanning rate to deposit silicon oxide under a room-temperature and atmospheric-pressure environment. We can control the thickness of silicon oxide by tuning the scanning times. Finally, a 500 nm thick aluminum metal was deposited by thermal coater as the top contact electrode. The top electrode was defined by a shadow mask with an area of 250μm x 250μm.
2-1-2-2 Silicon oxide MIM capacitors by APPJ systems
Metal insulator metal (MIM) structure was adopted in this experiment shown in Figure 2-1-1. First, the 500 nm thermal oxide was grown on the p-type silicon substrate for isolation and followed by the 300 nm aluminum layer as the bottom electrode. After bottom contact formation, silicon oxide was deposited by APPJ with different substrate temperatures of 25 oC, 100 oC, 150 oC, and 200 oC, respectively.
Finally, the 300 nm aluminum layer were deposited for all samples by the shadow mask with a area of 250 μm x 250 μm.
2-1-2-3 Fabrication processes of organic thin film transistors (OTFTs)
The bottom contact structure was adopted to fabricate organic thin film transistor.
The structure of organic thin film transistor was shown in Figure 2-1-2. The 500 nm thermal silicon dioxide was grown on the top of p-type silicon wafer as the isolation layer. Gate electrode with a 100 nm thick aluminum layer was deposited by thermal coater and Source/ Drain electrodes with 50 nm thick nickel layer were deposited by E-gun. After that, the gate insulator of Silicon oxide with 60 scanning times by APPJ under an atmospheric pressure at 150 oC was covered. The 50 nm pentacene material obtained from Aldrich was evaporated by thermal coater. During deposition of pentacene active layer, the substrate was heated to 70 oC at a pressure of 1x10-6 Torr.
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2-1-3 Electrical measurements
Capacitance-Voltage (C-V) relationships were analyzed by HP 4284 LCR meter at 1MHz and the characteristics of Current-Voltage (I-V) were measured by HP4156 semiconductor parameter analyzer. All measurements were carried out at room temperature.
2-1-3 Results and Discussion
Organic thin film transistors are used for flexible electronics which could not sustain higher temperature processes. To understand the impact of substrate temperature for film deposition quality depending on surface morphology, thermodynamics and deposition rate, we choose different substrate temperatures to evaluate the insulator quality and gate leakage current of device.
Figure 2-1-3 shows leakage current density of silicon oxide deposited by APPJ.
The leakage current density of silicon oxide deposited by APPJ (APPJ-SiO2) is about 5E-7 A/cm2 at E = 0.5 MV/cm. However, the deposition rate at room temperature for APPJ-SiO2 insulator on aluminum electrode is almost zero, possibly ascribed to poor chemical reaction rate on aluminum substrate. As we known, the surface active energy is highly related to substrate temperature based on chemical vapor deposition dynamics. The equation of chemical reaction rate was shown in Eq. (2-1).
) / exp(
.
.R A E kT
C a (2-1)
where A is a constant, Ea is active energy, T is substrate temperature, and k is
24
Boltzmann constant. According to chemical reaction mechanism, the surface reaction can occur easily for the case with a low active energy. Therefore, we can choose different material with a low active energy or lower the reaction barrier by increasing substrate temperature to improve the deposition quality. Here, the different metals including Ni, Ti, Ta, Pt, and Pd have been applied to be the bottom electrode of the MIM capacitor, but the deposition rate of SiO2 (APPJ) at room temperature is still poor, close to zero. We also used different metal oxide (HfO2, AlO2O3) as the buffered materials between SiO2/electrode to decrease the active energy. However, the deposition quality is still poor.
To deposit silicon oxide on the metal by APPJ, we tried to increase the substrate temperature up to 100 oC, 150 oC, and 200 oC. We used aluminum as the bottom electrode for MIM structure. Figure 2-1-4 shows the thickness of APPJ-SiO2 at different temperatures, indicating deposition rate increased with substrate temperature, like surface reaction control. To clarify the effect of temperature-dependence deposition, a fixed flow rate of 200 sccm was applied to concise our experiment design. The detail discussion on the influence of flow rate would be investigated in next section. Figure 2-1-5 shows the leakage current density of silicon oxide deposited by E-gun and APPJ, respectively. The optimized APPJ-SiO2 at 150C presents a leakage current density of 1E-7 A/cm2 at 0.5 MV/cm, much better than the silicon oxide deposited by E-gun with a leakage current of 4E-6 A/cm2.
However, the SiO2 deposition at room temperature is the future demand. The improvement of surface reaction between Si and bottom electrode is crucial important.
Therefore, we deposited silicon oxide on Al electrode with an amorphous Si buffered layer at room temperature. Figure 2-1-6(a) and (b) show C-V and I-V characteristics of Al/SiO2/amorphous Si/Al MIM structure, respectively. The good capacitance and leakage current characteristics for different scaling-times cases during demonstrate the
25
stable APPJ deposition process and reliable film quality. However, the experiment confirmed that the APPJ-SiO2 film could be deposited on a-Si and SiO2 substrate at room temperature since the active energy of a-Si and SiO2 were lower than other materials. The experimental results support our previous assumption, which a lower surface active energy facilitate APPJ-SiO2 deposition on Al electrode. As we mentioned before, the higher thermal budget and Si buffered layer can deposit SiO2
successfully on Al electrode at room temperature, but the approach aided by buffered layer could increase the thickness variability and process complexity except for extra cost. In addition, we emphasized the importance of process temperature, since most plastic substrates could not sustain the temperature higher than 200 oC. The APPJ processed SiO2 at 150 oC not only maintains a good deposition rate for throughput but
successfully on Al electrode at room temperature, but the approach aided by buffered layer could increase the thickness variability and process complexity except for extra cost. In addition, we emphasized the importance of process temperature, since most plastic substrates could not sustain the temperature higher than 200 oC. The APPJ processed SiO2 at 150 oC not only maintains a good deposition rate for throughput but