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Chapter 1 Introduction

1.2 Overview

This thesis is organized into seven chapters. The contents of each chapter are as follows. Chapter 2 reviews the technology options, low-k materials, and the challenges of porous ultra-low-k dielectrics including aggregation and dispersion of porogen.

Chapter 3 covers the experimental methods and instrumentation. Chapter 4 discusses the aggregation and diffusion of porogen in the low-k MSQ/SBS hybrid films during thermal profile. Chapter 5 further addresses the dispersion of porogen in the hybrid

low-k film by using different ionic surfactant to modify the porogen surface. Chapter 6 discusses the dielectric constant, pore geometry and mechanical strength on different porosity porous film with and without porogen modification. Finally, Chapter 7 summarizes key results in this study.

Figure 1.1 Formation schemes of porous low-k dielectrics in copper/low-k interconnects:

(a) immediately after ILD deposition and (b) post-integration porogen removal scheme after Cu CMP step forming a copper/low-k layer.

substrate Burn out

Etch

Barrier

EP Cu

CMP (a)

CMP EP Cu Barrier

/Seed deposition Litho/Etch/

Strip/Clean As-deposited (b)

Burn out

Chapter 2

Literature Review

According to Moore's Law [17,18], “the number of transistors that can be placed inexpensively on an integrated circuit(IC) has increased exponentially, doubling approximately every two years“. The future development of integrated electronics or microelectronics depend on the continuous miniaturization allowing more components and more functions to be installed per unit area as shown in Figure 2.1, predicted by 2009 International Technology Roadmap for Semiconductor (ITRS) [19]. Figures 2.2 shows the trend of various device gate lengths scaling, including Flash, DRAM and MPU/ASIC microelectronics products, as predicted by ITRS. However, the continuous feature size shrinking has brought attention to several interconnected issues, such as RC delay, crosstalk noise, and power dissipation. Chapter 2 offers an overview of the development of backend interconnect technology and low-k materials. In addition, the porous low-k materials play an important role in the backend interconnects. The needs, materials, pore generator (porogen) and challenges of ultra-low-k dielectric materials are also briefly reviewed.

2.1 Backend interconnect challenges

The impact of interconnects scaling can be examined by RC delay of multilevel interconnects. Figure 2.3 shows the typical schematic interconnect cross-section with parasitic capacitance. The size reduction in line and space width of metal enlarges metal line resistance and parasitic capacitance, resulting in serious impact on signal propagation delay and crosstalk noises between metal lines of interconnect. Since one of the major signal delays is associated with interconnect delay, RC delay have become our main concern. Generally, RC delay can be described according to Figure 2.3. By assuming the minimum metal pitch is twice the metal width (W) and the dielectric thickness between the metal lines is the same as the metal height (T), the following equation can be used to predict and calculate the RC delay respectively [20,21].

m

Where R is the resistivity, Lm is the interconnect line length, W is the interconnect line width, k is the permittivity, and tm is the thickness of metal. Continuous scaling down

for achieve higher packing density will lead to the size reduction of W and tm, that will induce higher RC delay. Therefore, according to above RC delay approximation equation, proper improvement of RC delay can be achieved by modification of resistively ( of metal line and relative dielectric constant (k) of inter dielectric layer (ILD). In the early dawn of integrated circuit era, the combination of aluminum (Al) alloys with  = 3.3 -cm and silicon dioxide (SiO2, k = 4.0) dielectric has been utilized extensively for interconnect of semiconductor industry. It is because of their mature subtractive dry-etch processes, and for Al interconnect the production compatibility with fabricated device which have no performance issues. Even so, the relentlessly ICs scaling toward smaller geometry size for improvement of higher integration density and higher speed, demands on the introduction of new material and integration. Beyond 250 nm node, Al/SiO2 interconnects system was no longer sufficient materials to fulfill the device geometry shrinkage requirement as shown in Figure 2.4 [22]. In order to overcome above mentioned problems, new materials with low resistively and low dielectric constant for use as metal line and ILD materials were urgently studied and developed. Copper (Cu) interconnect was pronounced as one of the most prominent metallization. Cu interconnect is then widely developed due to its low resistively of  = 1.9 -cm. Lower interconnect delay is gained from Cu/low-k interconnect system compare to Al/SiO2 interconnect system, utilizing 37 % lower

resistively of copper than aluminum [22]. The capacitance of interconnect is dominated by line-to-line capacitance. Therefore, lowering dielectric constant (capacitance) was indeed crucially needed after the implementation of copper metallization.

The copper dual damascene process has been extensively adopted in the production line, but no consensus exists about the preferred IMD material for 22 nm technology node and beyond. In fact, the implementation of backend interconnect with a required effective dielectric constant (keff), which involves the k-values of dielectric, barrier, and etchstop layer and their respective dimension (thickness, width), was continuously revised and relaxed by ITRS year to year as shown in Figure 2.5 [23]. In recent years, some of integration strategies and materials development have been proposed to further reduce the keff smaller than 2.0, such as air-gap [24], carbon nanotubes [25], and graphene nanoribbons [26]. However, it is not easy to successfully integrate these new materials in the near-term because the industry has to radically change the conventional integration and process modules of backend interconnect. In addition, according to the 2010 ITRS, IMD materials with a bulk dielectric constant (kbulk) ≤ 2.2 are expected to be used in 2013. So far, the manufacturability solution for 20 nm and beyond is not clear.

Therefore, the search for low-k materials with kbulk < 2.2, or even < 2.0, is imperative for semiconductor industry and academia. This study focuses on the reducing of ILD k-value by controlling the structure-property relationship of novel type low-k materials,

and while maintaining the conventional backend interconnect processes.

2.2 Classification of dense low-k materials

Generally, the major deposition techniques for formation of ILD are divided into primary chemical vapor deposition (CVD) also known as “dry” process which has been widely adopted by chip manufacturers and showed highly reliable. The second one knows as “wet” process called spin-on method which has not been greatly developed in the process. There are some trade-off between CVD method and spin-on method.

Spin-on process simply involves the coating of liquid/viscous precursor on the substrate before final curing to remove the solvent. It provides planarizing property that shows in a smoother surface which is highly desirable, and the cost is cheaper. Table 2.1 listed the CVD and spin-on of various ILD materials with their dielectric constant value. Compare to CVD method which involves various gases flow and deposit on the substrate even though it also provides better conformal coverage of the topography, the spin-on method benefit on cleanliness and minimal waste production. Therefore, the spin-on method was selected to study the structure-property relationship of novel low-k materials in this dissertation. Then, next section will introduce the some of potential low-k materials.

2.2.1 Fluorinated Silicate Glass

The fluorinated silicate glasses (FSG) invented by Novellus System Inc and the FSG has dielectric constant value as low as k=3.6. FSG posses lower dielectric constant than SiO2 due to incorporation of fluorine into SiO2 matrix film. Fluorine incorporation leads to a less dense, more porous film by creating voids in the SiO2 matrix. Typical FSG film matrix shows in Figure 2.6. Replacing Si–O in the SiO2 matrix with Si–F reduces the polarizability of the matrix. The above reasons contribute to a lower dielectric constant of the FSG dielectric layer. [27, 28] FSG film has some drawback, for instance SiOF film is hydrophobic, in the meantime the fluorine atom will tend to react with hydrogen atom from water absorb in the release of HF moisture when heated to elevate temperature. The moisture of HF will travel along the interface of ILD and metal causing adhesion become poorer as explained by Figure 2.7. [29]

2.2.2 Carbon-doped Oxide (CDO)

Basically, CDO manage to utilize the chemical vapor deposition (CVD) processing method. CDO low-k is also often designated as SiCOH (carbon-doped silicon oxide).

The CDO matrix exists organic bonding such as CH3 backbone that concern lower polarizability in comparison to Si−O as shows in Figure 2.8. Instead of lower polarizability, CH3 also reduce the density of matrix by induced the matrix steric

hindrance. Regardless of the precursor used, SiCOH can reach k value in the range of 2.4-3. The k-value depends on the number of CH3 groups build into the structure. The widely studied precursor for SiCOH low-k have been deposited by CVD methods were monometylsilane (1MS), dimethylsilane (2MS), trimethylsilane (3MS), tetra-methylsilane (4MS), Hexamethyldisiloxane (HMDSO), bis-trimethylsilylmethane

(BTMSM), tetravinyltetramethylcyclotetrasiloxane (TVTMCTSO), Vinyltrimethylsilane (VTMS), and tetramethylcyclotetrasiloxane (TMCTS)

[30,31,32,33,34,35,36] as shows in Figure 2.9. CVD CDOs are mainly use in 90nm node. Commercially, the most common CVD OSG materials are AuroraTM (k=2.9, ASM), CoralTM (k=2.85, Novellus), Black DiamondTM (k=2.65-3.0, Applied Materials).

2.2.3 SiLK

TM

Spin-coated base SiLKTM was an organic polymer dielectric founded by Dow Chemical in mid 1997. In April 2000, IBM reported the complete integration of SiLKTM dielectric and copper wiring, and announced its intent to commercially fabricate integrated circuits using SiLKTM resin. Toshiba/Sony and Fujitsu also accommodated SiLK resin with hybrid stacks. Aromatic thermosetting polymer SiLKTM with k=2.65 has been proved its compatibility with Cu-dual damascene 0.13 um technology node system [37]. However, the relatively weak mechanical properties (E~3GPa) of SiLKTM

and its poor mismatch of coefficient of thermal expansion (CTE: 66 to 165 ppm/oC) with copper wires and substrates have prevented a wide adoption of SiLKTM in high-volume semiconductor manufacturing. Structure repeating unit of organic SiLKTM shows in Figure 2.10 [38].

2.2.4 Silsesquioxane based materials

Silsesquioxane (SSQ) based low-k material or commonly called T-resin are organic-inorganic polymer with empirical chemical formula (R-SiO1.5)m. The substituents (R) can include hydrogen, alkyl, alkenyl, alkoxy and aryl. Figure 2.11 illustrates the structure of basic units of SSQ [39]. The contribution of organic substituents benefits in lowering the dielectric constant because they provide lower density of the matrix structure. For the addition, they also attributed to less polarizability organic bond (Si−CH3) compare with Si−O bonds in SiO2. SSQ based low-k materials is also one kind of organosilicate glasses (OSG) which yield k = 2.5-3.3 after curing step [40,41,42]. The common used SSQ based materials for microelectronic application are mainly hydrogen-silsesquioxane (HSQ) and methyl-silsesquioxane (MSQ). HSQ has hydrogen as a terminal group and MSQ has methyl as a terminal group. The contribution of larger –CH3 group that will cause steric hindrance rather than smaller –H group will lower the density of the matrix. Besides, the Si−CH3 bond

possesses less polarization compare to Si–H. Therefore, MSQ material has lower dielectric constant than HSQ material. Table 2.2 summarizes the principle properties of SSQ based dielectric materials compare with SiO2. Subsequently, the commercially available SSQ based low-k materials are summarized in Table 2.3 which has k < 3.0.

[43,44]

2.3 Porous low-k materials

The above mentioned low-k materials were all classified into dense low-k materials.

In fact, an ultra-low-k material with k-value ≤ 2.0 is difficult to obtain even though the porosity is increased, and fully densified materials has seemingly reached theirs lowest capability.. Figure 2.12 shows ideal cases for a dry film, which are quite different from typical experimental values [ 45 ]. Therefore, the research has to move on with introduction of porosity into the dense materials, which is the only way to achieve dielectric constants < 2. Pores can be any shapes and morphology, including cylindrical, spherical and plate. Pore size, according to the International Union of Pure and Applied Chemistry (IUPAC) [46], is defined as follows:

Macroporous with dimensions > 50 nm;

Mesoporous with dimensions of 2~50 nm;

Microporous with dimensions < 2 nm.

The major of porous materials is considered for ILD applications are classified as mesoporous. That is, the average pore size in many candidate porous materials ranges from about 2 to 10 nm. There are two type pore formation inside the dense low-k matrix.

The primary one is that pores are inherently formed inside the matrix through sol-gel process such as aerogel and xerogel low-k film. The secondary method of pores formation is though the template agent or pore generator (porogen) which accommodates the present of sacrificial materials that are decomposed upon the thermal process. Following, we will discuss the fact and issue of each porous low-k materials.

2.3.1 Silica aerogel and xerogel low-k dielectrics

SiO2 aerogel thin film has attracted significant attention because of their unique properties such as ultralow dielectric constant, high porosity, and high thermal stability.

SiO2 aerogel thin films usually take the advantage of aging processes. However, SiO2

aerogel thin films usually synthesis above the supercritical pressure (> 60 bar) and high temperature of drying solvent process, which is very expensive and hazardous. Thus, it will become constraint for the production in industrial application [47]. Due to their high porosity, SiO2 aerogel thin film have not display superior mechanical properties [48]. SiO2 xerogel thin films also employ the same aging technique as SiO2 aerogel thin film. The differences between aerogel and xerogel is SiO2 xerogel prepared by the

ambient drying process which involve pre-drying step that called surface modification process known as silylation. The intention of silylation process is to change the surface hydroxyl (−OH) groups into inert methyl (−CH3) groups. This procedure ensure the film absorb minimal moisture from the environment [49]. Both SiO2 xerogel and aerogel has been reported to reach k-value < 2 at porosity level of 70~90% [50,51,52,53].

2.3.2 Pure Silica-Zeolite low-k film

PSZ low-k film offers several advantages over amorphous silica including crystalline structure as well as intrinsically uniform and small pore size [54,55]. Typical PSZ materials have high modulus and low dielectric constant, but have challenges such as high surface roughness [56], which can be resolved by adding a chemical mechanical polishing step. The other major problem is the high moisture absorption of PSZ film [57,58]. This is disadvantageous for the practicability of PSZ film due to the k-value of water is close to 80. Therefore, there have been some efforts to overcome this problem, for example, by performing fluoro-organic functionalization or silylation using 1H,1H,2H,2H-perfluorooctyltriethoxysilane, 3,3,3-trifluoropropyltrimethoxysilane [59], trimethylchlorosilane (TMCS), hexamethyldisilazane (HMDS) [ 60 ], and/or methyltrimethoxysilane (MTMS) during the zeolite synthesis and/or during heating processes to make the surface more hydrophobic [61,62].

2.3.3 Nano-Clustering Silica (NCS)

A novel pore forming method based on spin-on nano-clustering silica (NCS), schematically illustrated in Figure 2.13 [63]. The nano-clustering silica, a MFI-type zeolite film was prepared by sol-gel method. NCS precursor prepared by mixing main matrix of silica source tetraethoxysilane (TEOS) as a soldier in the existence of organic structure directing agent such as tetrapropylammonium hydroxide (TPAOH) as a commander in the present of appropriate solvent such as ethanol. The hydrophobicity of the surface of precursor was modified by adding alkoxysilane (AS) such as methyltrimethoxysilane (MTMS) as a component of the matrix. The difference between pure zeolite low-k and NCS is the addition of methyl (−CH3) groups directly into the precursor.

2.3.4 Templated-type (porogen) low-k dielectrics

Furthermore, the incorporation of thermally-labile pore generator also can produce porous low-kthin film. The removal of porogen upon high temperature heating will be replaced by pores inside the matrix. First method, incorporation of porogen into the low-k matrix can be accomplished by simply dispersing or mixing the porogen into the solution of low-k precursor [64,65,66]. Porogen size determines the final pore size that

exists inside the matrix. Percentage of porogen added or also called porogen loading determines degree of porosity inside the final cured matrix [67,68]. However, during thermal heating process, the random distribution of pores tends to agglomerate and coalescence which cause a burden to the mechanical strength of final low-k film especially when the porogen loading is increased as shown in Figure 2.14 [69,70].

Recently studies have shown that various polymers could be applied in the SSQ based matrix to form more ordered pore size and pore shape with narrower pore size distribution will be described in Section 2.4.

2.4 Selection of porogens

2.4.1 Linear amphiblic block polymer

Regarding to their ability to self assembly and form micelle as showed in Figure 2.15 [71], block copolymers have become one of the promising candidates for low-k dielectric. Amphibilic di-(or tri-) block copolymer such as PEO-b-PPO-b-PEO [71], PS-b-PEO [72], PS-b-P2VP [73], PS-b-P4VP [18], etc have been studied widely.

However, these polymers exhibit very limited miscibility with MSQ precursors, which results in severe phase separation depending on their loading levels, and in large, interconnected pores in cured MSQ dielectrics. However, with increases in the porosity, the pore size increases and thepore size distribution broadens, indicating that the

generated pores change from closed-cell structures to interconnected bicontinuous structures, which is attributed to changes in the phase separation of the blends of the porogen and matrix components with changes in the blend composition [74]. The pore size and size distribution are also found to be affected by the numbers of hydroxylsilyl and alkoxysilyl groups in the PMSSQ precursor. Moreover, neutron reflectivity measurements on these porous films found localized higher porosities at the interface between the porous films and their silicon substrates [75].

2.4.2 Dendrimers polymer

Dendrimers possess three distinguishing architectural components an initiator core, interior layers, and terminal end groups [76,77], and consist of a well-defined, highly branched, compartmentalized structure that is spherical in shape and of nanometre scale.

However, both dendrimer porogens and dielectric materials must meet the following requirements if they are to be used to successfully fabricate low-k dielectrics containing closed nanopores. Firstly, the dendrimer porogen should thermally degrade at temperatures lower than the degradation temperature of the dielectric material. Secondly, the dielectric material component must be dimensionally stable or become dimensionally stable during the thermal processes required to burn out the dendrimer porogen component from the dielectric film and in the fabrication of ICs. Thirdly, the

dendrimer and dielectric components should homogeneously dissolve in a mutual solvent without any phase separation. Fourthly, the components must be highly miscible to prevent or minimize any unfavorable phase separation during film formation processing, i.e., solution casting and subsequent drying processes. Finally, both the dendrimer and dielectric components must retain their miscible state without any unfavorable phase separation until the dendrimer porogen is thermally burned out during the post-thermal processing of the dried film, at which point the imprints of the dendrimer molecules are created as nanopores in the resulting dielectric film. The dendrimers were found to be miscible with the PMSSQ precursor, and their sacrificial thermal decompositions result in closed, spherical nanopores in the cured PMSSQ dielectric thin films as showed in Figure 2.16 [78].

2.4.3 Star-shape polymers

Star-shape polymers are very attractive as porogens for imprinting closed nanopores in dielectrics because of their spherical shape in the nanometre size range.

Some aliphatic star-shape polymers that completely decompose at temperatures < 400oC even in an inert atmosphere have been reported, such as star shape poly(e-caprolactone)s (PCLs) [79, 80, 81] as showed in Figure 2.17. Among the star-shape polymers PCLs have been extensively investigated for use as porogens in

SSQ dielectrics because of the following chemical characteristics. PCL polymers consist of non-polar pentylenyl and polar ester segments in each repeat unit in the backbone. In addition, they have hydroxyl groups at their arm ends. The PMSSQ dielectric precursor contains hydroxysilyl and alkoxysilyl groups. The PCL polymers are therefore likely to be miscible with the MSQ precursor. Star-shape PCLs with 4–48 arms have been reported. By increasing porosity, star-shape PCL porogens have a tendency to aggregate that is worsened by the cross-linking of the MSQ precursor matrix. Other star-shape porogens exhibit similar problems [82].

2.4.4 Cage supramolecules

Cyclodextrins (CDs) are cyclic oligosaccharides consisting of at least six

Cyclodextrins (CDs) are cyclic oligosaccharides consisting of at least six