Table 3 shows the physical routing result, using the Synopsys Astro placement-and-routing tool [19] to route the original netlist and each circuit in different cluster numbers. This physical placement-and-routing result uses the UMC 0.18µm and 1P5M (1-poly and 5-metal layers) process.
Table 3. Physical routing result of the circuit b17 of ISCAS’99. The technology process is UMC 0.18µm and 1P5M. The WLTotal represents the total wire-length and the unit is in µm. The CTotal is the total contact number and it also shows placement utilization for each circuit. Each circuit area is identical and the area is 633µm*628µm.
Original Uniform Area Cluster Approach Uniform Scan-Cell Number Approach
Cluster Number Cluster Number
Single scan-chain
3x3 5x5 7x7 3x3 5x5 7x7
Total
WL 950635 1064683 1066268 1085384 1068556 1073299 1126204 Utilization 89.31% 90.05% 91.37% 93.35% 90.05% 91.37% 93.35%
Comparing Table 2 and Table 3 routing length results, Table 2 results only use a single metal layer to evaluate the routing length and Table 3 results use physical routing tools to implement. The process is UMC 0.18µm and the metal layer is 1P5M. Because Table 3 uses multi-metal-layer for routing, it can dramatically shorten the routing length compared to that of single layer routing. In practice, modern VLSI routing is used for multi-metal-layer routing to guarantee routing implementation within a reasonable chip area.
In Table 3, Synopsys Astro [19] optimizes original netlist reordering, routing length and placement utilization as a single scan-chain design. The experiment results represent the routing length and placement utilization rate in cluster numbers of 3x3,
5x5 and 7x7 respectively for the uniform area cluster approach and the uniform scan-cell number approach. Comparing routing length, contact number and placement utilization for cluster numbers 7x7 in both clustering approaches to the original netlist, the routing length is longer 9.9% and 14.08%, the contact number is greater 4.78% and 5.4% and the placement utilization rate is greater 4.04% than that of clustering approaches and the original netlist respectively. Although clustering approaches may use more routing resources and add extra control circuits, the proposed approaches adjust the appropriate utilization rate within the routable region, the chip area is not increased and may affect the routing congestion only. Therefore, Table 3 results are more similar to actual application that doesn’t increase chip area and the cost. Figure 9 shows the routing result image of b17 circuit in the uniform area cluster approach.
Figure 9. Routing result image of b17 circuit in the uniform area cluster approach.
Chapter 5 Conclusions
This thesis applies two clustering approaches [17] and [18] to partition scan cells and use the shortest Manhattan distance to reorder the scan cells. Finally, this work implements the two-dimensional scan shift control test scheme into the modern testing design flow. This scheme has many benefits that reduce test data volume, test time and test power consumption with small area overhead. The current study also compares the two clustering approaches in routing length. Findings show that the uniform cluster area approach is better than the uniform scan-cell number approach especially in large cluster size. Furthermore, in the chip area, we adjust the appropriate utilization rate within the routable region. The chip area is not increased and may effect routing congestion only.
This work obtains the most advantages during testing in this scheme. However, we should take care the routing length and the routing resource. The control lines distribution in the chip are regular, the routing may be treated as a clock-tree in placement-and-routing procedure without affecting the driving and skew of the normal function.
For uniform cluster area approach, we do not provide an encoding approach. For this reason, the test data volume and the test power consumption are not reduced. But this architecture still is as a multiple scan chain, the test time can be reduced that compared with the single scan chain architecture.
These experiment results provide a tradeoff between the two clustering approaches.
Moreover, these clustering and routing approaches can further extend test structures such as three-dimension or other multiple-dimensional types.
For test pattern encoding, we should find the more efficient and lower overhead approaches such as average the scan cells in each cluster as possible to gain the encoding efficiency and benefits in test data volume, test time and test power consumption especially for uniform cluster area approach.
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