In this chapter, we investigate the impact of quantum-confinement effect on the sensitivity of Vth to process variations using the derived analytical solutions of Schrödinger equation for short-channel FinFET and GAA MOSFETs. The effective mass approximation is employed to deal with the Schrödinger equation. Our theoretical models consider the parabolic potential well due to short-channel effects and therefore can be used to assess the quantum-confinement effect in short-channel devices. Our study indicates that, for ultra-scaled FinFET and GAA devices, the importance of channel thickness variations increases due to the quantum-confinement effect. For FinFET, the Si-(100) and Ge-(111) surfaces show lower Vth sensitivity to the tch variation as compared with other orientations. On the contrary, the quantum-confinement effect reduces the Vth sensitivity to the Leff variation, and Si-(111) and Ge-(100) surfaces show lower Vth sensitivity as compared with other orientations. As the Vth sensitivity to tch for short-channel device is determined by the short-channel effect and the quantum-confinement effect, the tch of GAA MOSFETs can be optimized to reduce the Vth variation.
References
[1] B. Yu, Lingquan Wang, Y. Yuan, P. M. Asbeck, and Y. Taur, “Scaling of Nanowire Transistors,” IEEE Trans. Electron Devices, vol. 55, no. 11, pp. 2846-2858, Nov. 2008.
[2] H. Ananthan and K. Roy, “A Compact Physical Model for Yield Under Gate Length and Body Thickness Variations in Nanoscale Double-Gate CMOS,” IEEE Trans. Electron Devices, vol. 53, no. 9, pp. 2151-2159, Sept. 2006.
[3] Y.-S. Wu and P. Su, “Impact of Surface Orientation on the Sensitivity of FinFETs to Process Variations − An Assessment Based on the Analytical Solution of the Schrödinger equation,” IEEE Trans. Electron Devices, vol. 57, no. 12, pp. 3312-3317, Dec. 2010.
[4] Y.-S. Wu and P. Su, “Quantum Confinement Effect in Short-Channel Gate-All-Around MOSFETs and Its Impact on the Sensitivity of Threshold Voltage to Process Variations,” in Proc. IEEE Int. SOI Conf., 2009, pp. 1-2.
[5] L. Chang, M. Ieong, and M. Yang, “CMOS Circuit Performance Enhancement by Surface Orientation Optimization,” IEEE Trans. Electron Devices, vol. 51, no. 10, pp. 1621-1627, Oct.
2004.
[6] S. Gangwal, S. Mukhopadhyay, and K. Roy, “Optimization of Surface Orientation for High-Performance, Low-Power and Robust FinFET SRAM,” IEEE Custom Integrated Circuits Conference (CICC) 2006, pp. 433-436.
[7] D. Jiménez, J. J. Sáenz, B. Iñíguez, J. Suñé, L. F. Marsal, and J. Pallarès, “Modeling of Nanoscale Gate-All-Around MOSFETs,” IEEE Electron Devices Lett., vol. 25, no. 5, pp.
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ed. Pacific Grove, CA: Brooks/Cole, 2001.
[11] ATLAS User’s Manual, SILVACO, Santa Clara, CA, 2008.
[12] L.D. Landau and E.M. Lifschitz, Quantum Mechanics: Non-relativistic Theory, 3rd edition, Butterworth-Heinemann, 1981.
[13] C.-T. Lee and K. K. Young, “Submicrometer Near-Intrinsic Thin-Film SOI Complementary MOSFET’s,” IEEE Trans. Electron Devices, vol. 36, no. 11, pp. 2537-2547, Nov. 1989.
[14] Y. Taur and T. H. Ning, Fundamentals of Modern VLSI Devices. Cambridge, U. K.:
Cambridge Univ. Press, 1998.
[15] Y.-S Wu and P. Su, “Analytical Quantum-Confinement Model for Short-Channel Gate-All-Around MOSFETs Under Subthreshold Region,” IEEE Trans. Electron Devices, vol.
56, no. 11, pp. 2720-2725, Nov. 2009.
[16] S. Jin, M. V. Fischetti, and T. W Tang, “Theoretical Study of Carrier Transport in Silicon Nanowire Transistors Based on the Multisubband Boltzmann transport Equation,” IEEE Trans.
Electron Devices, vol. 55, no. 11, pp. 2886-2897, Nov. 2008.
[17] S. Jin, M. V. Fischetti, and T. W Tang, “Modeling of Electron Mobility in Gated Silicon Nanowires at Room Temperature: Surface Roughness Scattering, Dielectric Screening, and Band Nonparabolicity,” J. Appl. Phys., vol. 102, no. 8, p. 083715, Oct. 2007.
[18] E. Gnani, S. Reggiani, A. Gnudi, P. Parruccini, R. Colle, M. Rudan, and G. Baccarani,
“Band-Structure Effects in Ultrascaled Silicon Nanowires,” IEEE Trans. Electron Devices, vol. 54, no. 9, pp. 2243-2254, Sept. 2007.
[19] J. H. Davies, The Physics of Low-Dimensional Semiconductors. Cambridge, U. K.:
Cambridge Univ. Press, 1998.
Table 3-1 The quantization effective mass (mx) and the density-of-state effective mass (md) for electrons in Si- and Ge-channel with various surface orientations [9].
Si Ge Surface
orientation mx md degeneracy mx md degeneracy
(100)
0.916 0.191
0.191 0.418
2 4
0.120 0.299 4
(110)
0.316 0.191
0.325 0.418
4 2
0.223 0.082
0.219 0.361
2 2
(111) 0.260 0.359 6
1.590 0.092
0.082 0.342
1 3
67
t in
t in L eff
(0,0)
t ch / 2 x
y
Source Drain
t in
t in L eff
(0,0)
t ch / 2 x
y
Source Drain
Figure 3-1 Schematic sketch of the FinFET structure investigated in this paper. Leff is the channel length, tch is the channel thickness, and tin is the gate insulator thickness.
-5.0 -2.5 0.0 2.5 5.0 0.20
0.25 0.30 0.35 0.40 0.45 0.50 0.55
E ,2
E ,0 E ,1
EC E C, E j [eV]
x [nm]
Si-(100), g=4 valley, Leff = 20nm, tch = 10nm
Na= 1x1015cm-3, EOT=0.5nm, VGS = 0V, VDS = 0.05V y = 0.5*Leff
Symbols: simulation Lines: model
Figure 3-2 Conduction band edge and quantized eigen-energies of a short-channel lightly-doped FinFET.
69
20 40 60 80 100
0.00 0.01 0.02 0.03 0.04 0.05
Symbols: simulation Solid line: model
Dash line: flat-well approx.
Si-(100) g=4 valley
Na = 1x1015cm-3, y = 0.5*Leff VGS = 0V, VDS = 0.05V
tch = 8nm
tch = 10nm
E , 0
−
E C(x=0) [eV]Leff [nm]
tch = 15nm
Figure 3-3 Channel length dependence of the E0' for lightly-doped FinFETs with various tch
showing the accuracy of our model.
-5.0 -2.5 0.0 2.5 5.0 0.0
5.0x105 1.0x106 1.5x106 2.0x106 2.5x106 3.0x106
Symbols: simulation Lines: model Si-(100), g=4 valley
tch = 10nm
VGS = 0V, VDS = 0.05V y = 0.5*Leff
Leff = 100nm
|Ψ, 0|2 [cm-1 ]
x [nm]
Leff = 15nm
Figure 3-4 Comparison of the square of Ψ0' for long-channel and short-channel FinFETs.
71 Si-(100), g=2 valley VGS = 0V
E 0 [meV]
Leff [nm]
Symbols: power series method Lines: perturbation theory Si-(100), g=2 valley VGS = 0V
E 0 [meV]
Leff [nm]
Symbols: power series method Lines: perturbation theory
Figure 3-5 (a) Comparison of E0 for various tch calculated from the power series method and the perturbation theory. (b) α dependence on Leff for a given tch. (c) α dependence on tch for a given Leff.
20 40 60 80 100 120
power series method perturbation theory
Si-(100), g=2 valley Leff = 15nm, VGS = 0V
power series method perturbation theory
Si-(100), g=2 valley Leff = 15nm, VGS = 0V
power series method perturbation theory (111)
power series method perturbation theory (111)
Figure 3-6 (a) The discrepancy of E0 calculated by the perturbation theory and the power series method increases with tch2. (b) The discrepancy of E0 calculated by the perturbation theory and the power series method increases with mx.
73
-5.0 -2.5 0.0 2.5 5.0
1011 1012 1013 1014 1015
our model
flat-well approx.
Si-(100), Leff = 20nm, tch = 10nm VGS = 0V, VDS = 0.05V, y = 0.5*Leff
electr on densit y [cm
-3]
x [nm]
simulation
Figure 3-7 Comparison of the electron density calculated from our model and the model using the flat-well approximation.
0 3 6 9 12 15
symbols: simulation solid lines: our model CL
symbols: simulation solid lines: our model CL
Figure 3-8 Comparison of the tch dependence of Vth for Si-FinFETs with various surface orientations and the classical model (CL). The Vth shift due to quantum confinement is mainly determined by the E0 as indicated by the inset.
75
symbols: simulation solid lines: model CL
symbols: simulation solid lines: model CL
Figure 3-9 Comparison of the tch dependence of Vth for Ge-FinFETs with various surface orientations and the classical model (CL). The inset shows the comparison of the E0 for various surface orientations.
9 12 15 18 21 24
symbols: simulation solid lines: model
10 20
symbols: simulation solid lines: model
10 20
Figure 3-10 Comparison of the Leff dependence of Vth (Vth roll-off) for Ge-FinFETs with various surface orientations and the classical model (CL). The Vth roll-off is defined as Vth (Leff)
− Vth (Leff = 100nm). The inset indicates that the devices with smaller Leff show larger Vth shift due to quantum-confinement (QC) effect than the devices with larger Leff.
77
3 6 9 12 15
0.05 0.10 0.15 0.20
our model
flat-well approx.
V [V] th CL
tch [nm]
Si (110)-surface Leff = 25nm VDS= 0.05V
Figure 3-11 Comparison of the tch dependence of Vth of short-channel FinFETs calculated from the classical model (CL), our model, and the model using flat-well approximation.
4 6 8 10 12 14 16
Figure 3-12 Model predicted dVth/dT at 150K for (a) Si-NFET with various surface orientations (b) Ge-NFET with various surface orientations. Our calculations return to the classical result for devices with large tch, in which the quantum-confinement effect can be neglected.
79
Figure 3-13 (a) The d∆VthQC/dT depends on ln(tch) with the slope independent of channel materials. (b) The d∆VthQC/dT depends on ln(T) with the slope independent of channel materials.
4 8 12 16 0.0
0.1 0.2 0.3 0.4 0.5 0.6
symbol: simulation line: model
E4(=E5) E2(=E3)
Leff=100nm, 4-fold valley Na=1x1015cm-3, y=0.5*Leff VDS=0.05V, VGS=0V
E j−E C(r =0) [eV]
Diameter [nm]
E1
-0.5 0.0 0.5
0 1x1013 2x1013 3x1013 4x1013
symbol: simulation line: model
|Ψ4|2+|Ψ5|2 |Ψ2|2+|Ψ3|2
|Ψ j|2 [cm-2 ]
r / Diameter
Leff=100nm, D=5nm, 4-fold valley Na=1x1015cm-3, y=0.5*Leff
|Ψ1|2
(a) (b)
Figure 3-14 (a) Quantized eigen-energies for long-channel lightly-doped GAA devices. (b) The square of wavefunctions corresponding to the eigen-energies of GAA device with D=5nm in (a).
81
-0.5 0.0 0.5
0.20 0.25 0.30 0.35 0.40 0.45 0.50
symbol: simulation line: model
Leff=15nm, D=10nm, 4-fold valley Na=1x1015cm-3, y=0.5*Leff
VDS=0.05V, VGS=0V
Energy [eV]
r / Diameter
E4
E2 E1 EC
Figure 3-15 Conduction band edge and quantized eigen-energies of a short-channel lightly-doped GAA device.
-0.5 0.0 0.5 0.0
2.0x1012 4.0x1012 6.0x1012 8.0x1012 1.0x1013
Leff=100nm Leff=10nm symbol: simulation line: model D=10nm, 4-fold valley Na=1x1015cm-3, y=0.5*Leff VDS=0.05V
VGS=0V
|Ψ 1|2 [cm-2 ]
r / Diameter
10 100
0.00 0.01 0.02 0.03 0.04 0.05 0.06 0.07
D=15nm D=10nm D=8nm
symbol: simulation line: model
E 1− E C(r =0) [eV]
Leff [nm]
4-fold valley
Na=1x1015cm-3, y=0.5*Leff VDS=0.05V,VGS=0V
(a) (b)
Figure 3-16 (a) Channel length dependence of the first eigen-energy for lightly-doped GAA devices with various channel diameter. (b) Comparison of the square of first eigen-function for long-channel and short-channel GAA MOSFETs.
83
0.0 0.2 0.4 0.6 0.8
0.02 0.03 0.04 0.05 0.06
E 1
−
E C(r =0) [eV]V
DS[V]
symbol: simulation line: model
4-fold valley Na=1x1015cm-3 Leff=15nm y=0.5*Leff VGS=0V D=15nm
D=10nm D=8nm
Figure 3-17 Drain bias dependence of the first eigen-energy of short-channel lightly-doped GAA devices with various channel diameter.
-0.5 0.0 0.5 1011
1012 1013 1014 1015 1016
QM
Leff=15nm, D=10nm Na=1x1015cm-3, y=0.5*Leff VDS=0.05V, VGS=0V
symbol: simulation line: model
r / Diameter
Electron Density [cm-3 ] CL
-0.5 0.0 0.5
107 108 109 1010 1011 1012 1013 1014
QM
Leff=100nm, D=20nm Na=5x1018cm-3, y=0.5*Leff VDS=0.05V, VGS=0V
symbol: simulation line: model
r / Diameter Electron Density [cm-3 ]
CL
(a) (b)
Figure 3-18 Comparison of electron density distribution between classical model (CL) and quantum confinement model (QM). (a) Lightly-doped short-channel GAA device. (b) Heavily-doped long-channel GAA device.
85
5 10 15
1011 1012 1013 1014 1015 1016 1017
symbol: simulation line: model
Leff=20nm
Na=1x1015cm-3, y=0.5*Leff VDS=0.05V, VGS=0V
Average Electron Density [cm
-3]
Diameter [nm]
QM CL
Figure 3-19 Comparison of average electron density between CL model and QM model for lightly-doped short-channel GAA MOSFETs with various channel diameter.
0 5 10 15 20 25 0.0
0.1 0.2 0.3 0.4
symbol: simulation line: model
V th [V]
Diameter [nm]
Na=1x1015cm-3 Leff=100nm VDS=0.05V
QM
CL
Figure 3-20 Channel diameter dependence of Vth for long-channel lightly doped devices calculated from classical (CL) model and quantum confinement (QM) model.
87
Figure 3-21 (a) Channel diameter dependence of Vth,CL and Vth,QM. (b) Vth sensitivity to channel diameter (dVth/dD) by classical model and quantum confinement model.
8 12 16 20 24 0
20 40 60 80 100
0 3 6 9 12 15 Na=1x1015cm-3
VDS = 0.05V
min(dV th,QM / dD) [mV/nm]
Leff [nm]
Diameter @ min(dVth,QM / dD) [nm]
Figure 3-22 (Right) Optimized channel diameter for minimum dVth/dD. (Left) The corresponding dVth/dD for GAA devices with optimized channel diameter designs.
89
8 12 16 20
-0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0.00
CL simulation model
D=8nm D=6nm
Na=1x1015cm-3 VDS=0.05V V th - V th (L eff = 100nm) [V]
Leff [nm]
D=4nm
QM
Figure 3-23 Comparison of Vth roll-off calculated from CL model and QM model.
4 5 6 7 8 0
10 20 30 40 50
CL QM Leff = 10nm
Na=1x1015cm-3 VDS=0.05V
dV th / dL eff [mV/nm]
Diameter [nm]
Figure 3-24 Comparison of channel diameter dependence of Vth sensitivity to Leff (dVth/dLeff) calculated from CL model and QM model.
91
8 12 16 20 24
0 20 40 60 80 100
dV
th,QM/ dD N
a=1x10
15cm
-3V
DS= 0.05V
dV
th,QM/ dD, dV
th,QM/ d L [m V /n m ]
L
eff[nm]
dV
th,QM/ dL
effFigure 3-25 Comparison of dVth,QM/dD and dVth,QM/dLeff for GAA MOSFETs with optimized channel diameter design for minimum dVth,QM/dD in Figure 3-22.
Chapter 4
Suppressed Threshold Voltage Roll-Off by Quantum-Confinement Effects for High
Mobility Channel MOSFETs
4.1 Introduction
To attain sufficient drive current for highly-scaled MOSFETs, high mobility channel materials such as Ge and III-V materials have been proposed to enable the mobility scaling [1]. As the short-channel effects (SCEs) are more severe to these high mobility materials because of the higher permittivity, ultra-thin-body (UTB) [2], [3] and multi-gate structure [4]-[6] has been proposed to improve the device electrostatic integrity. With the scaling of channel dimension, the quantum-confinement effect becomes significant and may determine the electrostatic behavior and become crucial to the UTB and multi-gate device design. In this chapter, we tackle the problem using the analytically derived solutions of Schrödinger equation verified with TCAD simulation.
4.2 Quantum-Confinement Effect on V
thRoll-Off for UTB MOSFETs
Using density gradient model [7], Omura et al. [8] have observed increased Vth roll-off due to quantum confinement in UTB Si-on-insulator (SOI) devices. Whether there exists any
93
4.2.1 Analytical Solution of Schrödinger Equation for UTB MOSFETs
To consider the quantum-confinement (QC) effect along the channel thickness (i.e., x-) direction, the Schrödinger equation can be express as( )
E( )
x( )
x E( )
xwhere Ej is the jth eigen-energy, Ψj(x) is the corresponding wavefunction, and mx is the carrier quantization effective mass. For long-channel undoped UTB MOSFETs, the conduction band edge EC(x) was usually treated as a triangular well [10]. However, to account for the source/drain coupling due to SCEs, the conduction band edge EC(x) in Equation (4-1) should be treated as a parabolic well with potential energy EC(x) = αx2 + βx + γ where α, β, and γ are channel-length-dependent coefficients and can be obtained from the channel potential solution of Poisson’s equation under subthreshold region [11]. Using the parabolic-well approximation, the solution of Equation (4-1) can be expressed as Ψj(x) = ∑ dn⋅xn with the coefficients dn’s:
= 0 where x=0 and x=Tch (channel thickness) are defined as the interface positions of BOX/channel and channel/gate oxide, respectively. Thus, the eigen-energy and eigenfunction of short-channel UTB MOSFETs under subthreshold region can be derived. We have verified our model using the TCAD simulation that numerically solves the self-consistent solution of 2-D Poisson and 1-D Schrödinger equations [12]. Figure 4-1(a) and (b) show that for both the triangular potential well of long-channel devices and the parabolic well (due to SCEs) of short-channel ones, the Ej’s calculated by our model are fairly accurate. It should be noted that
a scalable quantum-confinement model with accurate channel length dependence is crucial to this study.
4.2.2 Enhanced and Suppressed V
thRoll-Off by Quantum-Confinement Effect
To assess the impact of quantum-confinement effect on Vth, the Vth is defined as the VGS
at which the average electron density of the cross-section at y = ymin (the minimum potential along the carrier flow direction) exceeds a critical concentration equal to the channel doping.
Note that the choice of other critical concentrations for determining Vth [13], [14] will result in a shift in Vth, but will not affect the results of Vth comparisons in this study. Using the calculated eigen-energies and wavefunctions, the electron density can be derived [15]. Figure 4-2 shows that the peak of electron density calculated by the classical (CL) model is not located at the channel/BOX interface (x=0) because the use of thin BOX (10nm) instead of thick BOX suppresses the buried-insulator-induced-barrier-lowering (BIIBL) [8]. Although the peak of electron density calculated by the quantum-confinement model is shifted toward the channel center, the main current flow paths predicted by both models are quite similar for the UTB structure with thin BOX.
Figure 4-3 shows that for GeOI MOSFETs with channel thickness (Tch) = 10nm, the Vth
roll-off (defined as Vth(L)–Vth(L=100nm)) predicted by the quantum-confinement model is larger than that predicted by the CL model. This is consistent with the result reported for SOI
95
of the triangular well (for long-channel devices) is much larger than that of the parabolic well (for short-channel devices) because of the larger electric field in the triangular one. As ∆ψsQM
is mainly determined by E0, the ∆ψsQM and thus ∆VthQM for the long-channel device is larger than that of the short-channel one. Therefore, the Vth roll-off considering the quantum- confinement effect is larger.
As the Tch scales down, however, a different trend can be observed. Figure 4-4 shows that for GeOI MOSFETs with Tch = 5nm, the Vth roll-off predicted by the QC model becomes smaller than that predicted by the CL model, which is opposite to the larger Tch case and [8].
This can not be explained by the reduction of BIIBL due to the quantum-confinement effect [8] because in this study, thin BOX (TBOX = 10nm) is used and the impact of BIIBL is not significant (see Figure 4-2). Since the “structural confinement” [10] dominates the carrier quantization for GeOI devices with smaller Tch (5nm), the inset of Figure 4-4 shows that the E0 (and hence ∆ψsQM) of the long-channel device is close to that of the short-channel one.
Nevertheless, due to the SCE, the subthreshold swing S of the short-channel device is larger than the long-channel one. Therefore, the ∆VthQM of the short-channel device is larger than that of the long-channel device and the Vth roll-off considering the quantum-confinement effect is smaller. This mechanism is important because it may alter the comparison result for Vth roll-off between Si, Ge, and In0.53Ga0.47As devices. Figure 4-5 shows that, contrary to the prediction of CL model, the Vth roll-off for InGaAs device is smaller than the Si counterpart because of the QC effect. Moreover, a crossover can be seen when Si and Ge devices are compared, and Ge device exhibits better Vth roll-off than the Si counterpart as Tch < 4nm.
In summary, depending on Tch, the quantum-confinement effect may increase or decrease the SCE of UTB devices. The critical channel thickness (Tch,crit) determining whether the quantum-confinement effect enhances or decreases the Vth roll-off depends on the BOX thickness (TBOX) and the channel material. Figure 4-6 shows that the Tch,crit of GeOI
MOSFETs increases with TBOX. In addition, for a given TBOX, the Tch,crit of SOI MOSFETs is smaller than that of the GeOI MOSFETs. This may explain why the suppression of Vth roll-off by the quantum-confinement effect was not observed for the UTB SOI devices (with Tch = 10nm) in [8].
4.3 Two-Dimensional Quantum-Confinement Effect for Multi-Gate MOSFETs
For multi-gate devices, the 2-D quantum-confinement effect along the Wfin and Hfin
directions may determine the electrostatic behavior and become crucial to the multi-gate device design. Since the impact of quantum-confinement effect is especially important to In0.53Ga0.47As channel because of its small effective mass, we assess this 2-D quantum-confinement effect on the Vth roll-off of In0.53Ga0.47As multi-gate MOSFETs using a derived analytical solution of 2-D Schrödinger equation verified with TCAD simulation.
4.3.1 Analytical Solution of Schrödinger Equation for Multi-Gate MOSFETs
To consider the 2-D QC effect in the Wfin (i.e., x) and Hfin (i.e., z) directions, the Schrödinger equation can be expressed as
( )
x z E( )
x z( )
x z E( )
x z( )
x z zm x
m1x 1z ij , C , i j , ij , i j ,
2 2 , , , ,
2 2
2
2 ⎟⎟Ψ + ⋅Ψ = ⋅Ψ
⎠
⎜⎜ ⎞
⎝
⎛
∂ + ∂
∂
− h ∂ (4-3)
97
usually assumed as a flat well [18], [19]. However, to account for the source/drain coupling due to SCEs, the EC(x,z) in Equation (4-3) should be treated as a parabolic well with potential energy EC(x,z) = (αx⋅x2) + (αz⋅z2 + βz⋅z) + γ, where αx, αz, βz, and γ are length-dependent coefficients and can be obtained from the channel potential solution of Poisson’s equation under subthreshold region as derived in Chapter 2. Using this parabolic-well treatment and separation of variables technique, the solution of Equation (4-3) can be expressed as Ψi,j(x,z)
= Wi(x)⋅Hj(z) = (Σdm⋅xm)⋅(Σen⋅zn) with the coefficients dm’s and en’s being determined by the following recurrence relationships:
2 0
The eigen-energy Ei,j can be determined by the boundary conditions that the wavefunction vanishes at the channel/ insulator interfaces, and can be expressed as Ei,j = EW,i + EH,j, where EW,i is the ith eigen-energy derived by Wi(x = 0) = Wi(x = Wfin) = 0, and EH,j is the jth eigen-energy derived by Hj(z = 0) = Hj(z = Hfin) = 0. Thus, the eigen-energy and wavefunction for a short-channel multi-gate MOSFET under subthreshold region can be derived.
We have verified our model using the TCAD simulation that numerically solves the self-consistent solution of 3-D Poisson and 2-D Schrödinger equations [12]. Figure 4-7(a) shows that our model can predict the asymmetric ground-state wavefunction Ψ0,0 along the Hfin direction due to the asymmetric gate configuration (and hence the asymmetric EC) in the
Hfin direction. For long-channel multi-gate devices, this EC asymmetry along the Hfin direction results in larger eigen-energy than that predicted by the flat-well approximation, as shown in Figure 4-7(b). For short-channel devices, the SCEs further alter the EC and hence increase the eigen-energy. Thus, in contrast to the constant E0,0−EC,min (EC,min is the minimum EC for a given x-z cross-section) calculated by the flat-well approximation, both the TCAD simulation and our model show that the E0,0−EC,min varies with the Leff. It should be noted that a scalable QC model with accurate Leff and Hfin dependences is crucial to this study.
4.3.2 Suppressed V
thRoll-Off for InGaAs Multi-Gate MOSFET
To assess the impact of quantum-confinement effect on the Vth roll-off, the Vth is defined as the gate voltage at which the subthreshold current equal to 300nA×Wtotal/Leff, where Wtotal
= 2Hfin + Wfin is the total width of the multi-gate device. Using the calculated eigen-energies and wavefunctions, the subthreshold current considering the QC effect can be derived. Figure 4-8 shows the Vth roll-off [defined as Vth(Leff=100nm)−Vth(L)] for InGaAs multi-gate devices predicted by the quantum-confinement model is smaller than that predicted by the classical (CL) model, and the discrepancy becomes larger with decreasing Hfin. In other words, the enhanced 2-D quantum-confinement effect due to Hfin down-scaling suppresses the Vth
roll-off of InGaAs multi-gate MOSFETs. This can be explained as follows.
The QC effect increases the Vth, and this quantum-confinement induced Vth shift (∆VthQC) can be expressed as S /(ln10⋅kT/q)⋅∆ψsQC [16], as mentioned in Section 4.2.2. Since the
99
can be raised by the quantum confinement along the Hfin direction, and hence the Vth roll-off can be significantly improved. It is also worth noting that this 2-D quantum-confinement effect on Vth roll-off for multi-gate devices with the Ge channel will not be as significant as the InGaAs counterpart, as indicated in Figure 4-9(b).
Figure 4-10 shows that, contrary to the prediction of the CL model, a discrepancy can be seen when the Vth roll-off for InGaAs and Ge multi-gate devices are compared. The CL model predicts that the Vth roll-off of InGaAs devices is similar with the Ge counterpart. With decreasing Hfin, however, the 2-D quantum-confinement effect for InGaAs devices becomes
Figure 4-10 shows that, contrary to the prediction of the CL model, a discrepancy can be seen when the Vth roll-off for InGaAs and Ge multi-gate devices are compared. The CL model predicts that the Vth roll-off of InGaAs devices is similar with the Ge counterpart. With decreasing Hfin, however, the 2-D quantum-confinement effect for InGaAs devices becomes