Simulation Results

The ADS simulation results of the proposed current-reused QVCO are shown in Fig. 3-5

~ Fig. 3-8. The proposed QVCO operates at 9.98GHz oscillating frequency, and the phase noise is -112 dBc/Hz @ 1 MHz offset frequency. The total power consumption is 1.64 mW since the QVCO core circuit draws 1.37 mA from a 1.2 V V supply. As the tuning voltages and raising from 0 V to 3 V and 0.6 V to 3.6 V, the tuning range of the QVCO is about 4 GHz from 9.98~13.97 GHz. Fig. 3-7 shows the time domain voltage waveform at the output nodes. Fig. 3-8 shows the output voltages waveform through a dc blocking capacitor, and the phase error of the proposed QVCO < 0.2 . The FOM of the proposed QVCO is about 189.6 @ 1 MHz offset frequency.

Fig. 3-5 the simulated phase noise of the proposed QVCO

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Fig. 3-6 the simulated tuning range of the proposed QVCO

Fig. 3-7 the outputs voltage waveform

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Fig. 3-8 the outputs voltage waveform through dc blocking capacitors

Table 3-1 the comparison between the proposed QVCO and references

This work(sim) [20] [21]

Tuning Range (GHz) 9.98~13.97GHz 1.047~1.39GHz 3.0~3.2GHz Phase Noise (dBc/Hz) -111@1MHz -120@1MHz -102

Core Power 1.64mW 5.4mW 4.32mW

FOM(dBc) -189.6 -173.5 -166

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Chapter 4 Conclusion

4.1 Simulation Results

In chapter 2, a low-phase noise QVCO utilizing tail current-shaping technique has been proposed. The low-phase noise QVCO is base on two first-harmonic injection-locked oscillators. In order to reduce the phase noise, we inject the output signals of the proposed QVCO back to its tail transistors and shape the tail currents. With this tail current-shaping technique, the RMS value of the impulse sensitivity function (ISF) of the proposed QVCO can be reduce to only 60% of the conventional one. The LC tank of the proposed QVCO has also been designed so as to increase the output amplitude, and the forward-body-bias technique is used to maintain the dc current without higher voltage supply. The measured results are shown in chapter 2.4, the phase noise is -119 dBc/Hz @ 1 MHz offset and the oscillation frequency of the QVCO is 5.28 GHz. The power consumption is 11.2 mW of 1.4 V supply voltage.

In chapter 3, we proposed a low-power QVCO by utilizing a novel current-reused topology. In order to reduce the power consumption, we not only reuse the dc current of the switching transistors, but also couple the quadrature signals by using back-gate coupling technique to avoid using additional coupling transistors. The simulated results are shown in chapter 3.3, the power consumption is only 1.64 mW of 1.2 V voltage supply. The phase noise is -111.7 dBc/Hz @ 1 MHz offset and the oscillation frequency of the QVCO is 10 GHz. The tuning range is from 9.98 GHz to 13.97 GHz, and the figure of merit (FOM) is -189.6 dBc.

36

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