Figure 5.6 shows the STBC and VBLAST detected constellations under floating-point case, where no channel effects are involved.
Figure 5.6: Detected constellation under floating-point case
Figure 5.7~5.9 show the other fixed-point detected constellations under different EMtargets.
Figure 5.7: Detected constellation under EMtarget = 1
Figure 5.8: Detected constellation under EMtarget = 5
Figure 5.9: Detected constellation under EMtarget = 10
Comparing with the above figures, it can be clearly observed that the quantization error does affect the detected constellations for both STBC and VBLAST cases. The constellations spread out more severely from the original four points in floating-point case as EMtarget increases, which will cause detection error as channel effects are taken into consideration. To verify the effects of quantization error to system performance, we illustrate a BER to SNR plot under different EMtargets in Figure 5.10, where all system settings remain the same to floating-point case except the fixed-point value variables are carried out instead of the floating-point values. Notice that saturation is performed in IFFT output values and all the other quantizers follow Table 5.1.
Figure 5.10: System performance under different EMs as qifft uses saturation We can easily observe that for both STBC and VBLAST cases, the curves drift to right-upper side when the number of EM increases. It indicates that system performs worse as the level of quantization error increases. Furthermore, we can also observe that in low SNR, channel noise dominates the system performance, therefore the differences between EMs are not obvious. On the other hand, in high SNR, the quantization error noise dominates the system performance, therefore the gap between different EMs becomes bigger and bigger.
Additionally, in order to emphasize the importance of adopting saturation method to fight PAPR problem in IFFT, we perform another case in Figure 5.11, where original IFFT quantizer “qifft=quantizer(‘fixed’, ‘floor’, ‘sat’,[mifft+pifft, pifft]” shown in Table
5.1 is changed to be “qifft=quantizer(‘fixed’, ‘floor’, ‘wrap’,[mifft+pifft, pifft]”. That is, wrapping is applied instead of saturation. Clearly, both curves in Figure 5.11 drift to right-upper side much more severely comparing with Figure 5.10, and BER is saturated to about 10-5 as SNR increases. The reason is that wrapping is probable to let an extremely large positive value be a negative value or vise versa, which will cause severe quantization error comparing with saturation; that is why we intensively recommend using saturation instead of wrapping when dealing with PAPR problem in IFFT output data.
Figure 5.11: System performance under different EMs as qifft uses wrapping
Finally, total word lengths of variables and error metrics and hardware resource requirements under different EMtargets are categorized in Table 5.6. We can detect a trend from this table: additional 1070 LUTs are required as error metric is improved form 10 to 5, however more additional 3470 LUTs are required as error metric is improved form 5 to 1. That is, to achieve a zero quantization error system, the increase of additional hardware resource requirement will grow exponentially.
Table 5.6: Experimental results of final word lengths and EMs
EMtarget 1
8.756
EMtarget 1
5.5 Summary
Since most practical FPGA designs are limited to finite precision signal processing using fixed-point arithmetic because of the cost and complexity of floating-point hardware, a systematical quantization algorithm is important for designers to map original floating-point code into fixed-point code. This chapter describes how the floating-point arithmetic in MATLAB are converted into fixed-point of specific precision for hardware design based on profiling the inputs, intermediate, and output signals. Especially, the idea of hardware resource weighting is inserted and the characteristics of communication system are also considered. Experimental results including integer lengths, fraction length, and total resource requirements under error metric equals 1, 5, and 10 are reported, and fixed-point system BER to SNR performances are also illustrated in this chapter.
Chapter 6
Conclusion
In future wireless communication systems, the demand of higher throughput and higher link quality is urgently called for, since various multimedia or home applications will be provided and thus reliable and affordable technologies are required to realize those contents. Coupled with a robust and efficient OFDM air interface, MIMO technologies can lead to a very attractive high-speed data transmission solution for future wireless systems. Recent years, researches on the topic of MIMO-OFDM system have been exploited greatly, and the MIMO-OFDM based standard, IEEE 802.11n, is just on the stage of competition for two proposals from TGn Sync and WWiSE, respectively. This encourages us to build up a hardware system based on MIMO-OFDM instead of the theoretical analysis only.
This thesis had described the signal processing concepts and algorithms of a 2×2 MIMO-OFDM system in physical layer, including STBC and VBLAST MIMO techniques. Furthermore, two FPGA based platforms are adopted to implement our 2×2 MIMO-OFDM system, e.g., fast prototyping platform and self-designed platform. In the fast prototyping platform, three FPGA modules, one DSP chip, and one USB module are installed; on the other hand, four FPGA modules, USB interface, and RF modules are equipped in the self-designed platform. A complete dataflow including software application interface, web camera, USB transmission, and baseband algorithms on DSP and FPGA are constructed in the fast prototyping platform; whereas a real wireless communication environment containing RF mismatch, multipath effects, and so on are generated through real indoor experimental environment and RF modules
on the self-designed platform. Finally, due to the complexity and time-consuming procedure of floating-point to fixed-point conversion, we have proposed a systematical quantization algorithm which can not only minimize the hardware resource requirement but also constrain quantization error within a specified limit.
To summarize, hardware implementation is highly complicated. Therefore, the avalailability of MATLAB simulation, proper quantization algorithms, useful HDL simulation software, and powerful debugging tools becomes especially significant.
Nevertheless, some future works still remain. For example, higher modulation order such as 16QAM, 64 QAM and so on can be realized; furthermore, total power consuming issues ought to be taken into consideration, too. Finally, although there is a lot of room for improvment, we believe that the MIMO-OFDM system implemented on the FPGA-based platform we proposed is still highly advanced nowadays.
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