Fig. 5.11 shows the layout of the proposed mixer. The size of the layout is 0.95mm by 0.6mm including pads. Considering the layout effect, we take the long layout line and run EM simulation by ADS Momentum so as to obtain the layout effect model.
The mixer is designed using TSMC 0.18μm CMOS technology. The simulations were done at 1.8 V supply voltage and the power consumption is 5 mW including the output buffer.
Fig. 5.11 Layout of the proposed mixer
-20 -15 -10 -5 0 5
-15 -10 -5 0 5 10 15 20
Conversion Gain (dB)
LO Power (dBm) LO power sweep
Fig. 5.12 Conversion Gain VS. LO power
Fig. 5.12 illustrates the conversion gain versus the LO power. Fig. 5.13 illustrates the conversion gain versus the RF frequency with both RF and LO ports swept in frequency from 4 to 7 GHz, a fixed IF frequency of 20 MHz, RF power of -30 dBm, and LO power of 0 dBm. Fig. 5.12 illustrates the conversion gain versus the IF frequency.
4.0 4.5 5.0 5.5 6.0 6.5 7.0
0 2 4 6 8 10 12 14 16
Conversion Gain (dB)
Frequency (GHz)
RF frequency sweep
Fig. 5.13 Conversion Gain VS. RF Frequency
0 20 40 60 80 100 120 140 160 180 200
0 2 4 6 8 10 12 14 16
Conversion Gain (dB)
IF (MHz)
IF sweep
Fig. 5.14 Conversion Gain VS. IF frequency
Fig. 5.15 shows the P1dB and IIP3 when RF frequency is 5.2GHz and fixed IF frequency is 20MHz. P1dB is about -11dBm and IIP3 is about -3.8dBm. Fig. 5.16 shows the P1dB and IIP3 when RF frequency is 5.8GHz and fixed IF frequency is 20MHz. P1dB is about -11dBm and IIP3 is about -3.7dBm.
-30 -25 -20 -15 -10 -5 0 5
IF output power
RF input power Main signal power 3rd order IM power
IIp3：-3.8 dBm P1dB：-11 dBm
Fig. 5.15 P1dB and IIP3 at 5.2GHz
-30 -25 -20 -15 -10 -5 0 5
IF input power
RF input power Main signal power 3rd order IM power
IIp3：-3.7 dBm P1dB：-11 dBm
Fig. 5.16 P1dB and IIP3 at 5.8GHz
The simulated RF return loss is better than 10 dB as shown in Fig. 5.17. The simulated IF return loss are also better than 10dB as shown in Fig. 5.18. Table 5.1 is the summary of mixer simulation results.
2 3 4 5 6 7 8 9
-30 -20 -10 0
Return loss(dB)
Frequency (GHz) RF Return loss
Fig. 5.17 RF Return Loss
0 1 2 3 4 5 6
-20 -15 -10 -5 0
IF Return loss (dB)
Frequency (GHz) IF Return loss
Fig. 5.18 IF Return Loss
Table 5.1 Summary of mixer simulation results
RF Return Loss S11(dB)11.7+ 0.6 Power conversion gain(dB)
1.8
TSMC 0.18um CMOS Process RF Return Loss S11(dB)
11.7+ 0.6 Power conversion gain(dB)
1.8
TSMC 0.18um CMOS Process
Simulation results Parameters
5.4 Comparison and Summary
The comparison of the proposed mixer against recently reported mixer with passive balun is shown in Table 5.2. It indicates that the proposed mixer provides smaller balun size, better linearity, more compact chip size.
Table 5.2 Summary of the comparison
Chip size (mm*mm)0.66*0.25 (at fc=9GHz) [30]
0.26*0.26 (at fc=5.5GHz) Balun size (mm*mm)
This work Chip size (mm*mm)
0.66*0.25 (at fc=9GHz) [30]
0.26*0.26 (at fc=5.5GHz) Balun size (mm*mm)
This work Ref.
Chapter 6 Conclusion
In this thesis, we present bi-directional amplifier, quadrature hybrid, and mixer with the miniaturized balun. These proposed circuits are fabricated using a standard TSMC 0.18μm CMOS process.
In chapter 3, a bi-directional amplifier without any switch or controlled voltage for 5.8GHz applications is presented. The bandwidth of this design is about 250MHz. The bi-directional amplifier contains two identical reflection-type amplifiers and a 3-dB quadrature hybrid. The chip area is 0.96 × 1.15 mm2. The simulation result shows the achieved gain is 11dB , return loss is under -10dB. For the poor experience in the beginning, the result is bad. Experience teaches it. The technology of layout is the key factor in the circuit design. The improved chip will be back in August. Since the lump element of quadrature hybrid cost more area in chapter 3, the miniaturized quadrature hybrid is proposed in chapter 4 to reduce chip size. By employing the active inductors, the area can be reduction and the quality factor can be improved. The size of the layout is 0.74mm by 0.81mm including pads. The measurement S11 is under -10dB and S21 is about -4dB. The measurement S41 is under -15dB and S31 is about -2dB.
The phase difference between S21 and S31 is 94。~100。. The tuning range of this design is from 5GHz to 6GHz.
In chapter 5, an active mixer with miniaturized balun is proposed. The balun structure is consisted of both distributed and lumped elements. By adding two capacitors, the coupled lines length can be reduced and two poles induce because of the coupled resonators. The die size of the proposed balun is about 0.26*0.26 mm2. The size of the total circuit layout is 0.95*0.6 mm2 including pads. The simulation results of proposed mixer achieves power conversion gain of 11.7 ± 0.6 dB, IIP3 of -3.7 dBm, and P-1dB of -11 dBm in the power consumption of 5mW from a 1.8V power supply including the output buffer.
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