Chapter 1 Introduction
1.4 Structure of the Thesis
In this thesis, only downlink traffic is considered. Power saving performance and packet loss ratio of DRX mechanism with a real-time Poisson traffic are analyzed by combining Short and Long Cycles as a regenerative cycle. Instead of average packet delay, the packet loss ratio of DRX mechanism is derived, which is more realistic when verifying the quality of service under a system. Moreover, a procedure of DRX parameter setting is also proposed.
Both numerical analysis and suggested configuration are verified, respectively, with computer simulation and optimum setting. The structure of thesis is organized as follows.
First in the beginning of Chapter 2, the analysis approach similar to [17] is described, followed by formulation of target metrics of packet loss ratio and power saving efficiency.
The remaining part of the chapter includes derivations of variables required in the target metrics.
The proposed procedure of DRX parameter setting is introduced in Chapter 3.
In Chapter 4, curves of analytical results and computer simulation with different values of DRX parameters are plotted for verification. The comparison between optimum DRX configuration and proposed approach is also presented in this chapter. Finally, the conclusion of this thesis is organized in Chapter 5.
Chapter 2 Analysis
2.1 Regenerative Cycle
The analysis is derived based on the concept of regenerative cycles, in which a cycle consists of multiple periods operated in different states. Accordingly, under DRX operation, UE switches between two states, namely, active state and sleeping state. An active state and its following sleeping state or vice versa form a regenerative cycle. To distinguish from DRX Long and Short Cycle, a regenerative cycle is called super cycle and is assumed to begin with active state followed by a sleeping state. An example of super cycle with NSC 1 is illustrated in Figure 3.
Figure 3 Example of super cycle
The active state starts with an exceptional first busy period, followed by some (could be
zero) busy periods, and ends with a period of length specified by Inactivity Timer. The exceptional first busy period is created by pending packets which arrived during sleeping state.
Each busy period is created by a single packet arrival, and every busy period is preceded by a time period of length shorter than C without any packet arrival. Finally, the length of the T inactivity period is C and there is no packet arrival in this period. T
During DRX Short and Long Cycles, UE periodically wakes up for T milliseconds and on listens to PDCCH for traffic indication. UE stays in sleeping state if the current DRX cycle is a no-arrival cycle; that is, there is no packet arrival in the current DRX cycle. Note that some packet arrivals may be dropped due to violation of delay bound constraint in a no-arrival packets could be discarded because of QoS violation. As a result, it is possible that all packets arrived at a DRX cycle are dropped. Under this circumstance, the DRX cycle is considered as a no-arrival cycle because UE does not know there are downlink packet arrivals.
2.2 Target Metrics
In this thesis, an UE is assumed that its packet arrival is a Poisson process with arrival rate per millisecond. The arrival rate is further assumed small that the possibility of having two or more packet arrivals within a sub-frame can be neglected. Also, the service time of each packet is deterministic and equals one millisecond, that is, each packet requires one millisecond to be served. The delay bound requirement of the traffic is denoted as D
milliseconds and there is a buffer which can store D packets is allocated in UE so that a packet is dropped if and only if its arrival time preceding next active opportunity more than
D milliseconds.
To analyze the packet loss ratio of DRX mechanism, let M , 1 M and 2 M denote, 3 respectively, the number of packet arrivals during the exceptional first busy period, the busy periods and the sleeping state. Also, let N represent the number of packets dropped in a
To deal with the power saving performance of DRX mechanism, one can analyze by the duration UE spends in active state and sleeping state. Let T and A T be two random S variables that denote the lengths of active state and sleeping state in a super cycle, respectively. Moreover, let TS on_ be the random variable representing the length of On Duration where UE should power on in the sleeping state. Therefore, the UE power saving efficiency e can be derived as ratio of the duration UE powered off to the length of a super cycle as shown in equation (2).
In the following sections, the packet loss ratio shall be derived first, followed by the analysis of power saving efficiency.
2.3 Analysis of Packet Loss Ratio
One can note that the random variables in equation (1) are independent to each other.
Therefore, the packet loss ratio can be derived by calculating E N ,
E M ,
1 E M
2 and
3E M separately. In the scope of this thesis, the packet arrival rate is small that the possibility of having more than one packet arrival in one millisecond can be ignored. For an UE with traffic following Poisson process, one can have that ee 1.
S S on 1
Since a packet shall be dropped if it is buffered for a time period longer than the delay bound requirement, the time interval CS and CL are divided into two segments, number of buffered packets right before the exceptional first busy period. Since one buffered
packet creates one busy period, K buffered packets will create K busy periods. With the fact that the average number of packets served in a busy period is 1 / (1
)[10], the average number of packet arrival during exceptional first busy period is
To compute E K , three cases are considered separately below.
Case 1. CSCLD
For CSCLD, no packet arrival will be dropped in a DRX cycle. In other words, the
first DRX cycle with packet arrival(s) is the triggering cycle. E K can be derived by
calculating the cases of having first arrival in different DRX cycles, such as the first NSC Short Cycles and the following Long Cycles. Therefore,
1 1
1
After some manipulation, one can get
1 0With the same idea above, one can derive
deterministic packet service time, no packet will be dropped during the active state. If there is no packet arrival in time interval of length
C
T, an UE terminates the active state; otherwise, a packet arrival creates a busy period and resets the Inactivity Timer. Since the average number of packets served in a busy period equals to 1 / (1
), one can derive the average number of packet arrivals before expiration of Inactivity Timer as follows.
2
2 sub-frame can be neglected, one can infer that no packet will be dropped in the sleeping state if CSCLD. Therefore, E M
3 equals to E K for case 1.
considering the packet arrivals in the second segment of CL for E K , the arrivals in both
first and second segments should be taken into account when calculating E M
3 .
3 whole sleeping state and right before the beginning of active state. Since packets can only be discarded in sleeping state, the number of dropped packets in a super cycle shall be the difference of M3 and K . Thus, one can get NM3K, which implies
3E N E M E K
. (19)With the equations for E M ,
1 E M
2 , E M
3 as well as E N , the packet loss
ratio p under different cases can be calculated.
2.4 Analysis of Power Saving Efficiency
To obtain the power saving efficiency, three equations for E T
A , E T
S and_
E T S on are required in (2). The equations are derived below separately.
2.4.1 Derivation of E T
AThe length of the active state in a super cycle consists of three parts, namely, the length of exceptional first busy period, busy periods and an Inactivity Timer. The expected length of exceptional first busy period equals to E K
/ (1) because, on the average, it is createdwith E K packets. Similarly, the expected length of a busy period equals
1/ (1) and each busy period is preceded by a no-arrival period shorter than the Inactivity Timer. The average length of the no-arrival period can be derived as follows.0 0
periods and the last Inactivity Timer, E T
A can be derived asLet g represent the probability of having one packet arrival in one millisecond and H denote the expected duration before entering active state during the first (Ton 1) On
As the calculation of E M
2 , three different cases are considered separately.Case 1. CSCLD
For CSCLD, it holds that
1
1 0As the equations for E T
A , E T and
S E T S on_ are derived, the power saving efficiency e can be calculated by substituting the expected values in (2).A DRX performance simulator is also created in this work. Before verifying the accuracy of equations derived above, a configuring procedure for DRX parameters based on observations from DRX simulator is proposed in next chapter.
Chapter 3 QoS Support
3.1 Proposed DRX Parameters Configuration
Table 1 lists the available values of DRX parameters which are specified in the LTE-Advanced standard document [3].
Table 1 Available Values of DRX Parameters
Parameter Values
On Duration (T ) on 1, 2, 3, 4, 5, 6, 8, 10, 20, 30, 40, 50, 60, 80, 100, 200 (ms)
Inactivity Timer (C ) T 0, 1, 2, 3, 4, 5, 6, 8, 10, 20, 30, 40, 50, 60, 80, 100, 200, 300, 500, 750, 1280, 1920, 2560 (ms)
Long Cycle Length (C ) L 10, 20, 32, 40, 64, 80, 128, 160, 256, 320, 512, 640, 1024, 1280, 2048, 2560 (ms)
Short Cycle Length (C ) S 2, 5, 8, 10, 16, 20, 32, 40, 64, 80, 128, 160, 256, 320, 512, 640 (ms)
Short Cycle Timer (NSC) Integer{1, …, 16}
With all the possible values, there are hundreds of thousands of combinations can be achieved. Based on the analysis in previous chapter, an approach to configuring the DRX mechanism with Poisson arrival traffic is proposed. The initial design intension of introducing these five parameters is not mentioned in the specification document. Thus, the purposes of
each parameter are designed based on the proposed approach.
First, On Duration is mainly for indication of downlink traffic and can be set with a small value by assuming that the scheduler of eNobeB is well designed to allocate resource precisely within the On Duration. The small value can be 2 or 3 milliseconds and is set to 2 ms in the following verification. The goal of Inactivity Timer is assigned to extend the duration in the active state for consecutive reception of packets buffered at eNodeB and packets which arrive after the last buffered packet is delivered. From simulation of DRX mechanism, the packet loss ratio and power saving efficiency of different Inactivity Timers or Long Cycle Lengths are plotted in Figure 4 and Figure 5, respectively.
Figure 4 Impact of Inactivity Timer on power saving efficiency and packet loss probabilty for = 0.1 , Ton = 2 ms , CL= 256 ms , CS = 16 ms , NSC = 2 with
= 100 ms D .
Figure 5 Impact of Long Cycle Length on power saving efficiency and packet loss probabilty for = 0.1 , Ton = 2 ms , CT = 1 ms , CS = 16 ms , NSC = 2 with
= 100 ms
D .
Based on the analysis for E T
A and simulation figures, one can see that the power saving efficiency decreases nearly exponentially as Inactivity Timer increases. However, the same improvement of packet loss performance can be achieved with smaller sacrifice of power saving by adjusting the Long Cycle Length. Therefore, Inactivity Timer is suggested using the value of 1 millisecond, which is enough to extend the active state for successive packet delivery. The remaining work is to select appropriate values for Short Cycle Length, Short Cycle Timer and Long Cycle Length.It is obvious that to achieve maximum power saving performance, one should choose parameter values so that the packet loss probability is as close as possible to but no greater than the QoS requirement. Moreover, given the desired packet loss probability, the proportion of time UE has to be powered on to receive packets is a constant. Therefore, to achieve higher energy saving performance, the chances of having idle On Durations should be reduced. Since
Short Cycles have higher possibility to generate idle On Durations, the suggestion is to set DRX mechanism without any Short Cycles, leaving only Long Cycle Length to be configured.
Finally, the Long Cycle Length is selected to be the one that maximizes the power saving efficiency subject to the constraint of QoS requirement. Because there are only 16 possible values for Long Cycle Length, one can choose the optimum values using exhaustive search by substituting each value options into the equation of packet loss ratio.
Chapter 4 Verification
In this chapter, the analyses are verified with computer simulation and the suggested DRX selection is also compared with the optimum configuration.
4.1 Verification of Numerical Analysis
The numerical results of packet loss probability and power saving efficiency are verified with the simulation. In the following comparisons, four DRX parameters, that is, Long Cycle Length, Short Cycle Length, Short Cycle Timer and Inactivity Timer are adjusted respectively, leaving three other parameters fixed in each comparison. Cases of 0.01 and 0.1 are both considered. In general, compared to the case of 0.1, the case of 0.01results higher packet loss probability and power saving efficiency with the same configuration.
First in Figure 6, the value of Long Cycle Length is a variable. As one can see, the analytical results match well with simulation results. There is no packet dropped before the value of Long Cycle Length exceeds the delay bound requirement, that is, 150 milliseconds.
As Long Cycle Length increases, both packet loss probability and power saving efficiency increase. The packet loss probability increases rapidly once the Long Cycle Length exceeds the delay requirement. Therefore, it can be inferred that the appropriate Long Cycle Length should be the values close to the delay bound. Another observation is that the increasing speed of packet loss probability is higher as arrival rate becomes smaller, which implies that for more time-dispersed traffic, the Long Cycle Length shall be set closer to the delay bound.
Figure 6 Packet loss probabilty and power saving efficiency with different Long Cycle Lengths for = 0.01 , 0.1, Ton = 2 ms, CT = 10 ms, CS = 16 ms, NSC = 2, D= 150 ms.
In Figure 7, comparisons with different Short Cycle Lengths are conducted. The analytical and simulation results are still matched. One can discover that the DRX performance varies dramatically as Short Cycle Length differs. In case of 0.1, if a small value of Short Cycle Length is adopted, the DRX tends to enter Long Cycle more easily because there is good possibility of having no-arrival Short Cycles. As Short Cycle Length rises, there is a zone with much lower packet loss probability where Short Cycle Length is long enough to capture most packet arrivals, mitigating the packet loss in Long Cycle.
However, after the value of Short Cycle Length exceeds the delay bound, cases of packet loss in Short Cycle are created, and the loss ratio increases as bigger values of Short Cycle Length are configured.
Figure 7 Packet loss probabilty and power saving efficiency with different Short Cycle Lengths for = 0.01 , 0.1, Ton = 2 ms , CL= 512 ms , CT = 10 ms , NSC = 2,
= 150 ms D .
In Figure 8, the Short Cycle Timer is a variable. In case of 0.1, there is a lower bound both in packet loss probability and power saving efficiency with Short Cycle Timer of values bigger than five. The reason is that with the parameter configuration described in Figure 8, the chance of having packet arrivals, whose inter-arrival times are greater than the length of five or more consecutive Short Cycles, can be neglected; in other words, only Short Cycles are executed in this case. Therefore, no packet will be dropped if all packets arrive in Short Cycles of length shorter than the delay bound requirement.
Figure 8 Packet loss probabilty and power saving efficiency with different Short Cycle Timers for = 0.01 , 0.1, Ton = 2 ms , CL= 512 ms, CS = 16 ms, CT = 10 ms,
= 150 ms D .
Comparisons with Inactivity Timer being adjustable parameter are shown in Figure 9 and the analytical analysis matches the simulation result. As discussed in previous chapter, the power saving efficiency decreases severely as Inactivity Timer increases for the case of
0.1. To lower packet loss probability, one can adjust DRX by decreasing Long Cycle Length or Short Cycle Length. Increasing Short Cycle Timer or Inactivity Timer are also other alternatives. However, with the same improvement of packet loss probability, one can see that the adjustment by increasing Inactivity Timer will cause severe degradation on power saving efficiency. Therefore, it is suggested to set Inactivity Timer to some small values for Poisson arrival process.
Figure 9 Packet loss probabilty and power saving efficiency with different Inactivity Timers for = 0.01 , 0.1 , Ton = 2 ms , CL= 512 ms , CS = 16 ms , NSC = 2 ,
= 150 ms D .
4.2 Verification of Proposed Configuration
One can infer that the trade-off between packet loss probability and power saving efficiency can be achieved by adjusting any DRX parameter. However, the simplicity of parameter configuring approach should also be considered. The approach proposed in previous chapter manages to raise the power saving efficiency as high as possible by only adjusting DRX Long Cycle under the constraint of QoS requirement, and is expected to be an eligible method for Poisson arrival process. For verification of proposed approach, optimum configuration is obtained by brute force search, and the performance of proposed approach is shown in Figure 10.
Figure 10 Performance comparison between proposed DRX configuration and optimum DRX configuration for D= 100, 150 ms and = 10%.
Under the constraint of packet loss probability threshold 10%, the power saving efficiency achieved by the suggested approach is slightly smaller than that obtained by optimum configuration. According to numerical results, the difference is less than 2.5% for
100
D ms and 0.9% for D150ms.
Another observation is that there are some vibrations in the curves of optimum configuration. Since available values for each DRX parameters are discrete integers, it is possible that two different values of achieve optimum performance with the same DRX configuration, and higher power saving efficiency is obtained from analytical equations with the bigger . In contrast, with only one variable being adjusted, the performance curve of the proposed approach is therefore with smoother result.
Chapter 5 Conclusion
Delay bound and packet loss ratio due to violation of delay bound are common QoS requirements of real-time applications. Equations for packet loss probability and power saving efficiency under DRX mechanism with a Poisson arrival process are derived in this study. The analytical model is verified with computer simulation and analytical results matches the ones of simulation.
For DRX parameter selection, a suggested method is also proposed. For an UE with traffic following Poisson arrival process, it is suggested to configure On Duration and Inactivity Timer with some small values and adopt only Long Cycle for DRX Cycle. The Long Cycle Length can be obtained by exhaustive search based on the derived equations. The performance achieved by the proposed approach is also close to that of optimum configuration.
The analytical model derived in this study cannot be applied directly to analysis of realistic system for the complexity of real traffic profiles. However, this study is expected to provide a fundamental analysis for packet loss probability and power saving efficiency under DRX mechanism.
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