Thesis Organization

Following chapters in the thesis are primarily organized as follow：

In chapter 2, we make a description of experimental details. Atomic Layer Deposition system is used to deposit hafnium-based materials on silicon surface.

In chapter 3, we discuss the characteristics of HfO2 or HfAlOx insulator by Metal-Insulator-Semiconductor (MIS) capacitors.

In chapter 4, we discuss the reliability of HfO2 or HfAlOx insulator by

Metal-Insulator-Semiconductor (MIS) capacitors and the effects of Post-Metallization-Annealing.

In chapter 5, we make the conclusions for this thesis and provide some suggestions for future work.

Chapter 2

Experiments of Al/HfO ₂ and HfAlO _x /Si MIS Capacitor

2.1 The way to prepare High-K thin film

There are several methods to prepare high-k thin films, such as chemical vapor deposition (i.e. ALCVD, MOCVD, PECVD etc.) [30]-[32] and physical vapor deposition (i.e. Sputtering, PLD etc.) [33][34]. ALCVD, MOCVD and Sputtering are the usual methods for preparing HfO2 films. We will compare the ALD and sputter methods below.

2.1.1 ALCVD

The major difference between conventional chemical vapor deposition (CVD) and ALCVD (atomic layer CVD) arises from how precursors are introduced to the substrate and how the substrate surface is applied to control growth. In ALCVD, precursors are introduced alternatively to the substrate surface with an inert gas purge.

The precursors are not allowed to be in contact with each other in the gas phase. This results in a surface controlled, layer-by-layer process for the deposition of thin films with atomic layer accuracy. Each atomic layer formed in the sequential process is a result of saturated surface controlled reaction. It provides well controlled growth of thin film and excellent step coverage. Fig. 2-1 shows how ALCVD Al2O3 and HfO2

were deposited by ligand exchange reaction. Trimethyl aluminum Al(CH3)3 (TMA) and H2O were used for Al2O3 deposition and hafnium tetrachloride HfCl4 and H2O were used for HfO2 deposition. Much more detail on the surface chemistry is presented elsewhere [35].

ALCVD Hf-based high-k materials have demonstrated the feasibility of EOT scaling down to 1 nm by using HfAlxOy on nitrided surfaces [36]. HfO2 with Al2O3 in it, such as HfAlxOy or HfO2/Al2O3/HfO2, shows much better scaling capability than only HfO2. The physical defects observed in the thin HfO2 will limit the physical thickness scaling. However, the charge trapping is worsened by the presence of Al2O3. It has been found that the interfacial layers and high-k bulk materials will increase the trap density. Some initial physical analysis data suggests the chemical oxide of SC1 might be a very promising way for EOT scaling of ALCVD high-k stacks because chemical oxide has been demonstrated as a good starting surface for ALCVD growth.

The rapid thermal SiO2 or SiON grown at the reduced partial pressure of reaction gases also is considered a possible solution for further reducing interfacial layer thickness. In the future, the project will focus on solving the charge trapping, mobility degradation of HfO2 with Al2O3 in it. Furthermore, the flat band voltage shift after thermal process will be a problem. The uniformity and repeatability of HfO2 is quite reasonable [36]. Currently, ALCVD is a very slow process. The deposition time for a 3 nm HfO2 film is over 4 min without counting time for stabilization, pumping down and up, and wafer transfer. This would result in a total of 10–15 min for 2–4 nm HfO2

deposition. The very slow throughput might be the major problem to use ALCVD tool for mass production.

2.1.2 DC Magnetron Sputtering

The usual HfO2 film with DC magnetron sputtering method is reactively sputtered from an Hf target in an Ar + O2 ambient onto Si substrate, then annealing in the furnace system. The advantages of the DC magnetron sputtering are simple and cheap. In addition, the HfO2 film prepared by CVD system easily contains organic impurities and/or oxygen vacancies inside. This will cause leakage current through Frenkel-Pool effect or trap assisted tunneling [37]. Less contaminants are produced by the process of the sputtering because there is no other unnecessary chemicals.

However, the uniformity of the DC sputtering is worse than that of the ALCVD in 12 inch diameter Si wafer. Furthermore, sputtering in an O2 ambient easily produces SiO2 interfacial layer. Therefore, we decide to use ALD to prepare our thin film.

2.2 Rapid Thermal Annealing system

METAL RTA-AG 610 was a single-wafer lamp-heated and computer-controlled rapid thermal processing (RTP) system. Water and compressed dry air (CDA) cooling system were used to cool down the quartz chamber. High intensity visible radiation heating and cold-heating chamber walls allow fast wafer heating and cooling rate. The tungsten halogen lamps were distinguished into five groups, and the relative percentage of lamp intensity can be adjusted individually for each group to achieve uniform temperature distribution. Temperature was obtained from pyrometer and precise controlled by computer. Two gas lines were used in the system which can be switched between Ar and N2. Before RTA process started, one minute N2 gas purge was performed to minimize the water vapor introduced during wafer loading and also swept unwanted particles induced during process. A fast heating rate of 100 /s was chosen in this work. When anneal was complete, chamber ℃ temperature was quickly cooled down from 900 to 500 by N℃ ℃ 2 purge 30 seconds.

Then, the chamber was slowly cooled down to 280 without N2 purge to avoid ℃ creaking of films. After five minutes later, wafers can be taken out from the chamber.

Films’ creak can be avoided by two-steps-cooling method.

2.3 Plasma treatment system

When the PDA (Post-Deposition-Annealing) was finished, some samples were subjected to an additional plasma treatment in order to improve the electrical properties of gate dielectric. There were various source gas (N2, N2O) and process time (30 sec, 60 sec, 90 sec) as the experiment conditions. Parallel plate high-density plasma reactor employing an ICP source was a single-wafer treated and computer-controlled system.

Fig. 2.2 illustrates ICP system that was used in this experiment. 13.56 MHz RF power was coupled to the top electrode through a matching network. After the sample load to reactor, the system was pumped down to keep the chamber clean enough.

Subsequently, the source gas was become radical by the plasma system, as the chamber pressure was 100 mTorr and the substrate temperature was 300 ℃ so that to achieve the goal of low temperature process. The power of working plasma was kept constant at 200W and the flow rate of source gas was 100 sccm. While the process of plasma treatment was finished, these samples were brought to thermal treatment to reduce plasma damage.

2.4 MIS Capacitors Fabrication Process

In this thesis, Al/HfO2/Si and Al/HfAlOx/Si MIS capacitor were fabricated to study ultra thin HfO2 and HfAlOx gate dielectrics. Figure 2-3 shows the fabrication flow of this experiment. The starting wafer was four inch (100) orientated p-type or

n-type wafer. It was one side polished and its resistivity was 5~10 ohm-cm.

After standard initial RCA cleaning, wafers were put into chamber and grew HfO2 and HfAlOx layer with atomic layer deposition system. After the thin films were prepared, some samples were annealed after deposition (post-deposition anneal) and then subjected to an additional plasma treatment at the substrate temperature of 300℃

while the pressure was 100 mTorr and the plasma power was 200W. The plasma treatment conditions were in pure N2 and N2O for 30 sec, 60 sec, and 90 sec respectively and the flow rate were 100 sccm. After nitridation, we also annealed these samples to reduce the plasma damage. Finally, pure aluminum films were thermally evaporated on the top side of wafers. Mask defined the top electrode. Then, we used wet etching to etch undefined Al and HfO2 films. After patterning, backside native oxide was stripped with diluted HF solution, and Al was deposited as bottom electrode. The detailed fabrication process flow was listed as follows.

1. Initial RCA cleaning.

2. Atomic layer deposition HfO2 and HfAlOx.

3. Post-deposition anneal with 600 for HfO℃ 2 and 800 for HfAlO℃ x.

4. Plasma treatment with N2，N2O plasma for 30 sec, 60 sec, 90 sec respectively.

5. Post-nitridation annealing with 600℃-30sec.

6. Thermally evaporate 4000 Å aluminum as the top electrode.

7. Mask: define top electrode and then wet etch undefined Al and HfO2 films.

8. Strip backside native oxide and coat 4000 Å aluminum as bottom electrode.

After the Al/HfO2 or HfAlOx /Si MIS capacitors were prepared, we used semiconductor parameter analyzer (HP4156A) and C-V measurement (HP4284) to analysis electric characteristics (i.e. I-V, C-V, EOT, leakage current density etc.).

Then we tested their reliability, including stress induced leakage current (SILC), constant current stress(CCS), constant voltage stress (CVS), Hysteresis effect.

Chapter 3

Electrical Characteristics of Al/HfO ₂ or HfAlO _x /Si MIS Capacitors

3.1 Electrical Characteristics with different post-deposition annealing temperature

3.1.1 Capacitance-Voltage Characteristics FOR HfO ₂

In order to measure the C-V characteristics of our MIS capacitors, we used HP 4284A precision LCR meter in our experiments. We swept the gate bias from accumulation region to inversion region to obtain the curve at the frequency of 50 kHz from -2V to 0V. First, the effects of different PDA (post deposition annealing) will be discussed.

Fig. 3-1 shows the capacitance-voltage (C-V) characteristics of HfO2 gate dielectric anneal with different temperature for 30 sec. The capacitors of PDA (400 , ℃ 500 , 600℃ ℃) show higher capacitance than the original sample. In addition, the capacitor of PDA (850 ) shows the worse C℃ -V curve, because HfO2 could not sustain the high temperature anneal over 600 . The best PDA temperature range is ℃ about 400 ~600 .℃ ℃

3.1.2 Current-Voltage Characteristics FOR HfO ₂

The leakage current of our MIS capacitors were analyzed from the current -voltage (I-V) characteristics measured by an HP4156A semiconductor parameter analyzer.

Fig. 3-2 shows the J-V characteristics of HfO2 gate dielectrics anneal with different temperature for 30 sec from 0V to -2V. We observed that with suitable temperature annealing, the leakage current density can be decreased, because PDA could make the thin film dense. The leakage current density of the sample (PDA-850 ) is larger owing to the crystallization℃ -induced leakage current.

3.1.3 Capacitance-Voltage Characteristics FOR HfAlO x

Fig. 3-3 shows the capacitance-voltage (C-V) characteristics of HfAlOx gate dielectrics anneal with different temperature for different process time. PDA could reduce the flat-band voltage and make the thin film dense. From Fig 3-3 we think that the suitable annealing temperature is about 600 ~800 . The C℃ ℃ -V curves of those samples over 900 are a little distorted. ℃

3.1.4 Current-Voltage Characteristics FOR HfAlO _x

Fig. 3-4 shows the J-V characteristics of HfAlOx gate dielectrics anneal with different temperature for different process time from 0V to -2V. The gate leakage current density of these samples (600℃, 800 ) c℃ ould be decreased, because the film became dense after PDA. The leakage current of those samples (PDA over 900 ) ℃ are large, it might be caused by crystallization.

For reasons mentioned above, we would use the 600 to be as the PDA ℃ temperature for HfO2 and the 800 for HfAl℃ Ox.

3.2 Electrical Characteristics with different plasma

treatment for different process time

There are two kinds of plasma treatment with different source gas (i.e. N2, N2O) and they were treated for different process time (i.e. 30 sec, 60 sec and 90 sec). First, the relationship of difference process time in one kind of plasma treatment will be discussed. Then we compare the effect of different source gas.

3.2.1 Capacitance-Voltage Characteristics FOR HfO 2

Fig 3-5 shows the capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with N2 plasma treatment for different process time. The capacitor treated for 90 sec shows the maximum capacitance among these conditions of process time. Furthermore, the capacitor treated for 30 sec and 60 sec both show the good capacitance values which are larger than the capacitor which was not treated by N2

plasma.

Fig. 3-6 shows the capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with N2O plasma treatment for different process time. Just like the samples of N2 plasma treatment. The improvement of capacitance could be seen. At this condition, the capacitance treated with N2O plasma for 90 sec shows the largest value. By the way, all the samples which use N2O plasma have larger capacitance than the sample without treatment. It is indicated that N2O plasma treatment is also a practicable method to improve the capacitance-voltage characteristics of HfO2 gate dielectrics.

3.2.2 Current-Voltage Characteristics FOR HfO ₂

Fig. 3-7 shows the J-V characteristics of p-type HfO2 capacitors treated by N2

plasma with different process time from 0 V to -2 V. We observed that the gate

leakage current density is suppressed while treatment conditions are 60 sec and 90 sec.

It is indicated that N2 plasma treatment supply an effective barrier against the leakage current. The film after N2 plasma treatment became dense and strong, so the leakage current could be effectively decreased, especially for capacitor which treated with N2

plasma 90 sec and it also has the lowest leakage and largest capacitance value from Fig. 3.5. Gate leakage current density of no treatment insulator at VG = -1 V is about 1×10^-7 A/cm². From Fig.3-5, however, gate leakage current density of the capacitor treated for 90 sec N2 plasma at VG = -1 V is about 1×10^-8 A/cm². It has less gate leakage than no treatment insulator about 1 order. Furthermore, we notices that the capacitor treated with N2 plasma for 30 sec has high leakage current, it is might be that the N2 plasma is too little time to react with the film and caused by plasma damage.

Fig. 3-8 shows the J-V characteristics of p-type HfO2 capacitors treated by N2O plasma with different process time from 0V to -2V. After N2O plasma treatment, we could see the reduction of leakage current in contrast of no treatment samples.

However, the sample of plasma treated for 90 sec got the small gate leakage current and a good C-V curve from Fig 3-6. Relative to the case of N2 plasma, we could see that the level of leakage current increasing obviously mitigate. It is possibly due to the additional oxidation layer formed by oxygen radical. The interfacial oxidation layer will let the dielectric thicker to prevent from gate leakage.

Fig. 3-9 and Fig.3-10 shows the capacitance-voltage (C-V) and J-V characteristics of HfO2 gate dielectrics treated with N2 plasma treatment for 90 sec and N2O plasma treatment for 90 sec. It is indicated that the capacitance treated with N2 plasma for 90 sec shows the most excellent value (i.e. 50% increasing about capacitance). Among these samples, the reason why the sample treated with N2O plasma has lower capacitance than N2 plasma treatment is complex. It is may be the

growing of interfacial oxide made the C value smaller and this interfacial layer also made the gate leakage current smaller.

3.2.3 Capacitance-Voltage Characteristics FOR HfAlO _x

Fig. 3-11, Fig. 3-12 shows the C-V curves for MOS capacitors with nitridation by N2 and N2O plasma of 200 W at different time. The capacitance density of HfAlOx

nitrided by N2 plasma 30 sec and N2O plasma 30 sec are largest. Plasma nitridation (N2, N2O) at 30 sec could more effectively increase the dielectric constant of HfAlOx. The passivation effect of plasma nitridation could decrease the flatband voltage of C-V curve. From Fig. 3-11, when the N2 plasma process time over 60 sec, the C value will become smaller, we think that it is may be caused by the growing of interfacial oxide in the plasma process time. The same phenomenon is also found on N2O plasma from Fig 3-12.

3.2.4 Current-Voltage Characteristics FOR HfAlO _x

Fig. 3-13 shows the J-V characteristics of p-type HfAlOx capacitors treated by N2 plasma of 200W with different process time from 0V to -2V.We observed that the gate leakage current density is suppressed while treatment conditions are 30 sec and 60 sec. The film after nitridation with N2 plasma became dense and strong, so the leakage current could be effectively decreased, gate leakage current density of no treatment sample at VG = -1 V is about 1×10^-5 A/cm², gate leakage current density of the capacitor treated for 30 sec N2 plasma at VG = -1 V is about 1×10^-7~1×10^-8 A/cm². It has less gate leakage than no treatment insulator about 2~3 order. Furthermore, we found that the 90 sec nitrided sample has high leakage current, it is maybe caused by plasma damage.

Fig. 3-14 shows the J-V characteristics of p-type HfAlOx capacitors treated by

N2O plasma with different process time from 0 V to -2V. After N2O plasma treatment, we can see the reduction of leakage current in contrast of no treatment samples. It is worthy to be noticed that all the capacitors treated by N2O plasma have a low leakage current about 1×10^-8 A/cm² at Vg = -1V. Relative to the case of N2 plasma, we can see that the level of leakage current decreased obviously. It is maybe due to the additional oxidation layer formed by oxygen radical. The interfacial oxidation layer will let the dielectric thicker to prevent from gate leakage.

Fig. 3-15 and Fig. 3-16 shows the capacitance-voltage (C-V) and J-V characteristics of HfAlOx gate dielectrics treated with N2 plasma treatment for 30 sec and N2O plasma treatment for 30 sec. It is indicated that the capacitance treated with N2 plasma treatment for 30 sec shows the better C-V curve.

As a consequence, the N2 and N2O plasma treatment all shows better

electrical properties than no treatment sample. Furthermore, the N element and O element all could fix the interface and improve the electrical properties include of C-V curve and J-V curve. But for the reason of oxidation caused by oxygen radical, the N2O plasma treatment samples show the lower C value.

3.3 Electrical Characteristics with different steps for PDA and post-plasma treatment anneal

3.3.1 Capacitance-Voltage and Current-Voltage Characteristics FOR HfO ₂

Fig 3-17, Fig 3-18 shows the the C-V and J-V characteristics of HfO2 gate dielectrics treated with different steps of post-plasma treatment anneal and PDA. As

show in Fig. 3-17, the sample without nitridation can not sustain the high temperature annealing, so nitridation can improve the thermal stability of high-k film. In addition, we observe that the C-V curve of the sample without PDA and treated by N2 plasma directly is distorted at high negative bias voltages owing to the crystallization, we could see that after post deposition anneal, nitridation could effectively improve the thermal stability of the thin film. From Fig. 3-18, we can find the same result, the sample with nitridation after PDA can effectively decrease gate leakage current. It is good evidence to show that the thin film treated by N2 plasma after post-deposition anneal can make the thin film sustain high thermal stress.

Fig 19, Fig 20 shows the capacitance-voltage (C-V) and J-V characteristics of HfO2 gate dielectrics after different PDA temperature and different PNA temperature.

The sample with PDA 600℃ and PNA 600℃ has the better C-V curve and lower leakage current.

Fig 21, Fig 22 shows the capacitance-voltage (C-V) and J-V characteristics of HfO2 gate dielectrics after nitridation and 900℃ 30 sec thermal treatment. The capacitor with PDA 600℃ and after plasma treatment annealing 600℃ certainly has the better C-V curve and lower leakage current. But, the capacitance value decreased at negative bias, this was caused by the additional interfacial layer during the thermal process. However, it is particularly noteworthy that nitridatuon can let the HfO2 gate dielectric sustain high temperature (900℃) thermal treatment. Compare to Fig 3-1, the film without nitridation will breakdown after high temperature (over 800℃) thermal treatment.

3.3.2 Capacitance-Voltage and Current-Voltage

Characteristics FOR HfAlO x

Fig. 3-23 shows the capacitance-voltage (C-V) characteristics of HfAlOX gate dielectrics after post-deposition annealing and plasma treatment annealing. First, we can find that the sample without PDA and treated with N2 plasma directly, its C-V curve is distorted. It might be cause by plasma damage, therefore we must add the post-nitridation anneal step to restore the plasma damage. In addition, the C-V curve of the sample with PDA and PNA is better than others. Fig 3-24 shows the J-V characteristics of HfAlOx gate dielectrics after post-deposition annealing and plasma treatment annealing. The sample with nitridation, whose gate leakage current is lower than original one. The phenomenon is similar with HfO2.

Fig. 3-25 shows the capacitance-voltage (C-V) characteristics of HfAlOx gate dielectrics treated with different PNA. In Fig. 3-25, the C-V curve of the sample with PNA 400℃ is distorted, it might be the PNA temperature is too lower to restore the plasma damage. Fig. 3-26 shows the J-Vcharacteristics of HfAlOx gate dielectrics treated with different PNA. The gate leakage current of all the samples with nitridation is smaller than the original sample.

Fig. 3-27 shows the capacitance-voltage (C-V) characteristics of HfAlOx gate dielectrics after nitridation and 900℃-30 sec thermal treatment. The C-V curve of the sample with PDA 800℃ and PNA 600℃ is the best. Furthermore, the C–V distortion of the HfAlOx films with only RTA was observed at a high gate bias owing

Fig. 3-27 shows the capacitance-voltage (C-V) characteristics of HfAlOx gate dielectrics after nitridation and 900℃-30 sec thermal treatment. The C-V curve of the sample with PDA 800℃ and PNA 600℃ is the best. Furthermore, the C–V distortion of the HfAlOx films with only RTA was observed at a high gate bias owing