Future work - Conclusions and Future Work

Chapter 5 Conclusions and Future Work

5.2 Future work

The interfacial layer between high-k/Si would be increased by increasing post-deposition-annealing temperature. In order to suppress the growth of the interfacial layer, we could use some pre-treatment methods to introduce a thin oxide or nitride layer by HDP-PECVD or chemical deposition. Furthermore, we might have to understand the mechanism of leakage current of thin film and thick film individually. Finally, the mechanism of the generation of the defects in the high-k bulk or interface still needs to be solved.

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Table

Table 1-1 High-performance Logic Technology Requirements Roadmap.

( ITRS：2005 updae )

Table 1-2 Characteristics of various high-k materials.

Figure-chapter 1

Fig. 1-1 Conduction mechanism in oxide for the MOS structure.

Fig. 1-2 Gate leakage reduction by high-k dielectric.

(B-Y Nguyen, 6th TRC October 27-28, 2003 Motorola)

Fig. 1-3 Measured and simulated Ig-Vg characteristics under inversion condition form MOSFETs. The dotted line indicates the 1A/cm²

limit for the leakage current. [6]

Fig. 1-4 Jg, limit versus Jg, simulated for High-Performance Logic ( ITRS: 2005 update )

Fig. 1-5 Jg,limit versus Jg,simulated for Low Operating Power ( ITRS: 2005 update )

Fig. 1-6 Jg,limit versus Jg,simulated for Low Standby Power ( ITRS: 2005 update )

Fig. 1-7 Power consumption and gate leakage current density comparing to the potential reduction in leakage current by an alternative

dielectric exhibiting the same equivalent oxide thickness [12].

Figure-chapter 2

Fig 2-1 ALCVD growth mechanism of AL2O3 and HfO2.

(International SEMATECH Confidential and Supplier Sensitive, 2002)

Fig 2-2 The ICP plasma system that was used in this experiment.

1. Standard RCA cleaning.

2. ALD HfO

₂

and HfAlO

.

3. Post-Deposition-Annealing (600℃-30 sec for HfO

and 800℃-30 sec for HfAlO

).

4. Plasma treatment with N

₂

or N

₂

O (30sec, 60 sec, 90 sec)

ICP Plasma

N⁺

N⁺ O⁺

O⁺ O⁺ N⁺

N⁺ O⁺

O⁺

O⁺ O⁺

O⁺ O⁺ N⁺

5. Post-Nitridation-Annealing (600℃-30sec)

6. Thermally evaporate 400 nm aluminum as top electrode.

7. Lithography：Define top electrode Æ Wet etch undefined Al.

6. Strip backside native oxide Æ Coat 4 nm aluminum as bottom electrode.

8. Thermally evaporate 400 nm aluminum as bottom electrode

Fig. 2-3 The fabrication flow of the experiment.

Figure-chapter 3

Fig. 3-1 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics anneal with different temperature for 30 sec

-2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0

Fig. 3-2 The J-V characteristics of HfO2 gate dielectrics anneal with different temperature for 30 sec from 0 V to -2 V

-2.0 -1.5 -1.0 -0.5 0.0

Fig. 3-3 The capacitance-voltage (C-V) characteristics of HfAlOx gate dielectrics anneal with different temperature for different process time.

-2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0

Fig 3-4 The J-V characteristics of HfAlOx gate dielectrics anneal with different temperature for different process time from 0V to -2V.

-2.0 -1.5 -1.0 -0.5 0.0

Fig. 3-5 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with N2 plasma treatment for different process time.

-2.0 -1.5 -1.0 -0.5 0.0

Fig. 3-6 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with N2O plasma treatment for different process time.

-2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0

Fig. 3-7 The J-V characteristics of p-type HfO2 capacitors treated by N2 plasma with different process time from 0V to -2V.

Fig. 3-8 The J-V characteristics of p-type HfO2 capacitors treated by N2O plasma with different process time from 0 V to -2 V.

-2.0 -1.5 -1.0 -0.5 0.0

Fig. 3-9 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with N2 plasma treatment for 90sec and N2O

plasma treatment for 90 sec.

-2.2 -2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2

Fig. 3-10 The J-V characteristics of HfO2 gate dielectrics treated

with N2 plasma treatment for 90 sec and N2O plasma treatment for 90 sec.

-2.0 -1.5 -1.0 -0.5 0.0

Fig 3-11 The capacitance-voltage (C-V) characteristics of HfAlOx gate dielectrics treated with N2 plasma treatment for different process

time.

Fig 3-12 The capacitance-voltage (C-V) characteristics of HfAlOx gate dielectrics treated with N2O plasma treatment for different

process time.

-2.2 -2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2

Fig 3-13 The J-V characteristics of p-type HfAlOx capacitors treated by N2

plasma with different process time from 0 V to -2 V.

-2.2 -2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2

-2.0 -1.5 -1.0 -0.5 0.0

Fig 3-15 The capacitance-voltage (C-V) characteristics of HfAlOx gate dielectrics treated with N2 plasma treatment for 30sec and N2O plasma treatment for 30 sec.

-2.2 -2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2

Fig 3-16 The J-V characteristics of HfAlOx gate dielectrics treated with N2 plasma treatment for 30 sec and N2O plasma treatment

for 30 sec.

-2.0 -1.5 -1.0 -0.5 0.0

Fig. 3-17 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with different steps of after plasma treatment annealing and post-deposition annealing.

Fig. 3-18 The J-V characteristics of HfO2 gate dielectrics treated with different steps of after plasma treatment annealing and post-deposition annealing.

-2.0 -1.5 -1.0 -0.5 0.0

2 plasma+600⁰C-30s

Fig. 3-19 The capacitance-voltage (C-V) of HfO2 gate dielectrics after different PDA temperature and different PNA temperature.

-2.0 -1.5 -1.0 -0.5 0.0

Fig. 3-20 The J-V characteristics of HfO2 gate dielectrics after different PDA temperature and different PNA temperature.

-2.0 -1.5 -1.0 -0.5 0.0

Fig. 3-21 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics after nitridation and 900 ℃ 30 sec thermal treatment.

-2.0 -1.5 -1.0 -0.5 0.0

Fig. 3-22 The J-V characteristics of HfO2 gate dielectrics after nitridation and 900 ℃ 30 sec thermal treatment.

-2.0 -1.5 -1.0 -0.5 0.0 N2 plasma+anneal 6000

C-30S

8000 C + N2

plasma+anneal 6000 C-30S

Fig. 3-23 The capacitance-voltage (C-V) characteristics of HfAlOx gate dielectrics after post-deposition annealing and plasma treatment annealing.

Fig. 3-24 The J-V characteristics of HfAlOX gate dielectrics after post-deposition annealing and plasma treatment annealing

-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0

Fig. 3-25 The capacitance-voltage (C-V) characteristics of HfAlOx gate dielectrics treated with different PNA.

2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0

Fig. 3-26 The J-V characteristics of HfAlOx gate dielectrics treated with different PNA.

-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0

Fig. 3-27 The capacitance-voltage (C-V) characteristics of HfAlOx gate dielectrics after nitridation and 900℃-30 sec thermal treatment.

2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0

Fig. 3-28 The J-V characteristics of HfAlOX gate dielectrics after nitridation and 900℃-30 sec thermal treatment.

Figure-chapter 4

Fig. 4-1 The hysteresis of p-type HfO2 gate dielectrics (sputter) without plasma treatment.

-2.0 -1.5 -1.0 -0.5 0.0

0.0 0.2 0.4 0.6 0.8 1.0

Voltage(V)

HfO₂ Original -2 V to 0 V 0 V to -2 V

C/C

MAX

Voltage(V) hysteresis = 3mv

Fig. 4-2 The hysteresis of p-type HfO2 gate dielectrics (ALD) without plasma treatment.

-2.0 -1.5 -1.0 -0.5 0.0

Fig. 4-3 The hysteresis of p-type HfO2 gate dielectrics (ALD) with PDA 600℃-30 sec, nitridation, PNA 600℃-30 sec and 900℃-30 sec.

-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0

Fig. 4-4 The hysteresis of n-type HfAlOx gate dielectrics (ALD) without plasma treatment.

-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0

Fig. 4-5 The hysteresis of n-type HfAlOx gate dielectrics (ALD) with PDA 600℃-30 sec, nitridation, PNA 600℃-30 sec and 900℃-30 sec.

-2.2 -2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 plasma for different PDA and PNA temperature

2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 original +800⁰C-SILC

original +800⁰C + N₂+ 400⁰C + 900⁰C

plasma for different PDA and PNA temperature

0 20 40 60 80 100 120 140 160 180

Fig. 4-8 Gate current shift of p-type HfO2 gate dielectrics treated with N2 plasma treatment for different annealing process during Vg = 2V CVS

.

0 20 40 60 80 100 120 140 160 180

G a te current shift

(

A/cm 2

)

Stress time (sec)

Fig. 4-9 Gate current shift of n-type HfAlOx gate dielectrics treated with N2 plasma treatment for different process annealing as a function of stress time during Vg = -2V CVS stress.

original + 400⁰C sintering 10min original + 400⁰C sintering 20min original + 400⁰C sintering 30min

HfO2

Fig. 4-10 The capacitance-voltage (C-V) characteristics of p-type HfO2 gate dielectrics with different sintering time.

-2.2 -2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2

Fig. 4-11 The J-V characteristics of p-type HfO2 gate dielectrics with different sintering time.

Fig. 4-12 The capacitance-voltage (C-V) characteristics of p-type HfO2 gate dielectrics with different sintering time after PDA.

-2.2 -2.0 -1.8 -1.6 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2

Fig. 4-13 The J-V characteristics of p-type HfO2 gate dielectrics with different sintering time after PDA.

-1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 original + 400⁰C sintering 10min original + 400⁰C sintering 20min original + 400⁰C sintering 30min

Fig. 4-14 The capacitance-voltage (C-V) characteristics of n-type HfAlOx

gate dielectrics with different sintering time.

2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0

Fig. 4-15 The J-V characteristics of p-type HfAlOx gate dielectrics with different sintering time. original + 800⁰C anneal 30s +sintering 10min original + 800⁰C anneal 30s +sintering 20min original + 800⁰C anneal 30s +sintering 30min

Fig. 4-16 The capacitance-voltage (C-V) characteristics of n-type HfAlOx gate dielectrics with different sintering time after PDA.

2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 10^-10

10^-9 10^-8 10^-7 10^-6 10^-5 10^-4 10^-3 10^-2 10^-1 10⁰ 10¹

Gate Leakage A/ cm

Voltage(V)

original (HfAlO) original + 800⁰C anneal 30s

original + 800⁰C anneal 30s +sintering 10min original + 800⁰C anneal 30s +sintering 20min original + 800⁰C anneal 30s +sintering 30min

Fig. 4-17 The J-V characteristics of p-type HfAlOx gate dielectrics with different sintering time after PDA.

在文檔中沉積後電漿處理對鉿類高介電常數材料熱穩定性之影響 (頁 48-86)