Chapter 1 Introduction
1.3 Thesis Overview…
Chapter 2 will give some basic structures of OTAs operating at high frequency.
It will describe the advantages and disadvantages of these structures as well as its characteristics. As well, some improving circuits will also be described in this chapter.
Chapter 3 will present the proposed OTAs, which modify the basic structures and could operate at high frequency. At first we will discuss the operation of the OTAs and give the math to prove the concept. Then, noise analysis of the OTAs will be presented.
In chapter 4, OTA-C filters will be presented in this chapter. The principle of the filters will be discussed in this chapter, and the output buffer will make a discussion, too.
In chapter 5, the experimental results and simulation results will be presented in the end of this chapter.
Finally, the conclusion to this work is given in chapter 6.
Chapter 2
Operational Transconductance Amplifiers
2.1 Introduction
In this chapter, we will introduce several basic OTAs. Because OTA-C filters can operate at higher frequency than sampled-data filters and RC active filters, the OTA-C filters become more popular in high frequency applications. However, OTAs are the basic blocks of the OTA-C filters, so the performance of the OTAs will determine the performance of the filters. The concept of OTA just linearly converts voltage to current. By considering the power and area issues, the active devices are used in the circuit rather than passive devices. Nevertheless, the linearity performance of active devices is poor than passive devices. Therefore, we must make a trade off between them. As well, comparing the switched capacitor filters and OTAs filters, although OTA-C filters could operate at more higher frequency than the switched capacitor filters, the former has a major disadvantage for poor linearity. Especially, when the size of CMOS technology scales down with power supply voltage, the dynamic range, bandwidth, and power consumption will be limited the linearity. For this reason, there are lots of circuits presented to improve the linearity.
2.2 Basic concepts of High-speed OTAs
Since the OTAs are operated at high frequency, there should not be unnecessary poles. Therefore, the circuits could not be complex. For this reason, we will discuss some basic OTAs, which the most circuits operated in high frequency are improved from these basic OTAs [3].
2.2.1 Differential input
In this subsection, it will describe the differential pair circuit, which is shown in Fig. 2.1.
Fig. 2.1 the Differential Pair
For the region of M1 and M2 being saturation region, the output current I1 and I2 can be got as: Therefore, the differential output current can be obtained by subtracting equation (2.1) from equation (2.2) as:
1 2 1,2( 1 2)( 1,2)
o i i cm p thn
I = − =I I β V −V V −V −V (2.3) where the value Vcm is the input common mode voltage, and it is fixed to a constant DC level. As well, the Vp can be described as:
2 From equation (2.3), the transconductance is proportion to β1,2(Vcm-Vp-Vthn1,2).
Therefore, the transconductance of the differential pair is constant as long as the voltage Vp is constant. Furthermore, the value Gm could be tuned by the tail current due to the equation (2.4). For ideal tail current, the output resistance of the tail current is infinite, so the point P is virtual ground for small signal. Hence, the transconductance could keep constant ideally. As well, because this circuit has no internal nodes, it could be operate at very high frequency. However, the output resistance of the tail current is not infinite. For this reason, the voltage Vp is not constant, and it varies with input signal variation and technology process. So, technologies to keep Vp constant are presented to improve linearity.
2.2.2 Pseudo-Differential input
Finally, we will talk about the pseudo-differential pair, which just takes off the tail current from the differential pair. Because the point P of the differential pair in Fig. 2.1 is variation in practice, it is grounded to solve this problem. Hence, the linearity will be improved. Furthermore, since the tail current is taken off, it can increase the headroom in the pseudo-differential pair due to cancel the tail current in the differential pair. As well, pseudo-differential pair is suitable in lower power supply than the differential pair. The circuit for pseudo-differential is shown in Fig.
2.2.
Fig. 2.2 the Pseudo-Differential Pair
Nowadays, we derive the formula to see the operation of the pseudo-differential pair. Since the regions of M1 and M2 are saturation regions, the output currents are described as below: Therefore, the differential output current can be shown as:
1 2 1,2( 1 2)( 1,2)
o i i cm thn
I = − =I I β V −V V −V (2.7) From equation (2.7), the disadvantage of the differential pair is be solved, and the linearity will be improved. However, the pseudo-differential pair has its
disadvantage comparing with the differential pair. First, the pseudo-differential pair has a problem about tuning. Unlike differential pair that can be tuned by tail current IB, the transconductance is proportion to β1,2(Vcm-Vthn1,2), which are usually fixed constant after taped out. Nevertheless, this is solved in [5] by tuning the threshold voltage, which can change by body voltage. Second, because the tail current is taken off, the common mode gain will increase. Therefore, the common mode reject ratio (CMRR) is about 0dB. Hence, this circuit needs common mode feedforward circuit to increase CMRR.
2.2.3 Source Degeneration
In the beginning, we introduce the source degeneration structure, which is the common structure in the transconductance circuit. The circuit is shown in Fig. 2.3.
Fig. 2.3 Transconductance using Source Degeneration Pair
In this circuit, the ideal operation of source degeneration is that Vi+ and V
i-perfectly follow to the ends of the resister. Then, the voltage across the ends of the resister, Vi+ and Vi-, will generate the output current. Because the output current is generated by resister R, the linearity would be very great. However, the resisters between the gate and the source of the transistors M1, M2 are not zero, and they vary with the transconductance of M1, M2. Therefore, the input voltages would not perfectly follow to the ends of the resister R, and it would degrade the linearity. For this reason, lots of techniques are presented to solve this problem and increase THD.
As shown in [4], the output current to the input voltage can be got as:
2 From equation (2.9), the transconductance is proportional to the factor 1/R, so increasing the linearity by the resistor is also decreasing the transconductance. Using the Taylor series, the third harmonic distortion (HD3) can be derived as:
2 2 where the degeneration factor N is gm1,2×2R. From equation (2.10), the conclusion could be made as: increasing the degeneration factor N, which increases the value R or the transconductances of M1, M2 (gm1, 2), can improve the HD3; therefore, the linearity will be increased, as well.
Although the circuits in Fig. 2.3(a) and Fig. 2.3(b) shows the same voltage-to-current relationship, they present different properties. For Fig. 2.3(a), the tail currents will contribute differential noise in the output, which will dominate the noise performance. For Fig. 2.3(b), there are voltage drops in the resistors, which will reduce the range of the common mode voltage.
2.2.4 Constant Drain-Source Voltage
Second, MOSFETS with constant drain-source voltage structure will be discussed. The circuit is shown in Fig. 2.4.
Fig. 2.4 MOSFETS with Constant Drain-Source Voltage
In the circuit, the transistors M1 and M2 are in linear region, and M3 and M4 are in saturation region. Therefore, the output current I1 and I2 are as:
2
1 1,2 1,2 1 1,2 1,2
[ ( ) 1 ]
ds i thn 2 ds
I =β V V −V − V (2.11)
2 Then the differential output current is:
1 2 1,2( 1 2)
o ds i i
I = − =I I βV V −V (2.13) From equation (2.13), the transconductance is proportion to βVds1,2. In practice, second-order effects like mobility reduction and velocity saturation reduce the linearity somewhat. However, the linearity performance is dominated by the
variation of Vds1, 2. Therefore, some techniques are presented to fix the points A and B to make the voltage Vds1, 2 constant.
2.3 Linearity-improved OTAs
As above, the four basic OTA circuits are introduced, and the major disadvantages of these circuits are the poor linearity. So lots of linearity enhancement techniques are presented to improve these problems. In this subsection, we will discuss two linearity enhancement techniques, which are already presented to improve the linearity.
2.3.1 Modified Source Degeneration OTA Circuits
As discussion in subsection 2.2.1, the linearity will degrade since the input voltages do not perfectly follow to the ends of the resistor. Hence, the direct idea is that using op amps to make the input voltages follow to the ends of the resistor. This idea is shown in Fig. 2.5. The source voltages of M1 and M2 will be equal to the input voltages due to the virtual ground in each op amp. Hence the op amps would make the input voltages follow to the ends of the resistor more greatly than the original source degeneration.
Fig. 2.5 Improving the linearity of a fixed transconductor through the use of op amps
Another method for improving the linearity of a fixed transconductor is to force constant currents through M1 and M2 such that their Vgs are fixed which is shown in Fig. 2.6. This modified source degeneration is added the negative voltage feedback, which will make the gate-source voltages of M1 and M2 constant. Therefore, it reduces the variation of the voltage across the resistor due to the constant gate-source voltages of M1 and M2.
Fig. 2.6 Improving the linearity of a fixed transconductor by maintaining a constant Vgs for M1 and M2
The circuits above which use negative voltage feedback to improve the linearity are not suitable for using as high speed OTA. Since the negative current feedback has larger bandwidth than the negative voltage feedback, the circuit using the negative current feedback will be introduced in next chapter.
2.3.2 Modified OTA Circuits with Constant Drain-Source Voltage
In subsection 2.2.2, MOSFETS with constant drain-source voltage are discussed, and the factor for the poor linearity is also discussed. The main factor is the variation of the drain-source voltages of M1 and M2 due to the input pair voltages and the temperature variation. Therefore, it needs a circuit to fix the voltages constant, and the op amps are used for this purpose. The circuit is shown in Fig. 2.7. Due to the virtual ground of the input pairs, the drain-source voltages of M1 and M2 will be fixed to the voltages of the positive input voltages in op amps.
Hence, the positive input voltages in op amps could also use to tune the transconductance, which could be seen as below:
1 2 ( 1 2)
o tune i i
I = − =I I βV V −V (2.14) Thus, using op amps could fix the voltage which is the main factor for the linearity reduction. The op amps should be designed for simpler circuits to reduce the complexity and noise which the fewer devices using the less noise will be contributed.
Chapter 3
Proposed OTAs for High Speed Applications
3.1 Introduction
As discussion in chapter 2, the main disadvantage of the OTAs is the poor linearity. Therefore, lots of linearity enhancement techniques are presented to improve the shortcoming. In the latter of chapter 2, two techniques of them are introduced. However, these two methods are not suitable to high speed applications, since the negative voltage feedback has lower bandwidth, which will reduce the loop gain at the frequency we wish to operate. Hence, the two modified circuits are proposed to apply in the high speed applications in this chapter.
3.2 Proposed Source Degeneration OTA with Negative Current
Feedback
In this section, the linearity enhancement techniques are proposed by using negative current feedback, which is more suitable in high speed applications. Since the resistance in the current feedback is smaller than that in the voltage feedback.
Therefore, the current feedback circuit features a very high bandwidth for higher
pole location [7]. This means that the linearity voltage feedback circuit improved will be less because the loop gain in the high frequency will be not sufficient due to the lower bandwidth. For this reason, the modified circuit using negative current feedback is proposed to put in use in the high speed applications.
3.2.1 Characteristics and Operation of the OTA Circuit
The modified circuit using negative current feedback is shown in Fig. 3.1.
Fig. 3.1 Modified Source Degeneration Circuit using negative current feedback The transistors M9~M16 are the output stage. The modified structure uses M17 operating in the linear region to replace the resister 2R in the conventional source degeneration circuit. That is because this circuit could utilize the gate voltage (VD) as tuning circuit. Therefore, it can be used to overcome the variation due to the fabrication or temperature variations. The operation of transistors M1~M4 and M17 is the same as the description in subsection 2.2.1. However, the transistors M5~M8 are added to increase the THD. These transistors are composed of the negative current feedback circuit, and it provides a negative feedback gain to degenerate the
HD3. Consequently, it could achieve the requirement of HD3 without large value of R.
At first, the operation of the negative current feedback circuit is presented.
Assume input voltage Vi1 increases, but the voltage at the point x (Vx) does not follow this variation. This will make the voltage between the gate and the source of M1 increase. Therefore, the drain current of M1 increases, and the drain current of M9 increases, too. Because the drain current of M9 increases, the voltage across the drain and the source of M9 also increases. For this reason, the gate voltage of M5 (Vg5=VDD-Vds9) decreases. Then, the Vgs of M5 decreases, and the drain current of M5 also decreases. The decreasing current will flow to the main circuit through the current mirror pair M3 and M7. Therefore, the drain current of M1 will be pulled down, and the voltage Vx will be pushed up. Therefore, the negative current feedback circuit could give the voltage Vx a hand to follow the variation of the input voltage. Similar, the voltage Vy will also follow with the input voltage Vi2 by the same operation.
By the way, the math formulas for HD3 will be derived to prove the concept of the circuit. First, assuming Vi1= vid + vcm, Vi2= vid – vcm, and the voltages at the point As well, the current across the transistor M17 (rds17) can be got as:
17
Hence, the drain currents of M1 and M2 can also be described as:
1 3
D D xy
I =I +I (3.4)
2 4
D D xy
I =I −I (3.5) where ID1+ID2=ID3+ID4=2IB, which IB is the bias current. From equation (3.1), (3.2), (3.4), and (3.5), the differential output current is as below:
1 2 1,2( ( )) 2 3 4
o D D m id x y xy D D
I =I −I =g v − V −V = I +I −I (3.6) Now, we assume Ro is the resistance looking down the drain of M1, and also assume Ro is constant for simplicity. Thus, the drain currents of M3 and M4 could be
determined by the drain currents of M5 and M6 due to the current mirror pairs. So the currents are shown below:
2 Using equation (3.7), (3.3), (3.8), and (3.6), the relation between the differential output current and the voltage across M17 is shown in the following:
1 2 1 2 where we assume the negative current feedback gain is α=β5,6Ro ×(2Vgs5,6 + 2Vthn5,6-2IBRo). The value β5,6 is proportion to 1/RV, so the unit of negative current feedback gain α is V/V. Furthermore, from equation (3.9) and (3.6), the equation about the voltage across M17 can be described as:
(1 ) where N=gm1,2×rds17 is the source degeneration factor [4]. Finally, for the drain formulas of M1, M2, and the equation (3.10), we can get the relation about differential output current and the input voltage.
2
2 From equation (3.14), the transconductance is approximately proportional to the factor 1/ (1+α), which we can achieve the requirement of linearity with reduction of transconductance with about factor (1+α) rather than the factor rds17 for the
traditional source degeneration circuit. Hence, improving the linearity by negative feedback gain would reduce the smaller value of transcoductance than the traditional circuit. Using the Taylor series, the third harmonic distortion (HD3) could be got as:
2 2 As compared with equation (2.2), the factor N in equation (2.2) change to (1+α)N in equation (3.15). Therefore, it can also improve the HD3 by the negative current feedback gain, α. Thus, the linearity could be achieved without large value rds17, and this relaxes the degeneration factor N and reduces the area due to the smaller resistance rds17.
3.2.2 Common Mode Feedback Circuit
In the filter designs, the output of the OTA must connect to the input of the next OTA, so the common mode voltage is very important. Now, two circuits will be shown to understand the need of the common mode feedback circuit [8]. First, a simple differential amplifier which the inputs and outputs are shorted is shown in Fig. 3.2. We can find the common mode voltages of inputs and outputs are well defined as VDD-ISSRD/2.
Fig. 3.2 a simple differential amplifier with inputs shorted to outputs
However, another circuit is shown in Fig. 3.3. Due to the fabrication process, the mismatches in the current mirrors will cause finite difference between ID3, 4 and ISS/2. If ID3, 4 is slightly greater than ISS/2, M3 and M4 will enter the linear region to make their drain currents equal to ISS/2. Conversely, if ISS/2 is slightly greater than ID3, 4, M5 will enter the linear region to make ISS/2 equal to ID3, 4. Hence, due to the non-well defined common mode output voltages, it would make the transistors enter the wrong regions and would reduce the bias current, as well. Therefore, it needs a common mode feedback circuit for the differential circuits to fix the common mode output voltages at the wished level.
Fig. 3.3 High-gain differential pair with inputs shorted to outputs
Therefore, the common mode feedback circuit is needed to stabilize the output common mode level, which is shown in Fig. 3.4. Note that the output common mode level is fixed to the input common mode level. It is because the outputs of the OTA connect to the inputs of the next OTA by designing a filter. The following will describe the operation of the common mode feedback circuit [9].
Fig. 3.4 The common mode feedback circuit for modified source degeneration using negative current feedback
MF10 and MF11 connect to the output stage M13, M14, M15, and M16 in Fig.
3.1 and it will adjust the output common mode level due to the feedback current. For example, if the output common mode voltages are larger than the reference voltage Vref, the drain current of MF8 will increase. Hence, the currents in the output stage in Fig. 3.1 will increase, as well. Because the voltage across M11 and M12 increase due to the increased currents, the output common mode voltages decrease.
Conversely, if the output common mode voltages are smaller than the reference voltage Vref, the smaller current will flow to the output stage to increase the output common mode voltage. In addition, the operation of the common mode feedback circuit can be interpreted by the voltage concept. There is a negative gain from the gates of MF1, MF2 to the drains of them, and the gain from the gate of MF9 to the outputs in Fig. 3.1 is a positive gain. Therefore, the common mode feedback circuit provides a negative gain for the outputs, so it can fix the output common mode voltages to the reference voltage Vref. When the circuit operates at high frequency, the common mode feedback circuit must also be stable at high frequency. The open loop gain of the common mode feedback circuit is:
( )
gmf11/CB are the non-dominated poles. They must be pushed far away the unity gain frequency to increase the phase margin.3.2.3 Noise Analysis For thermal noise:
For the communication systems, the noise is the major course to avoid that the
For the communication systems, the noise is the major course to avoid that the