The processor is implemented by embedded system which we provide one method to setup up proposed system. In Xilinx Spartn-3 FPGA [30], [31], [32], [33], [34], [35], it has an embedded processor which is MicroBlaze processor of IBM [28]. Therefore, the processor can be entirely built by writing C-language and the N-points branch FFT can be loaded to FPGA as an accelerator.
In this thesis, the processor performance analysis is based on radix-2/4/8 algorithms.
Because of the processor performance is based on instructions, we can try to use higher radix algorithm but it requires more high frequency clock cycles. Hence, the resource cost will be reduced while keeping specification requirements and the shift registers is another issue. For a bigger N, the shift registers will cause more power consumption and area cost than using memory access. Therefore, how to improve the efficiency and simplify the memory access scheme in the long length branch FFT module is left for our future work.
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