Analysis and comparison of existing models

Monolithic inductors have drawn increasing interest for applications in radio frequency integrated circuit (RF ICs), such as low noise amplifier (LNA), voltage controlled oscillator (VCO), Mixer , input and output match network. It is believed that SoC approach can provide benefit of lower cost, higher integration, and better system performance. However, some inherent limitations originated from the low resistivity substrate of bulk Si should be overcomed through effort in process technology and layout or new configurations in circuit operation, e.g. differenentially driven instead of single end operation. To facilitate the RF circuit simulation accuracy and prediction capability, the physical limitation coming from substrate loss, conductor loss, and the mutual interaction should be carefully considered and implemented in the circuit level models. The physical mechanisms, which are well recognized for on Si chip inductors include eddy currents on spiral metal coils and semiconducting substrate due to instantaneous electromagnetic field coupling, crossover capacitance between the spiral coils and under-pass, coupling capacitance between monolithic inductor and substrate, substrate capacitance and substrate ohmic loss, etc. In the following, the

discussion on mentioned model features will be provided.

2.2.1 Accuracy and bandwidth of validity

The lack of accurate model for on-chip inductors presents one of the most challenging problems for silicon-based RF IC design. In conventional IC technologies, inductors are not considered as standard components like transistors, resistors, or capacitors, whose equivalent circuit models are usually included in the Spice model for circuit simulation. However, this situation is rapidly changing as the demand for RF IC’s continues to grow. Various approaches for modeling inductors on silicon have been reported in past decade. Most of these models are based on numerical techniques, curve fitting or empirical formulae and therefore are relatively inaccurate

for higher frequencies. For monolithic inductor design and optimization, a compact physical model is required. The difficulty of physical modeling stems from the

complexity of high frequency phenomena such as the eddy currents in the coil conductor and semiconducting substrate as well as the substrate loss in the silicon.

The key to accurate physical modeling is firstly to identify all the parasitic and loss effects and then to implement a physics based model for simulating the identified parasitic and loss effects. Since an inductor is intended for storing magnetic energy, the inevitable resistance and capacitance in a real inductor are counter-productive and thus are considered parasitic effects. The parasitic resistances dissipate energy through ohmic loss while the parasitic capacitances store electric energy. A traditional equivalent circuit model of an inductor generally called π-model is shown in Fig. 2.1

(a)

(b)

Figure 2.1 (a) Top (die photo);Middle, 3-D view (b)the lumped physical model of a spiral inductor on silicon

The inductance and resistance of the spiral and underpass is represented by the series inductance, Ls, and the series resistance, Rs, respectively. The overlap between the spiral and the underpass allows direct capacitive coupling between the two terminals of the inductor. The feed-through path is modeled by the parallel capacitance, Cp. The oxide capacitance between the spiral and the silicon substrate is modeled by Cox. The silicon substrate capacitance and resistance are modeled by Csi

and Rsi. There are several sources of loss in a monolithic inductor. One relatively obvious loss comes from the series winding resistance. This is because the interconnect metal used in most CMOS processes. The DC resistance of the inductor is easily calculated as the product of this sheet resistance and the number of squares in the metal strip. However, at high frequencies the resistance of the strip increases due to skin effect, proximity effect and current crowding. The substrate loss will increase with frequency due to the dissipative currents that flow in the silicon substrate. In fact, there are two different physical mechanisms that cause the induction of these currents and opposition flux.

Although physical considerations are included in such a structure, the original π-model lacks the following import feature:

1. Strong frequency dependence of series inductance and résistance as a result of the current crowding in the crowding

2. Frequency-independent circuit structure that is compatible with transient analysis and broadband design

3. It is difficulty to match high frequency behaviors, especially for thick metal case where metal-line-coupling capacitance is not negligible and substrate loss.

According to above theory and original π-model, we modify π-model for on-chip spiral

inductors over again to fit measurement data. Moreover, we add two new element Rp

and Lsub to improve above third item, as shown figure 2.2. A parallel Rp is to simulate current crowding in coil’s RLC network and series Lsub1,2 are placed under the Cox1,2

to be represent eddy effect in the substrate RLC network. In order to verify the accuracy of the modify π-model, spiral inductors with various geometrical configurations were fabricated using 0.13 μm eight-metal CMOS technology. To assess the model validity, we compare difference with model and measurement.

Figure 2.2 Modify π-model for on-chip spiral inductors.

Figure 2.3 and 2.4 show the measured and modeled S-parameters, mag(S21) and phase(S21) for a varying coil number of turns. As can be seen from these figures, the S-parameters of model match the measured data worst, especially a lager turn (N=3.5, 4.5, 5.5) at the high frequency. Figure 2.5 (a) ~ (d) reveal the exact match of Mag(S11)

for smaller coils (N= 2.5, 3.5) over full frequency range up to 20GHz, but the other figure 2.6 shows enormous error of phase(S11). Due to above match condition, modify π-model may be not suit to simulate measured S-parameters for spiral inductors.

Besides, we also make comparison with performance parameters for spiral inductor, i.e., L(ω), Re(Zin(ω)), and Q(ω). From figure 2.7 ~ 2.9 illustrates, we find that the modify π-model provides very good match with the measurement for L(ω), Re(Zin(ω)), and Q(ω) before self-resonance frequency. According to above comparison, modify π-model may be not simulate all parameters of spiral inductors and maybe can simulate certain specific parameters, especially L(ω), Re(Zin(ω)), and Q(ω). Hence, in the following chapter, we will change equivalent circuit structure over again. We use 3D EM simulation by Ansoft HFSS to simulate on-chip inductor and discover truly conforms to the physics significance parameter to establish new equivalent circuit.

0 2 4 6 8 10 12 14 16 18 20

Figure 2.3 Comparison of S21 (magnitude) between π-model simulation and measurement for spiral inductors. Coil numbers (a) N=1.5, (b) N=2.5, (c) N=3.5, (d)

N=4.5

Figure 2.4 Comparison of S21 (phase) between π-model simulation and measurement for spiral inductors. Coil numbers (a) N=1.5, (b) N=2.5, (c) N=3.5, (d) N=4.5

Figure 2.5 Comparison of S11 (magnitude) between π-model simulation and measurement for spiral inductors. Coil numbers (a) N=2.5, (b) N=3.5, (c) N=4.5, (d)

N=5.5

Figure 2.6 Comparison of S11 (phase) between π-model simulation and measurement for spiral inductors. Coil numbers (a) N=2.5, (b) N=3.5, (c) N=4.5, (d) N=5.5

Figure 2.7 Comparison of L(ω) between π-model simulation and measurement for

spiral inductors. Coil numbers (a) N=2.5, (b) N=3.5, (c) N=4.5, (d) N=5.5

800 π_model_2.5 meal_2.5

Re

(

)

frequence, f (GHz)

0 2 4 6 8 10 12 14 16 18 20 0

frequence, f (GHz)

0 2 4 6 8 10 12 14 16 18 20

1000 π_model_4.5 mea_4.5

Re

(

)

frequence, f (GHz)

0 2 4 6 8 10 12 14 16 18 20 0

frequence, f (GHz)

Figure 2.8 Comparison of Re(Zin(ω)) between π-model simulation and measurement for spiral inductors. Coil numbers (a) N=2.5, (b) N=3.5, (c) N=4.5, (d) N=5.5

Figure 2.9 Comparison of Q(ω) between π-model simulation and measurement for

spiral inductors. Coil numbers (a) N=2.5, (b) N=2.5, (c) N=3.5, (d) N=4.5

2.2.2 Scalability and geometries of validity

There are various geometries available for a monolithic inductor to be implemented, e.g. rectangular, hexagonal, octagonal, and circular as shown in figure 2.10.

(d) (c)

(a) (b)

Figure 2.10 Spiral inductor geometries.

Electromagnetic (EM) simulation can help to verify the layout geometry effect on inductors and the results suggest that circular spiral can provide the best performance

in terms of higher quality factor and smaller chip area. The mechanism responsible for the improved performance realized by circular spiral comes from the reduced current crowding effect. The circular inductor as shown in figure 2.2 (d) can place the largest amount of conductor in the smallest possible area, reducing the series resistance and parasitic capacitance of the spiral inductors. However, one major drawback of the circular structure is its layout complexity. It is because that its metal line consists of many cells rotated with different angles. In general, specific coding is required to generate this structure by layout tools.

In fact, a good model is developed to accurately simulate the broadband characteristics of on-Si-chip for different geometries of the inductive passive components, up to 20GHz. Besides the broadband feature, scalability is justified by good match with a liner function of geometries of the inductive passive components for all model parameters employed in the RLC network. The satisfactory scalability manifest themselves physical parameters rather than curve fitting.

2.2.3 Model parameter extraction flow and automation

Which a new model or a conventional model has been developed to accurately simulate the broadband characteristics, its all the unknown R, L,C parameters haven’t been determined initial value. So we must establish a parameter extraction flow through equivalent circuit analysis to determine initial guess value and to enable automatic parameter extraction and optimization. All the unknown R,L,C parameters are extracted from analytical equations derived from different equivalent circuit analysis. We can use Z-matrix and /or Y-matrix to extract all parameters. Above extraction and optimization principle, we use some principle to define a set of

analytical equation from measurement and to generate all unknown parameters at the equivalent circuits. Due to the necessary approximation, the extracted R,L,C parameters in the first run of low are generally not the exactly correct solution but just serve as the initial guess or further optimization through best fitting to the measured S-parameters, L(ω), Re(ω), and Q(ω).