Basic operation of TFT device

For the general principles just discussed, a TFT, the structure and energy band diagrams as showed in Fig. 2.5 Talking the semiconductor to be n-type, consider first the application of a positive bias. The equilibrium band diagram shown in Fig. 2.5(b) assumes an ideal situation, i.e. there is no charge in the semiconductor before the application of a gate bias.

Consider several biasing schemes showed in Fig. 2.3, VGS < 0, 0 ≤ VGS ≤ Vth , and VGS =Vth , where VGS is the gate-source voltage and Vth is the threshold voltage.

For the application of a small negative sloping of the energy bands in both the insulator and semiconductor, as displayed in Fig. 2.5(b). It is clear that the concentration of majority carrier electrons has been decreased and depleted, in the vicinity of the insulator-semiconductor interface. A similar conclusion results from charge considerations. Setting VGS < 0 places a minus charge on the gate, which in turn repels electrons from the insulator-semiconductor interface and exposes the positively charged donor sites. This particular situation, where the electron concentrations at the insulator- semiconductor interface are less than the background doping concentration, is known for obvious reasons as depletion.On the other hand, application of a small positive gate bias (0 ≤ VGS ·≤ Vth ) attracts electrons towards the interface, creating an accumulation layer (or channel) near the interface and a depletion region in the bulk. Biasing in this “subthreshold” regime causes downward

band bending in the insulator and the semiconductor (near the interface), as shown in Fig. 2.3(d). Increasing the gate bias modulates the conductivity of the surface layer and is reflected in an increased degree of band bending. The gate voltage at which there is an appreciable electron carrier density present at the interface establishes the threshold voltage (i.e. VGS = Vth).

(a) (b) (c) (d)

Fig. 2.5 (a) The basic structure of a TFT and the corresponding energy band diagrams as viewed through the gate for several conditions, including (b) equilibrium, (c) VGS < 0 and (d) VGS > 0.

The application of VGS > 0 lower EF in the gate relative to EF in the semiconductor and causes a positive sloping of the energy bands in both the insulator and semiconductor. As show in the result energy band diagram, Fig. 2.3(d), the major conclusion to be driven is that the electron concentration inside the semiconductor increases as one approached the insulator-semiconductor interface. This particular situation, where the majority carrier concentration is greater near the insulator- semiconductor interface than in the bulb of the semiconductor, is known as accumulation.

Now that channel formation has been established, application of a positive voltage on the drain attracts electrons towards the drain and accounts for the drain

current, ID. Initially, the channel is modeled as a resistor, i.e. linearly increasing drain current with drain-source voltage, VDS. Continuing to increase the drain voltage obviously causes the channel to narrow more and more, especially near the drain, until eventually the top and bottom depletion regions touch in the near vicinity of the drain. The complete depletion of the channel, touching of the top and bottom depletion regions, is an important special condition and is referred to as “pinch-off”.

When the channel pinches off inside the device, the slop of the ID-VD characteristic becomes approximately zero, negating the effect of the surface accumulation layer, and the drain bias at the pinch-off point is given the designation VDsat. For drain biases in excess of VDsat, the ID-VD characteristic saturates, that is, remains approximately constant at the IDsat value.

Chapter 3

Experiments and measurement techniques

3.1 Experimental methods 3.1.1 The sol-gel method

Sol-Gel method is one of the promising processes to prepared high quality thin films at relative low temperatures compared to other depositions. The first step to form the gels in the sol-gel process is hydrolysis, a hydroxyl attached to the metal atoms as in the following reaction [124]:

M(OR)n + H2O →M(OR)n-1(OH) + ROH (3-1) The R and ROH represented a ligand and an alcohol. The second step of sol-gel process is polymerization which was achieved by two partially hydrolyzed molecules linked together, such as

M(OR)n + M(OR)n-1(OH) → M2O(OR)2n-2 + H2O (3-2) A long chain molecule could be obtained from the reaction of hydrolysis and polymerization mentioned above. Since the coating ability and preferential direction of thin preparation of thin films depend on the molecules, the reaction plays an important role in the preparation of thin films. In an organic system, the solute is usually the metal alkoxide, such as M(OR)n which M is represented metal and R represented alkyl group(CH3, C2H5,…..etc.).

As a result of the sol-gel solution still maintains liquid phase before gelled, and is easy to film on different substrates. There are many coating methods, such as dip

coating, spray coating, and spin coating. The quality of the thin films depends on coating method and coating conditions.

Among the wet coating approaches, spin coating is an easier way to obtain uniform thin films. The quality of the thin films is influenced by the following procedures; the cleanliness of the substrates, the chemical properties of the solution (viscosity, stability, and volatile rate), the speed and time of spin, and the adhesion between the solution and substrates. The most significant disadvantage of spin coating is that if used for small or asymmetric substrates.

There are many advantages of the conventional sol-gel method. The cost and maintenance of the facilities of the sol-gel are much lower than that of vacuum techniques such as sputtering or chemical vapor deposition. In addition, the precursor solution prepared by sol-gel method could be purified by crystallization and distillation methods; thereby the high purity thin films could be obtained.

3.1.2 Synthesis of the precursors

Zinc acetate dehydrate (Zn(CH3COO)2．2H2O) is used as precursor or mixed with magnesium acetate tetra-hydrate (Mg(CH3COO)2．4H2O) were dissolved in 2-methoxyethanol, and then added monoethanolamine (MEA) to the solution. The concentration of metal ions in ZnO or Zn1-xMgxO sols were controlled between 0.375M and 0.75M, the mole ratio of Mg⁺² can be varied from 0 to 0.36 (for x values);

after 2 hr stirred for the mixed solution at 60３!a clear and homogenous sol was obtained. The Zn1-xMgxO thin film was filmed on the alkali-free glass (Corning 1737) using spin coating method, which was under different spin speed. These as-coated films were dried at 100-120３ for 10 minutes, and then annealed at 150 to 550３

respectively for 1 hr in air atmosphere. The flow chart of the precursor preparation and ZnO films processing is showed in Fig. 3.1.

Fig. 3.1 The flow chart of the precursor preparation and ZnO films processing by spin coating.

3.1.3 Chemical bath deposition (CBD)

CBD was carried out in a beaker with a soak aqueous solution containing 0.1 mol/L zinc nitrate and 0.03 mol/L dimethylamineborane placed upon a heater-stirrer during the growth process at temperature range of 60 to 65℃. Prior to deposition, the glass substrate was activated by an industrially employed two-step Pd/Sn process using sensitizer (SnCl2, 1 g/L; 32% HCl, 1 ml/L) and activator (PdCl2, 0.1 g/L; 32%

HCl, 0.1 mol/L) [20, 21], then immersed the substrate in the soak solution for 30 min.

The thickness of the ZnO film could be controlled by tuning the soak concentration or immersing time. Finally, the substrate was rinsed with DI water and dried with nitrogen gas then baked on hot-plate at 100３ for 5 min.

3.1.4 The fabrication of thin film transistor devices

The typical thin film transistors were fabricated by following procedures. All of conductive layer (source, drain, or gate electrode) was deposited by sputtering on glass substrate. Silicon dioxide or silicon nitride was served as the gate insulator with a thickness of 300nm by plasma-enhanced chemical vapor deposition (PECVD). The channel width and length were defined by photolithography. Finally, the Zn(1-x)MxO (M = Mg) thin film were deposited by solution methods with the same processes mentioned in section 3.1.1 and 3.1.2 the above.

3.2 Characterization for materials and devices 3.2.1 Scanning electron microscopy (SEM)

The scanning electron microscopy (SEM) was used the secondary electron mode to observe the morphology of ZnO materials and electronic device. The model of the SEM used here is Hitachi 4700.

3.2.2 Transmission electron microscopy (TEM)

One of the typical characters of nano-phase materials is the small object size.

Although some structural features can be revealed by x-ray and neutron diffraction, direct imaging of nanomaterials is only possible using high resolution transmission

electron microscopy (HRTEM, FEI / Philip Tecnai F20). TEM is a unique technique because it can produce a real space image on the atom distribution in the nanocrystal surface. With a finely focused electron probe, the structural characteristic of a single nanomaterial can be fully understood. Normally, the chemical analysis system, the energy disperse X-ray spectrometer (EDX), was attached on TEM system.

3.2.3 X-ray diffraction spectroscopy

X-ray diffraction analysis of the ZnO specimens was carried out by using an X-ray diffractometry (XRD) (Philips PW3710 or MAC Science MAXP3) with conventional θ/2θ scans. The X-ray was generated by a Cu target (Cu Kα) operated at 50kV and 60mA, and the scanning speed was 0.02 deg/step, 1deg/min from 20° to 80°.

3.2.4 UV absorption

UV absorption was done in UV-VIS-NIR scanning spectrophotometer (SHIMADZU UV-3101PC) at wavelengths from 350 to 800 nm by employing both a tungsten-iodide (WI) lamp for the visible region and a deuterium (D2) lapmp for the ultraviolet region.

3.2.5 Thermal gravimetric analysis

Thermal weight loss was measures by thermal Gravimetric Analysis (TGA;

Perkin-Elmer, thermal gravimetric analyzer 7), which is a simple analytical technique that measures the weight loss (or weight gain) of a material as a function of temperature. As materials are heated, they can loose weight from a simple process

such as drying, or from chemical reactions that liberate gasses. Some materials can gain weight by reacting with the atmosphere in the testing environment. Since weight loss and gain are disruptive processes to the sample material or batch, knowledge of the magnitude and temperature range of those reactions are necessary in order to design adequate thermal ramps and holds during those critical reaction periods.

A sample of the test material is placed into a platinum cup that is supported on, or suspended from an analytical balance located outside the furnace chamber. The balance is zeroed, and the sample cup is heated according to a predetermined thermal cycle. The balance sends the weight signal to the computer for storage, along with the sample temperature and the elapsed time. The TGA curve plots the TGA signal, converted to percent weight change on the Y-axis against the reference material temperature on the X-axis.

3.2.6 Hall effect measurement

The importance of the Hall-effect [125-127] is underscored by the need to determine accurately carrier density, electrical resistivity, and the mobility of carriers in semiconductors. The Hall-effect provides a relatively simple method for doing this.

Because of its simplicity, low cost, and fast turnaround time, it is an indispensable characterization technique in the semiconductor industry and in research laboratories.

It is listed as one of the most-commonly used characterization tools.

Fig. 3.2 Schematic of the Hall effect in a long, thin bar of semiconductor with four ohm contacts. The direction of the magnetic field B is along the z-axis and the sample has a finite thickness d.

The basic physical principle underlying the Hall-effect is the Lorentz force.

When an electron moves along a direction perpendicular to an applied magnetic field, it experiences a force acting normal to both directions and moves in response to this force and the force affected by the internal electric field. For an n-type, bar-shaped semiconductors shown in Fig. 3.2, the carriers are predominately electrons of bulk density n. Assume that a constant current I flow along the x-axis from left to right in the presence of a z-directed magnetic field. Electrons subject to the Lorentz force initially drift away from the current line toward the negative y-axis, resulting in an excess surface electrical charge on the side of the sample. This charge results in the Hall voltage, a potential drop across the two sides of the sample. (Note that the force

on holes is toward the same side because of their opposite velocity and positive charge.) This transverse voltage is the Hall voltage VH and its magnitude is equal to IB/qnd, where I is the current, B is the magnetic field, d is the sample thickness, and q

(1.602 x 10^-19 C) is the elementary charge. In some cases, it is convenient to use layer or sheet density (ns = nd) instead of bulk density. One then obtains the equation

ns = IB/q|VH| (3.3)

Thus, by measuring the Hall voltage VH and from the known values of I, B, and q, one can determine the sheet density ns of charge carriers in semiconductors. If the measurement apparatus is set up as described later in Section III, the Hall voltage is negative for n-type semiconductors and positive for p-type semiconductors. The sheet resistance RS of the semiconductor can be conveniently determined by use of the van der Pauw resistivity measurement technique. Since sheet resistance involves both sheet density and mobility, one can determine the Hall mobility from the equation

µ = |VH|/RSIB = 1/(qnSRS) (3.4)

If the conducting layer thickness d is known, one can determine the bulk resistivity (ρ

= RSd) and the bulk density (n = nS/d)

3.2.7 Atomic force microscope (AFM)

The atomic force microscope (AFM) is a very high-resolution type of scanning probe microscope, with demonstrated resolution of fractions of a nanometer, more than 1000 times better than the optical diffraction limit. The AFM was invented by Binnig, Quate and Gerber in 1986, and is one of the foremost tools for imaging,

measuring and manipulating matter at the nanoscale. The term 'microscope' in the name is actually a misnomer because it implies looking, while in fact the information is gathered by feeling out the surface with a mechanical feeler.

3.2.8 X-ray photoelectron spectroscopy

The XPS was taken to investigate the bonding energy between each element of thin film. By absorbing a photo, an atom gains an energy amount equal to hν. It then releases an electron to regain its original stable energy state. The released electron retains all the energy from the striking photon, which can escape from the atom and keep it moving. The incident photons usually carry an energy range from 1 to 2keV by XPS analysis.

3.3 Electrical properties measurement for TFT devices

The transistor devices were analyzed with an Agilent 4155B semiconductor parameter analyzer. The Agilent 4155B Semiconductor Parameter Analyzer is an engineering instrument that allows the measurement of current-voltage characteristics of microelectronics devices and small circuits with up to eight terminals, also, the dc characterization of semiconductor devices and materials. It stimulates voltage and current sensitive devices, measures the resulting current and voltage response.

Chapter 4

Results and Discussions

4.1 Thin film transistors with active layers of zinc oxide (ZnO) fabricated by low-temperature chemical bath method

4.1.1 Descriptions

Thin film transistors (TFTs) with active channel layers of zinc oxide (ZnO) using a low-temperature chemical bath deposition have been studied. The ZnO films were fabricated on the defined-areas of bottom-gate type TFTs plate by immersing in a chemical bath containing zinc nitrate (Zn(NO3)2.6H2O) and dimethylamineborane (DMAB) aqueous solution at 60℃. Silicon oxide (SiO2) uses as the insulator.

Produced TFTs plate is dried in the air at 100℃, specially, without any annealed.

Capacitance-voltage (I-V) properties measured through the gate infer that the ZnO channel is n-type. Devices were achieved that Ion/Ioff ratio was more than 10⁵, for which the channel mobility on the order of 0.248 cm² V^-1 s^-1 has been determined.

4.1.2 Conceptions

Zinc oxide (ZnO), a transparent film is very popular used due to its unique optical and electronic properties in solar cells [123], photo detectors [11], light emitting devices [12], gas sensor elements [128], and surface acoustic wave guides [14]. Also, ZnO films exhibiting n-type semiconductive characteristic with wide band gap of 3.3 eV, excellent chemical and thermal stability, and can be well-oriented crystalline on various substrate, have recently been studied as the active channel

material in thin film transistors development [51, 71, 129]. Especially, the Hall effect mobility measured at room temperature for single crystals is on order of 200 cm² V^-1 s^-1 [130].

Several methods are applied to prepare ZnO films, both physical and chemical deposition technologies which include sputtering [15], pulsed laser deposition [131], chemical vapor deposition (CVD) [17], molecular beam epitaxy [18], and sol-gel process [19] etc. However, most of the methods were not well suited for large area coating and low temperature processing. For the issues, chemical bath deposition (CBD) has been attracted technology which is simple and low-cost for fabricating thin film. There are many previous articles discussing the ZnO films using electroless deposition in solution bath and indicating the feasibility of low temperature [21, 23, 132-134]. These make the films good compatibility with substrate materials.

In the present article, we decided the patterning method of ZnO film, and performed the bottom-gate type TFT device with a patterned active channel ZnO film on that used CBD method. Also, the properties of films and characteristics of ZnO-TFT are studied.

4.1.3 Specifics methods

4.1.3.1 Film deposition procedure

The TFTs had a simple bottom-gate device configuration on a Corning 1737 glass substrate (Fig. 4.1 insert), where underlying ITO, 100 nm thick, was used as the gate electrode, selecting a silicon oxide (SiO2) film for the gate dielectric which thickness was 300nm, and ITO film of 100-nm as the source and drain electrodes.

Each source-drain pair that was defined of a channel width W=500 μm wide and

channel length L=10 μm. The active channel pattern was fabricated using standard lithography then processed ZnO film following by CBD technique and yield TFTs after photo resist stripped (Fig. 4.1(a), (b)).

Fig. 4.1 Schematic (a) cross-sectional and (b) top view of the ZnO-based thin-film transistor.

CBD was carried out in a beaker with a soak aqueous solution containing 0.1 mol/L zinc nitrate and 0.03 mol/L dimethylamineborane placed upon a heater-stirrer during the growth process at temperatures 60 . Prior to deposition, the glass ℃ substrate was activated by an industrially employed two-step Pd/Sn process using sensitizer (SnCl2, 1 g/L; 32% HCl, 1 ml/L) and activator (PdCl2, 0.1 g/L; 32% HCl, 0.1 mol/L) [135, 136], then immersed the substrate in the soak solution for 30 min.

immersing time. Finally, the substrate was rinsed with DI water and dried with nitrogen gas then baked on hot-plate at 100℃ for 5 min.

4.1.3.2 Characterization techniques

The deposited crystal structure was identified by X-ray diffractometry (XRD) (Mac Science M18XHF-SRA) using a conventional 2θ scans over a range from 15˚ to 80˚ operated at 50KV and 200mA, the morphology was characterized by scanning electron microscopy (SEM; LEO 1530). The transistors were analyzed with an Agilent 4155B semiconductor parameter analyzer. The samples were measured in the dark.

!

4.1.4 Achievements and explanations

The crystallographic structure of the films has been studied by X-ray diffraction.

Fig. 4.2 shows the XRD spectrum of ZnO films which were deposited on the SiO2

surface of a TFT device by soaking in the aqueous solution with 0.1mol/L zinc nitrate and 0.03mol/L DMAB. The diffraction peaks (100), (002), and (101) indicate that, the produced ZnO crystals are wurtzite structure, and the morphologies consist of hexagonal column. In addition, mainly peak (002) indicates preferential c-orientation of the crystals [137], in other words that grains are mainly grown with c-axis vertical to the substrate. The regular direction growth can be explained as follows: For the electroless deposition, the crystalline morphology was led by nucleation and growth conditions. The ZnO film growing in zinc nitrate and DMAB solution followed heterogeneous nucleation [12]. However, on the SnCl2/PdCl2 pretreatment surface, the primary crystallite will prior to attack and continue to grow.

Fig. 4.2 X-ray diffraction spectrum of the ZnO thin film on SiO₂ surface prepared by the CBD.

Fig. 4.3(a) and 3(b) show the image of local ZnO film on TFT device by SEM, where are respectively cross-sectional and plane-view morphology. Hexagonal rods are observed which correspond to the basal plane of the hexagons (Fig. 4.3(a)). The ZnO film is formed of regular arrangement and compact amassment rods vertical to

Fig. 4.3(a) and 3(b) show the image of local ZnO film on TFT device by SEM, where are respectively cross-sectional and plane-view morphology. Hexagonal rods are observed which correspond to the basal plane of the hexagons (Fig. 4.3(a)). The ZnO film is formed of regular arrangement and compact amassment rods vertical to