Resistors

In general, there is little need for resistors in the area of Gm-C filters except source and load resistors in doubly terminated LC ladders. For low-sensitivity design, source and load resistors should be taken into consideration. The transconductor-based resistors are shown in Fig. 4.1.

Fig. 4.1 Resistor Simulates with Transconductors

For Fig. 4.1(a), since the transconductor input is ideally an open circuit, the input current Ii is equal to the transconductance output current Io as

i m o

i I g V

I = = (4.1) As a result, the equivalent resistance is

m i

i

g I

R V 1

=

= (4.2)

In Fig. 4.1(b), we connect the two inputs to two different voltages, and feed the outputs back to the inputs. The relation between input currents and output voltage can be described as

) (V₁ V₂ g

I I

I_i = _o = = _m − (4.3)

Consequently, the resistor is

gm

I V

R=V₁− ₂ = 1 (4.4)

Observing the results found in Fig. 4.1(a) and Fig. 4.1(b), we know that the negative feedback cause the positive resistors. On the other hand, a negative resistor,

m i

i I R g

V =− =−1 , by using the positive feedback is shown in Fig. 4.1(c).

4.2.2 Gyrators

Especially in LC ladders, a gyrator is a useful element because it allows us to convert a capacitor into an inductor, as shown in Fig. 4.2. The characteristic of the gyrator can be described as Also, the voltage across the capacitor C is given by

I sC

V 1

2

2 = × (4.7) From these three equations above, we derive

sL

Fig. 4.2 the Grounded Inductor Implemented by a Gyrator

Moreover, a floating inductor is presented in Fig. 4.3.

Fig. 4.3 the Floating Inductor Realized by a Capacitor between Two Gyrators

4.2.3 Integrators

In this subsection, we introduce the properties of the integrator, which is the fundamental building block of Gm-C filters. To realize an integrator in Gm technology, a transconductor and a capacitor are used as presented in Fig. 4.4.

Fig. 4.4 the Single-ended Integrator

In most integrated applications, the fully differential circuits are common used because they have better noise immunity and distortion properties. Fig. 4.5 presents the fully differential integrators.

Fig. 4.5 the Fully Differential Integrators

At first, we analyze the integrator in Fig. 4.4 for simplicity. In the ideal case, both the input and output impedance of the transconductor are infinite. The transfer function of the integrator can be derived as

sC

On the jω-axis, the equation becomes

)

From the equation (4.10), we can see that the ideal integrator has infinite DC gain.

Besides, quality factor and phase margin are defined as Q(jω)=B(jω) G(jω) and ideal transconductor has infinite quality factor and PM = 90− ° for all frequencies.

Finally, the unity gain frequency for the integrator is

C g

_m

T

=

ω

(4.11)

As for the non-ideal transconductor, the transfer function includes extra parameters of delay and non-zero conductance G. The delay is caused by the parasitic poles and zeros of transconductor. However, due to the parasitic poles and zeros locating at markedly higher frequency than the unity gain frequency, we could model this circumstance only by one single effective zero. The zero in the right half-plane (RHP) leads to the phase lag. On the other hand, the zero in the left half-plane (LHP) results in the phase lead.

The non-ideal integrator could be modeled as Fig. 4.6. The transfer function of

this non-ideal integrator is

The non-zero conductance causes finite dominate pole and DC gain which is given by

o

Fig. 4.6 the Non-ideal Single-ended Integrator

In Fig. 4.7, the magnitude and phase response of the integrator is given. Normally,

2

1 1

1τ <<ω_T << τ

Fig. 4.7 Gain and Phase Response of the Integrator

The parasitic zero and finite DC gain result in the deviation of phase from− 90°. which is a principal error in the filter. By rewriting equation (4.11), the transfer function is

Hence, the quality factor of the integrator can be derived as

))

Q_{nonideal nonideal} ω

ω

According to equation (4.15) and (4.16), the reciprocal value of the quality factor can be described as From the equation (4.17), the quality factor is infinite at the frequency which is the geometric mean of the dominant pole and the effective parasitic zero.

4.3 Fourth-order Equiripple Linear Phase Low-pass Filter

In this section, the 4^th order equiripple linear phase filter, cascading by two biquad sections, is presented. This section is divided into three parts. First, we introduce the biquad section. Next, the filter architecture is presented. Finally, output buffers will be discussed.

4.3.1 Biquad Section

The passive RLC circuit of the general impedance converter (GIC) biquad is shown in Fig. 4.8. The transfer function can be expressed in

sC sL

Fig. 4.8 the 2^nd Order Bandpass Filter for Passive RLC Prototype

Using the elementary transconductor building block discussed in section 4.2, the active biquad section is shown in Fig. 4.9.

Fig. 4.9 the 2^nd Order Bandpass and Lowpass Filter for Active Gm-C Prototype ForR=1 g_m2 andL=C₂ g_m3g_m4, the transfer function of bandpass filter is

Using the fact that

The transfer function of lowpass filter is

4 The advantages of the biquad section are the cascade fashion, and the loop is quite stable in high order filter. The disadvantages of the biquad section are the loading effects and the circuit sensitivity, which is more sensitive than LC ladders.

4.3.2 Filter Architecture

The structure of the 4^th order linear phase lowpass filter by cascading two biquad sections is shown in Fig. 4.10.

Fig. 4.10 the 4^th Order Equiripple Linear Phase Lowpass Filter

Because the output of the first, second and fourth stages in biquad section are connected together, this section only need one common mode feedback circuit,

instead of three, to maintain the output of three stages to the reference voltage.

Moreover, the biquad needs another common mode feedback circuit to maintain the output of the third stage.

From the equation (4.21), the cutoff frequencyω₀ and the quality factor Q for a biquad section can be expressed as

C g_m1

0 =

ω (4.22)

2 1 m m

g

Q= g (4.23)

= 1

K

(4.24) From the equation (4.22), the unity gain frequency of the first transconductor in the biquad section is equal to the cutoff frequency of the biquad. Table 4.1 presents the denominator of the biquad section and the phase error in the 4^th order linear phase filter.

TABLE 4.1 Denominator of Biquad Section

As can be seen from the table above, the filter is implemented with 0.05° phase error.

Furthermore, the quality factor and normalized cutoff frequency for the first and second biquads areQ₁ =0.5573,ω₀₁=1.0752 Q₂ =1.0652,ω₀₂ =1.5865. According to these parameters, the transconductance and capacitance can be designed to fulfill the transfer function.

4.3.3 Output Buffers

While measuring the filter, the loading effect caused by the instruments is a

critical issue. Consequently, using the output buffers to alleviate loading effect is essential. The following presents two methods for realizing the output buffers. One is using a transconductor-based resistor as the output buffer, and the other is using the source follower to implement.

Fig. 4.11 shows the output buffer using transconductor-based resistor. By adding this output buffer, the transfer function becomes

) ( )

( )

( T s T s

V V V V V

s V

T _{buff filter}

i o o obuff i

obuff = × = ×

= (4.25)

To acquire the original transfer function of the filter, we have to divide T(s) by the transfer function of output buffer. However, the output buffer might attenuate the output signal of filter, and thus the signal is too small to be measured.

Fig. 4.11 the Output Buffer Using Transconductor-based Resistor

Another method is using the source follower as the output buffer as presented in Fig. 4.12. Because the gain of the source follower is approximate to 1, it is easy to measure the output signal of source follower without attenuating too much. However, the current in source follower must be large enough to ensure that the DC gain of filter is about 0dB.

Fig. 4.12 the Output Buffer Using Source Follower

Chapter 5

Simulation and Experimental Results

5.1 Introduction

The performances of the OTA and filter are usually expressed as the following parameters, such as CMRR, PSRR, etc. By using these parameters, we can compare the performances with other OTA and filter. In this chapter, the definition of the parameters is introduced. Moreover, the simulation and experimental results of proposed circuits are presented.

„ Common Mode Rejection Ratio (CMRR):

DM

where ACM-DM denotes common-mode to differential-mode conversion. Large CMRR means that the circuit has a good ability to suppress the effect of common-mode noise.

„ Power Supply Rejection Ratio (PSRR):

DM

The PSRR is defined as the gain from the input to the output divided by the gain from the supply to the output. The larger the PSRR is, the less the noise from the power supply affects.

„ Power Consumption or Current Consumption:

The power consumption can be derived from current consumption as

V I

P = ×

(5.3)

As mentioned before, the linearity is the main drawback of the Gm-C filter.

There are two parameters, THD and IM3, to describe the linearity performance of the OTA and filters.

„ Total Harmonic Distortion (THD):

For an ideal OTA, when a single frequency signal applies to the input node, the same frequency signal will show at the output node. However, in practice, the nonlinear effects would cause the harmonic distortion, which means the output signal is composed of the fundamental frequency and harmonic frequencies. By analyzing the output signal, the total harmonic distortion is obtained. The total harmonic distortion of a signal is defined as the total power of the second and higher harmonic frequencies divided by the power of the fundamental signal, as shown below in dB.

⎟⎟

The even harmonic distortion is cancelled due to using fully differential structures.

Furthermore, the high-order harmonic distortions are usually too small to be neglected.

Therefore, the third-order harmonic distortion is a dominant distortion which equals to the THD approximately. The definition is shown in dB as

⎟⎟

In addition, we could use another approach to interpret the HD3. Base on the reasons above, the relation between the input and output can expressed as

)

Assuming the input is a sinusoidal signal as

) cos(

)

( t A t

V

_in

= ω

(5.7)

From the equation (5.6) and (5.7), the output signal could be derived as

„ Third-order Intermodulation (IM3):

While measuring the linearity of the low-pass filter near the edge of passband, the measurement results would be wrong by analyzing with the THD. This is because the high-order harmonic distortions are in the stopband and thus being filtered. As a result, the IM3 is used to measure the filter’s linearity.

The analyzing method with the IM3 is to apply two tone signals as input signal.

)

From equations (5.6) and (5.10), the output signal could be approximately derived as

)]

)The output signal of the third and fourth terms might be out of band and thereby being filtered. Nevertheless, the signals of the second term, intermodulation distortions, are close to the input signal. Consequently, we can measure the linearity of the filter by using these properties. The magnitude of the fundamental term and the main intermodulation distortions are given as _{1 1} ^{3 3}

4 9a A A

a I_D = +

and ₃ ^{3 3} 4 3a A

I_D = , respectively. Assuming , the third-order

intermodulation distortion is derived as

4

5.2 Performance of Flipped Voltage Follower OTA with Input Attenuators

5.2.1 Simulation Results of the Transcondutor

In Fig 5.1, the DC gain of the OTA is 42.1dB and the unity gain frequency is 42.7MHz with 86.6∘phase margin.

(a)

(b)

Fig. 5.1 (a) Magnitude Response (b) Phase Response

In Fig. 5.2 and 5.3, the CMRR and PSRR of OTA are 102dB and 69dB at DC, respectively.

Fig. 5.2 the Common Mode Rejection Ratio

Fig. 5.3 the Power Supply Rejection Ratio

In Fig 5.4, the transconductance is varying with different tuning voltage.

Fig. 5.4 the Tuning Range of the OTA

In Fig 5.5, the transcondctance is varying with different frequencies.

Fig. 5.5 the OTA Tuning Range with Highest and Lowest Vtune

In Fig 5.6, the HD3 is about -74dB for 10MHz with 0.8-Vpp input signal.

Fig. 5.6 the Total Harmonic Distortion

5.2.2 Simulation Results of the Filter

From Fig 5.7, the cutoff frequency is about 40MHz, and the group delay is less than 5.4% up to 1.8fc. The maximum value of magnitude response is not 0dB due to the source follower as the output buffer.

(a)

(b)

Fig. 5.7 (a) Magnitude Response (b) Group Delay

In Fig. 5.8 and 5.9, the HD3 is about -60.8dB for 10MHz with 0.8-Vpp input signal and the IM3 is -36.6dB for 39MHz and 41MHz with 0.8-Vpp input signal. The IM3 is normally worse than the HD3, where the IM3= and

HD3= .

) 4 / 3 ( ) /

(a₃ a₁ × A² )

4 / ( ) /

(a₃ a₁ × A²

Fig. 5.8 the Total Harmonic Distortion

Fig. 5.9 the Inter-modulation Distortion TABLE 5.1 the Specification of Filter

5.2.3 Measurement Results of the Filter

The layout for this circuit is shown in Fig. 5.10 (a) and the die photo is shown in Fig. 5.10 (b). The active region is 0.510×0.500mm².

(a)

(b)

Fig. 5.10 (a) the Layout (b) the Die Photo

The magnitude response and the group delay for the filter are shown in Fig. 5.11.

The cutoff frequency could be tuned from 10MHz to 40MHz and the group delay is about 24ns at the cutoff frequency.

(a)

(b)

Fig. 5.11 (a) Magnitude Response (b) Group Delay

The following measurement results express the linearity performance. The THD is shown in Fig. 5.12. From this figure, the HD3 is -53.4dB at 10MHz for 0.8Vpp

input signal and the HD2 is about -41dB. The second-order harmonic distortion is measured because of the mismatch in the current mirrors and in the input pairs.

Moreover, the mismatch in the off-chip single-ended to differential input and differential output to single-ended conversion setup lead to the distortion as well. In Fig. 5.13, the IM3 is shown to be about -36dB for 39MHz and 41MHz input signals.

Fig. 5.12 the Total Harmonic Distortion

Fig. 5.13 the Inter-modulation Distortion

5.3 Performance of Super Source Follower OTA with a Positive Feedback

5.3.1 Simulation Results of the Transcondutor

In Fig 5.14, the DC gain of the OTA is 36.4dB and the unity gain frequency is 17MHz with 83.8∘phase margin.

(a)

(b)

Fig. 5.14 (a) Magnitude Response (b) Phase Response

In Fig. 5.15 and 5.16, the CMRR and PSRR of OTA are 82dB and 76dB at DC, respectively.

Fig. 5.15 the Common Mode Rejection Ratio

Fig. 5.16 the Power Supply Rejection Ratio

In Fig 5.17, the transconductance is varying with different tuning voltage.

Fig. 5.17 the Tuning Range of the OTA

In Fig 5.18, the transconductance is varying with different frequencies.

Fig. 5.18 the OTA Tuning Range with Highest and Lowest Vtune

In Fig 5.19, the HD3 is about -59dB for 17MHz with 0.6-Vpp input signal.

Fig. 5.19 the Total Harmonic Distortion TABLE 5.2 the Specification of the OTA

5.3.2 Measurement Results of the Transcondutor

The layout for this circuit is shown in Fig. 5.20 (a) and the die photo is shown in Fig. 5.20 (b). The active region is 0.145×0.134mm².

(a)

(b)

Fig. 5.20 (a) the Layout (b) the Die Photo

The following measurement results express the linearity performance. The THD is shown in Fig. 5.21. From this figure, the HD3 is -69dB at 10MHz for 0.6Vpp input signal and the HD2 is about -64dB. The second-order harmonic distortion is measured because of the mismatch in the current mirrors and in the input pairs. Moreover, the mismatch in the off-chip single-ended to differential input and differential output to single-ended conversion setup lead to the distortion as well. In Fig. 5.22, the IM3 is shown to be about -60dB for 9MHz and 11MHz input signals. Fig. 5.23 shows the HD3 for different frequencies with 0.6-Vpp input signals.

Fig. 5.21 the Total Harmonic Distortion

Fig. 5.22 the Inter-modulation Distortion

Fig. 5.23 the Measured HD3 for Different Frequencies

Table 5.3 summarized this work with recently reported OTAs. In order to compare with other OTAs, the defined figure of merit (FOM), which takes the transconductance value, input swing range, linearity performance, speed of the implemented circuit, and power consumption into consideration, is expressed as follows:

⎟⎟⎠

⎜⎜ ⎞

⎝

⎛ × × ×

= power

f IM

V

FOM G^{m id} 3^{linear o}

log

10 (5.13)

TABLE 5.3 Comparison of Previously Reported Works

Chapter 6 Conclusions

6.1 Conclusions

When it comes to the high frequencies, the operational transconductance amplifiers (OTAs) have proven to be the best candidate for executing the continuous-time filters. However, because the main drawback of the OTA is poor linearity, the linearity enhancement techniques are required. In this thesis, two approaches of the transconductor for implementing the filter are proposed. The main purpose of the filter is to apply in IEEE 802.11 for the wireless local area networks.

Although the source degeneration circuit can improve the linearity, it is not good enough for some applications. The proposed transconductors are both based on the source degeneration structure and adding extra concepts to implement. One is designed by combining the flipped voltage follower with input attenuators, which is used to achieve the 4^th order equiripple linear phase lowpass filter. The measurement result of the filter shows that -36dB IM3 at 40MHz. The other is designed by using the super source follower with a positive feedback to alleviate the non-ideal effects.

For this circuit, the IM3 is shown to be about -60dB at 10MHz.

6.2 Future Works

With the progressing of technology, the power supply voltage will be reduced in nano-scale. In the portable devices, the feature of low power consumption is emphasized especially. As a result, attempting to design in low-voltage low-power with equal or better linearity is a challenge, and it is worthy to do the research.

Bibliography

[1] T. Y. Lo, High Performance CMOS Transconductors and Gm-C Filters for Wireless Communications and Wireline Systems. Ph. D. dissertation, National Chiao Tung University, 2007.

[2] Y. Tsividis, Z. Czarnul, and S. C. Fang, "MOS transconductors and integrators with high linearity," Electronics Letters, vol. 22, pp. 245-246, 1986.

[3] A. Lewinski and J. Silva-Martinez, "A High-Frequency Transconductor Using a Robust Nonlinearity Cancellation," Circuits and Systems II: Express Briefs, IEEE Transactions on [see also Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on], vol. 53, pp. 896-900, 2006.

[4] Z. Y. Chang, D. Haspeslagh, J. Boxho, and D. Macq, "A highly linear CMOS Gm-C bandpass filter for video applications," in Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996, 1996, pp. 89-92.

[5] F. Bahmani, F. Bahmani, and E. Sanchez-Sinencio, "A highly linear pseudo-differential transconductance," in Solid-State Circuits Conference, 2004.

ESSCIRC 2004. Proceeding of the 30th European, 2004, pp. 111-114.

[6] A. Lewinski and J. Silva-Martinez, "OTA linearity enhancement technique for high frequency applications with IM3 below -65 dB," Circuits and Systems II:

Express Briefs, IEEE Transactions on [see also Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on], vol. 51, pp. 542-548, 2004.

[7] T.-Y. Lo and C.-C. Hung, "A High Speed Pseudo-Differential OTA with Mobility Compensation Technique in 1-V Power Supply Voltage," in Solid-State Circuits Conference, 2006. ASSCC 2006. IEEE Asian, 2006, pp. 163-166.

[8] E. Sanchez-Sinencio and J. Silva-Martinez, "CMOS transconductance amplifiers, architectures and active filters: a tutorial," Circuits, Devices and Systems, IEE Proceedings -, vol. 147, pp. 3-12, 2000.

[9] R. G. Carvajal, J. Ramirez-Angulo, A. J. Lopez-Martin, A. Torralba, J. A. G.

Galan, A. Carlosena, and F. M. Chavero, "The flipped voltage follower: a useful cell for low-voltage low-power circuit design," Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 52, pp. 1276-1291, 2005.

[10] B. Calvo, S. Celma, and M. T. Sanz, "A linear CMOS Gm-C-OTA biquad filter with 10-100 MHz tuning," in Circuits and Systems, 2004. MWSCAS '04. The 2004 47th Midwest Symposium on, 2004, pp. I-61-4 vol.1.

[11] B. Razavi, Design of Analog CMOS Integrated Circuit, New York:

McGraw-Hill, 2001.

[12] T.-Y. Lo and C.-C. Hung, "1.5-V Linear CMOS OTA with -60dB IM3 for High Frequency Applications," in Solid-State Circuits Conference, 2006. ASSCC 2006.

IEEE Asian, 2006, pp. 167-170.

[13] Rolf Schaumann, Mac E. Van Valkenburg, Design of Analog Filter, New York:

Oxford University Press, Inc. 2001.

[14] A. N. Mohieldin, E. Sanchez-Sinencio, and J. Silva-Martinez, "A fully balanced pseudo-differential OTA with common-mode feedforward and inherent common-mode feedback detector," Solid-State Circuits, IEEE Journal of, vol.

38, pp. 663-668, 2003.

[15] Stefano D'Amico, M. Conta, and A. Baschirotto, "A 4.1-mW 10-MHz fourth-order source-follower-based continuous-time filter with 79-dB DR,"

IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2713-2719, Dec. 2006.

[16] I. S. Han, “A novel tunable transconductance amplifier based on voltage-controlled resistance by MOS transistors,” IEEE Trans. Circuits Syst. II,

[16] I. S. Han, “A novel tunable transconductance amplifier based on voltage-controlled resistance by MOS transistors,” IEEE Trans. Circuits Syst. II,

在文檔中 應用於IEEE 802.11無線區域網路之高線性度轉導電容式連續濾波器 (頁 38-0)