5. SEQUENCE INSTRUCTIONS
5.3.1 Bit device, timer, counter output (OUT)
Available Device
Bit device Word (16-bit) device Constant Pointer Level Carry flag Error flag
X Y M L S B F T C D W R A0 A1 Z V K H P I N
Digit specification Index
M9012 (M9010, M9011)
Bit device O O O O O O
Device O
Set Value O O
Device O
Set value O O
*1: Index qualification can be used AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
*2: If extension timers or counters are used with the AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board, refer to Section 3.8.3.
Functions OUT (Y, M, L, S, B, F)
(1) This instruction outputs the operation result for the elements pereceding the OUT instruction.
OUT Instruction Contact Operation
Result Coil
NO contact NC contact
OFF OFF Non-continuity Continuity
ON ON Continuity Non-continuity
Applicable
CPU All CPUs
*2
Set value (Content of data resister. 1 to 32767 are valid.) K50 Set value (1 to 32767 are valid.)
Set value (1to 32767 are valid.) Device number (T0 to 255) D10
Device number (T0 to 255) T0
K50
Set value (Content of data resister. 1 to 32767 are valid.) C0 Device number (C0 to 255) D10
C1
Device number (C0 to 255)
POINTS
(1) When F (annunciator) is turned ON, LED indicators and ERROR LEDs on the CPU module illuminate, and the number of annunciator which is turned ON is stored in special registers. For details, refer to the ACPU Programming Manual (Fundamentals).
(2) If the OUT instruction is used to turn ON the annunciator, annunciator coil status does not correspond to the display of LED indicators. To avoid this, use the SET instruction to turn ON the annunciator.
If the OUT instruction is used to turn ON the annunciator, the annunciator coil turns OFF when the operation result of instructions preceding the OUT instruction turns OFF. However, display contents of LED indicators and ERROR LEDs on the CPU module and contents of special registers do not change.
For details, refer to the ACPU Programming Manual (Fundamentals).
REMARK
The number of steps is 3 when either of the following devices is used for OUT instruction:
• Special relay (M)
• Annunciator (F)
5 − 16 OUT (T)
(1) When the operation result of instructions preceding the OUT instruction are on, the coil of timer turns on and counts up to the set value. When the timer times out (counted value set value), the contact is as indicated below.
NO contact Continuity
NC contact Non-continuity
(2) When the operation result of instructions preceding the OUT instruction change from ON to OFF, the following occurs.
Before TIme Out After Time Out Type of
Timer Timer Coil Present Value
of Timer NO contact NC contact NO contact NC contact 100ms timer
10ms timer OFF 0 Non-continuity Continuity Non-continuity Coninuity 100ms
retentive timer OFF Present value
is retained Non-continuity Continuity Continuity Non-continuity
(3) After the timer has timed out, the status of the contact of an retentive timer does not change until the RST instruction is executed.
(4) If T256 to T2047 are used with the AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board specify set values as described in Section 3.8.3.
(5) A negative number (-32768 to -1) cannot be set as a set value.
(6) When a set value is 0, it is regarded as infinite, and therefore, the timer does not reach time out.
(7) For the counting process of timers, refer to the ACPU Programming Manual (Fundamentals).
OUT (C)
(1) When the operation result of the instructions preceding the OUT instruction have changed from OFF to ON, 1 is added to the present value (count value).
When the counter has counted out (counted value = set value), the state of the contact is as indicated below.
NO contact Continuity
NC contact Non-continuity
(2) When the operation result of the instructions preceding the OUT instruction remain on, counting is not performed. (It is not necessary to convert the count input into a pulse.)
(3) After the counter has counted out, the count value and the status of contact do not change until the RST instruction is executed.
(4) If C256 to C1023 are used with the AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board, specify set values as described in Section 3.8.3.
(5) A negative number (-32768 to -1) cannot be used as a set value. When the set value is 0, the same processing as for 1 is performed.
(6) For the counting process of counters, refer to the ACPU Programming Manual (Fundamentals).
Execution Conditions This instruction is executed per scan irrespective of the operation result of the instructions preceding the OUT instruction.
Program Examples OUT
(1) Program which switches an output at the output unit.
(2) Program which turns on Y10 and Y14 10 seconds after X0 turns on.
(3) Program which uses the BCD data of X10 to 1F as the set value of the timer.
•Coding
Data of X10 to 1F is converted into BIN and stored into D10.
( )
BIN X010 D10 D10 T2
•Coding
0 LD X000
1 BINP K4X010 D10
6 LD X002
7 OUT T2 D10
8 LD T2
9 OUT Y015
0 END
When T2 counts out, Y15 turns on.
When X2 turns on, the data stored in D10 is counted as a set value.
5 − 18
(4) Program which turns on Y30 after X0 turns on 10 times and which turns off Y30 when X1 turns on.
(5) Program which changes the set value of C10 to 10 when X0 turns on and to 20 when X1 turns on.
( )
When X1 turns on, 20 is stored to D0.
When X0 turns on, 10 is stored to D0.
( )
C10 counts the data, which is stored in D0, as a set value.
When C10 counts out, Y30 turns on.
•Coding
15 OUT Y030
16 END
5 − 19 5.3.2 Bit device set, reset (SET,RST)
Available Device
Bit device Word (16-bit) device Constant Pointer Level Carry flag Error flag
X Y M L S B F T C D W R A0 A1 Z V K H P I N
Digit specification Index
M9012 (M9010, M9011)
SET O O O O O O
RST (D)
O O O O O O O O O O O O O O O
*1: Index qualification can be used with AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
Functions SET
(1) When the SET input turns on, the specified device is turned on.
(2) The turned-on device remains on even if the SET input turns off. The device can be turned off by the RST instruction.
(3) When the SET input is off, the status of the device does not change.
RST
(1) When the RST input turns on, the specified device changes as described below:
Device Status
Y, M, L, S, B, F Coil and contact are turned off.
T, C Present value is set to 0, and coil and contact are turned off.
D, W, R, A0, A1, Z, V Content is set to 0.
(2) When the RST input is off, the status of device does not change.
Applicable
CPU All CPUs
*1
X5 OFF
X7 OFF
Y10 OFF
ON
ON ON
X005
X007
SET Y010
RST Y010
SET Device number to be set (turned on) RST
(D)
Device number to be reset.
Setting data SET
RST input
SET
RST
(D)
(D)
(3) The functions of RST (D, W, R, A0, A1, Z, V) are the same as those of the following circuit.
If the annunciator relay (F ) is turned ON/OFF, display contents of LED indicators and ERROR LEDs on the CPU module and contents of special registers change.
For details, refer to the ACPU Programming Manual (Fundamentals).
Execution (1) The SET, RST instructions are executed on the following conditions:
Conditions
(2) SET, RST instructions
In refresh mode, the SET/RST instructions cannot be used in a program which outputs a pulse signal during one scan. In this case, output (Y) must be changed to direct mode or add the partial refresh command as shown below.
REMARK
The number of steps is 3 when any of the following devices is used:
SET instruction Special relay (M) Link relay (B) Annunciator (F) RST instruction Special relay (M)
Word devices (All)
RST input RST input
Device number (D, W, R, A0, A1, Z, V)
Device number (D, W, R, A0, A1, Z, V) X010
RST D50
X010 K
MOV 0 D50
Direct mode Refresh mode
SET, RST instruction
SET, RST (Y, M, L, S, B)
SET, RST (F)
OFF ON
Executed every scan
Executed ever scan
Executed
only once Executed only
once ON
OFF
5 − 21 Program Examples SET , RST
(1) Program which sets (turns on) Y8B when X8 turns on and which resets (turns off) Y8B when X9 turns on.
(2) Program which sets the content of data register to 0.
•Coding
0 LD X000
1 MOV K4X010 D8
6 LD X005
7 RST D8
10 END
When X0 turns on, the contents of X10 to 1F are stored into D8.
When X5 turns on, the content of D8 is set to 0.
K4
MOV X010 D8
RST D8 0
6
•Coding
0 LD X009
1 RST Y08B
2 LD X008
3 SET Y08B
4 END
X009
X008
RST Y08B
SET Y08B
0
2
X8 (SET input) OFF
X9 (RST input) OFF
Y8B OFF
ON
ON
ON
X000
X005
(3) Program which resets the 100ms retentive timer and counter.
•Coding
0 LD X004
1 OUT T225 K18000
2 LD T225
3 OUT C23 K16
4 RST T225
7 LD C23
8 OUT Y055
9 LD X005
10 RST C23
13 END
( )
( )
( ) T225 turns on after X4 has been on for 30 minutes.
The number of ON times of T225 is counted.
When T225 has turned on, T225 is reset.
When C23 has counted up, Y55 turnes on.
When X5 turns on, C23 is reset.
X004
T225
C23
X005
K18000 T225 K16 C23
RST T225
RST C23
Y055 0
2
7
9
5 − 23 5.3.3 Edge-triggered differential output
(PLS, PLF)
Available Device
Bit device Word (16-bit) device Constant Pointer Level Carry flag Error flag
X Y M L S B F T C D W R A0 A1 Z V K H P I N
Digit specification Index
M9012 (M9010, M9011)
(D) O O O O O O
*1: Index qualification can be used with AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
Function PLS
(1) When the PLS command changes from Off to On, the specified device goes On for 1 scan and when the PLS command is in a state other than Off → On (Off → Off, On → On, On → Off), the device goes Off.
If there is one PLS instruction from the specified device (D) within 1 scan, the specified device goes On for 1 scan.
See Section 3.9 concerning operation in the case that the PLS instruction from the same device is executed multiple times in 1 scan.
(2) If the instruction generating the pulse is switched on and the RUN key switch is moved from the RUN to STOP position and the RUN key switch is moved from the RUN to STOP position and then returned to the RUN position again, the PLS instruction is not executed.
PLS command
X005
PLS M0
X000
PLS M0
Move RUN key switch of CPU unit from RUN to STOP position
Move RUN key switch of CPU unit from STOP to RUN position PLS
CPU All CPUs
(3) When a latch relay (L) is specified in a PLS instruction execution command, after the power goes Off with the latch relay (L) in the On state, when the power is turned On again, the PLS command executes the PLS command so that it will change from Off to On in the first scan and turn the specified device On. After the power goes On, the device which was turned On in the first scan goes Off when the next PLS instruction is executed.
PLF command
(D)
(D)
(D) Device number to be con-verted into pulse Setting data
1scan of PLS M0
Operation stop time of PC
Operation stop time of PC
1 scan
*1
PLF
(1) When the PLF command changes from On to Off, the specified device goes On for 1 scan and when the PLF command is in a state other than On → Off (Off → Off, Off → On, On → On), the device goes Off.
If there is one PLF instruction from the specified device (D) within 1 scan, the specified device goes On for 1 scan.
See Section 3.9 concerning operation in the case that the PLF instruction from the same device is executed multiple times in 1 scan.
(2) If the instruction generating the pulse is off and the RUN key switch is moved from the RUN to STOP position and then returned to the RUN position again, the PLF instruction is not executed.
POINT
If a PLS or PLF instruction is caused to jump by a CJ instruction, if the sub-routine program executed by a PLS/PLF command was not called by a CALL instruction, the device specified by (D) will go On for 1 scan or longer, so exercise caution.
Program Examples PLS
Program which executes the PLS instruction when M9 turns on.
PLF
Program which executes the PLF instruction when M9 turns off.
X005
PLF M0
• Coding
0 LD X009
1 PLS M9
4 END ON
X9 OFF
M9 OFF
ON 1 scan
• Coding
0 LD X009
1 PLF M9
4 END
X5 OFF
M0 OFF
ON
ON
1 scan 1 scan
X009
PLS M9 0
X009
PLF M9 0
M9 OFF
ON
1 scan ON
X9 OFF
5 − 25 5.3.4 Bit device output reverse (CHK)
The CHK instruction varies in function with I/0 control mode as shown below.
I/O control mode CPU
Direct mode Refresh mode
(when either or both of input and output are in refresh mode)
An Failure check
AnN, AnS, AnSH, A1FX,
A0J2H, A73, A3N board Failure check Bit device output reverse
A3H, A3M Failure check Failure check
A3V, AnA,
A2C, A52G, AnU, A2AS, QCPU-A (QCPU-A Mode), QCPU-A2USH board
Failure check
For failure check, refer to Section 7.10.2.
Available Device
Bit device Word (16-bit) device Constant Pointer Level Carry flag Error flag
X Y M L S B F T C D W R A0 A1 Z V K H P I N
Digit specification Index
M9012 (M9010, M9011)
(D1) O O O O O O
(D2)
*1: Device used for D2 is a dummy data which has nothing to do with program processing.
AnS AnN AnSH
An A1FX A3H
A3M A3V AnA
AnU, A2AS
A52G A73 A3N boad Applicable
CPU
x O x x x x x
Remark * Valid only when the input/output control method is refresh method.
*1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1
Output reverse command
CHK (D1) (D2)
(D1) Required device number
(D2)
Dummy data
Any device number indi-cated by
Functions (1) Reverses the output status of the device, (D1), on the leading edge of the output reverse command.
(2) Though (D2) is a dummy data, specify any device number indicated with the mark for it. If a bit device is specified for (D2) , specify the digit with K1 to K4.
Specify any value since this digit specification value is a dummy data.
Device specified for (D2) can be used freely for other purposes.
(3) The CHK instruction is only executed in refresh mode.
(4) The output reverse command on/off period must be equal or greater than 1 scan time.
Program Example CHK
The following program reverses the output status of Y10 when X9 is switched on.
X005 K4
CHK Y010 M1 X5 OFF Y10 ON
OFF ON
0 X009
CHK Y010 D0 • Coding
0 LD X009
1 CHK Y010 D0
6 END
5 − 27 5.4 Shift Instructions